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Update instructionList.txt

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Auios 2024-07-01 22:48:25 -04:00
parent 5eb7e3ef48
commit fa6f5b369e
1 changed files with 213 additions and 213 deletions
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instructionList.txt
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@ -10,235 +10,235 @@ ien F5 1 Enbale interrupts
idi F6 1 Disable interrupts idi F6 1 Disable interrupts
16-bit Inc/Dec (I): 16-bit Inc/Dec (I):
inc p 12 1 P++ inc p 12 1 P++
dec p 15 1 P-- dec p 15 1 P--
inc q 13 1 Q++ inc q 13 1 Q++
dec q 16 1 Q-- dec q 16 1 Q--
8-bit Unary (U): 8-bit Unary (U):
inc a 10 1 A++, set flags inc a 10 1 A++, set flags
dec a 11 1 A--, set flags dec a 11 1 A--, set flags
icc a 1B 1 A+=CF, set flags icc a 1B 1 A+=CF, set flags
inc b 19 1 B++, set flags inc b 19 1 B++, set flags
dec b 1A 1 B--, set flags dec b 1A 1 B--, set flags
icc b 1C 1 B+=CF, set flags icc b 1C 1 B+=CF, set flags
inc c 17 1 C++, set flags inc c 17 1 C++, set flags
dec c 18 1 C--, set flags dec c 18 1 C--, set flags
icc c 1D 1 C+=CF, set flags icc c 1D 1 C+=CF, set flags
tst a 14 1 Set flags according to A-0 tst a 14 1 Set flags according to A-0
tst b 1E 1 Set flags according to B-0 tst b 1E 1 Set flags according to B-0
tst c 1F 1 Set flags according to C-0 tst c 1F 1 Set flags according to C-0
inc *s+imm8 2B 4 *(S+imm8)++, set flags inc *s+imm8 2B 4 *(S+imm8)++, set flags
dec *s+imm8 2C 4 *(S+imm8)--, set flags dec *s+imm8 2C 4 *(S+imm8)--, set flags
icc *s+imm8 2D 4 *(S+imm8)+=CF, set flags icc *s+imm8 2D 4 *(S+imm8)+=CF, set flags
tst *s+imm8 2E 3 Set flags according to *(S+imm8)-0 tst *s+imm8 2E 3 Set flags according to *(S+imm8)-0
16-bit Arithmetic (X): 16-bit Arithmetic (X):
adp imm8 4A 2 P+=imm8 signed adp imm8 4A 2 P+=imm8 signed
adq imm8 4B 2 Q+=imm8 signed adq imm8 4B 2 Q+=imm8 signed
ads imm8 4C 2 S+=imm8 signed ads imm8 4C 2 S+=imm8 signed
adp b E6 1 P+=B signed adp b E6 1 P+=B signed
adq b E7 1 Q+=B signed adq b E7 1 Q+=B signed
ads b E8 1 S+=B signed ads b E8 1 S+=B signed
8-bit Arithmetic/Logic (A): 8-bit Arithmetic/Logic (A):
add imm8 24 2 A+=imm8, set flags add imm8 24 2 A+=imm8, set flags
adb imm8 72 2 B+=imm8, set flags adb imm8 72 2 B+=imm8, set flags
adc imm8 73 2 C+=imm8, set flags adc imm8 73 2 C+=imm8, set flags
sub imm8 70 2 A-=imm8, set flags sub imm8 70 2 A-=imm8, set flags
sbb imm8 99 2 B-=imm8, set flags sbb imm8 99 2 B-=imm8, set flags
sbc imm8 9A 2 C-=imm8, set flags sbc imm8 9A 2 C-=imm8, set flags
acc imm8 78 2 A+=imm8+CF, set flags acc imm8 78 2 A+=imm8+CF, set flags
scc imm8 79 2 A-=imm8+CF, set flags scc imm8 79 2 A-=imm8+CF, set flags
cmp imm8 71 2 set flags according to A-imm8 cmp imm8 71 2 set flags according to A-imm8
and imm8 74 2 A&=imm8, set zero flag and imm8 74 2 A&=imm8, set zero flag
ior imm8 75 2 A|=imm8, set zero flag ior imm8 75 2 A|=imm8, set zero flag
xor imm8 76 2 A^=imm8, set zero flag xor imm8 76 2 A^=imm8, set zero flag
ann imm8 77 2 A&=~imm8, set zero flag ann imm8 77 2 A&=~imm8, set zero flag
shl imm8 D0 2 A<<=imm8, set zero flag shl imm8 D0 2 A<<=imm8, set zero flag
shr imm8 D1 2 A>>=imm8, set zero flag shr imm8 D1 2 A>>=imm8, set zero flag
rol imm8 D2 2 A<<<=imm8, set zero flag rol imm8 D2 2 A<<<=imm8, set zero flag
ror imm8 D3 2 A>>>=imm8, set zero flag ror imm8 D3 2 A>>>=imm8, set zero flag
sra imm8 D4 2 A>>a=imm8, set zero flag sra imm8 D4 2 A>>a=imm8, set zero flag
add *s+imm8 AE 3 A+=*(S+imm8), set flags add *s+imm8 AE 3 A+=*(S+imm8), set flags
adb *s+imm8 9B 3 B+=*(S+imm8), set flags adb *s+imm8 9B 3 B+=*(S+imm8), set flags
adc *s+imm8 9C 3 C+=*(S+imm8), set flags adc *s+imm8 9C 3 C+=*(S+imm8), set flags
sub *s+imm8 AF 3 A-=*(S+imm8), set flags sub *s+imm8 AF 3 A-=*(S+imm8), set flags
sbb *s+imm8 9D 3 B-=*(S+imm8), set flags sbb *s+imm8 9D 3 B-=*(S+imm8), set flags
sbc *s+imm8 9E 3 C-=*(S+imm8), set flags sbc *s+imm8 9E 3 C-=*(S+imm8), set flags
acc *s+imm8 B5 3 A+=*(S+imm8)+CF, set flags acc *s+imm8 B5 3 A+=*(S+imm8)+CF, set flags
scc *s+imm8 B7 3 A-=*(S+imm8)+CF, set flags scc *s+imm8 B7 3 A-=*(S+imm8)+CF, set flags
cmp *s+imm8 B0 3 set flags according to A-*(S+imm8) cmp *s+imm8 B0 3 set flags according to A-*(S+imm8)
and *s+imm8 B1 3 A&=*(S+imm8), set zero flag and *s+imm8 B1 3 A&=*(S+imm8), set zero flag
ior *s+imm8 B2 3 A|=*(S+imm8), set zero flag ior *s+imm8 B2 3 A|=*(S+imm8), set zero flag
xor *s+imm8 B3 3 A^=*(S+imm8), set zero flag xor *s+imm8 B3 3 A^=*(S+imm8), set zero flag
ann *s+imm8 B4 3 A&=~*(S+imm8), set zero flag ann *s+imm8 B4 3 A&=~*(S+imm8), set zero flag
shl *s+imm8 D5 3 A<<=*(S+imm8), set zero flag shl *s+imm8 D5 3 A<<=*(S+imm8), set zero flag
shr *s+imm8 D6 3 A<<=*(S+imm8), set zero flag shr *s+imm8 D6 3 A<<=*(S+imm8), set zero flag
rol *s+imm8 D7 3 A<<<=*(S+imm8), set zero flag rol *s+imm8 D7 3 A<<<=*(S+imm8), set zero flag
ror *s+imm8 D8 3 A>>>=*(S+imm8), set zero flag ror *s+imm8 D8 3 A>>>=*(S+imm8), set zero flag
sra *s+imm8 D9 3 A>>a=*(S+imm8), set zero flag sra *s+imm8 D9 3 A>>a=*(S+imm8), set zero flag
add b A0 1 A+=B, set flags add b A0 1 A+=B, set flags
adc b 9F 1 C+=B, set flags adc b 9F 1 C+=B, set flags
sub b A1 1 A-=B, set flags sub b A1 1 A-=B, set flags
sbc b B6 1 C-=B, set flags sbc b B6 1 C-=B, set flags
acc b B8 1 A+=B+CF, set flags acc b B8 1 A+=B+CF, set flags
scc b B9 1 A-=B+CF, set flags scc b B9 1 A-=B+CF, set flags
cmp b A2 1 set flags according to A-B cmp b A2 1 set flags according to A-B
and b A3 1 A&=B, set zero flag and b A3 1 A&=B, set zero flag
ior b A4 1 A|=B, set zero flag ior b A4 1 A|=B, set zero flag
xor b A5 1 A^=B, set zero flag xor b A5 1 A^=B, set zero flag
ann b A6 1 A&=~B, set zero flag ann b A6 1 A&=~B, set zero flag
shl b DA 1 A<<=B, set zero flag shl b DA 1 A<<=B, set zero flag
shr b DB 1 A>>=B, set zero flag shr b DB 1 A>>=B, set zero flag
rol b DC 1 A<<<=B, set zero flag rol b DC 1 A<<<=B, set zero flag
ror b DD 1 A>>>=B, set zero flag ror b DD 1 A>>>=B, set zero flag
sra b DE 1 A>>a=B, set zero flag sra b DE 1 A>>a=B, set zero flag
add c A7 1 A+=C, set flags add c A7 1 A+=C, set flags
adb c BD 1 B+=C, set flags adb c BD 1 B+=C, set flags
sub c A8 1 A-=C, set flags sub c A8 1 A-=C, set flags
sbb c BC 1 B-=C, set flags sbb c BC 1 B-=C, set flags
acc c BA 1 A+=C+CF, set flags acc c BA 1 A+=C+CF, set flags
scc c BB 1 A-=C+CF, set flags scc c BB 1 A-=C+CF, set flags
cmp c A9 1 set flags according to A-C cmp c A9 1 set flags according to A-C
and c AA 1 A&=C, set zero flag and c AA 1 A&=C, set zero flag
ior c AB 1 A|=C, set zero flag ior c AB 1 A|=C, set zero flag
xor c AC 1 A^=C, set zero flag xor c AC 1 A^=C, set zero flag
ann c AD 1 A&=~C, set zero flag ann c AD 1 A&=~C, set zero flag
shl c DF 1 A<<=C, set zero flag shl c DF 1 A<<=C, set zero flag
shr c 4D 1 A>>=C, set zero flag shr c 4D 1 A>>=C, set zero flag
rol c 3E 1 A<<<=C, set zero flag rol c 3E 1 A<<<=C, set zero flag
ror c 3F 1 A>>>=C, set zero flag ror c 3F 1 A>>>=C, set zero flag
sra c 2F 1 A>>a=C, set zero flag sra c 2F 1 A>>a=C, set zero flag
adb a BE 1 B+=A, set flags adb a BE 1 B+=A, set flags
sbb a BF 1 B-=A, set flags sbb a BF 1 B-=A, set flags
adc a 4E 1 C+=A, set flags adc a 4E 1 C+=A, set flags
sbc a 4F 1 C-=A, set flags sbc a 4F 1 C-=A, set flags
Jumps (J): Jumps (J):
jmp imm16 60 3 I=imm16 jmp imm16 60 3 I=imm16
jsr imm16 63 3 I=imm16, Q=I jsr imm16 63 3 I=imm16, Q=I
jss imm16 E2 5 I=imm16, *(S++++)=I-1 jss imm16 E2 5 I=imm16, *(S++++)=I-1
jmp p 64 1 I=P jmp p 64 1 I=P
jmp q 66 1 I=Q jmp q 66 1 I=Q
jsr p 65 1 I=P, Q=I jsr p 65 1 I=P, Q=I
jsr q 67 1 I=Q, Q=I jsr q 67 1 I=Q, Q=I
jss p E4 3 I=P, *(S++++)=I-1 jss p E4 3 I=P, *(S++++)=I-1
jss q E5 3 I=Q, *(S++++)=I-1 jss q E5 3 I=Q, *(S++++)=I-1
rts E1 3 I=*(----S)+1 rts E1 3 I=*(----S)+1
jpr imm8 31 2 I+=imm8 jpr imm8 31 2 I+=imm8
jnz imm8 30 2 I+=imm8 if !Zero jnz imm8 30 2 I+=imm8 if !Zero
jpz imm8 32 2 I+=imm8 if Zero jpz imm8 32 2 I+=imm8 if Zero
jge imm8 33 2 I+=imm8 if !Carry jge imm8 33 2 I+=imm8 if !Carry
jlt imm8 34 2 I+=imm8 if Carry jlt imm8 34 2 I+=imm8 if Carry
jgt imm8 35 2 I+=imm8 if !Zero & !Carry jgt imm8 35 2 I+=imm8 if !Zero & !Carry
jle imm8 36 2 I+=imm8 if Zero | Carry jle imm8 36 2 I+=imm8 if Zero | Carry
Stack (S): Stack (S):
psh a 40 2 *(S++)=A psh a 40 2 *(S++)=A
psh b 44 2 *(S++)=B psh b 44 2 *(S++)=B
psh c 45 2 *(S++)=C psh c 45 2 *(S++)=C
psh f E9 2 *(S++)=F psh f E9 2 *(S++)=F
psh p 41 3 *(S++++)=P psh p 41 3 *(S++++)=P
psh q 46 3 *(S++++)=Q psh q 46 3 *(S++++)=Q
pop a 42 2 A=*(--S) pop a 42 2 A=*(--S)
pop b 47 2 B=*(--S) pop b 47 2 B=*(--S)
pop c 48 2 C=*(--S) pop c 48 2 C=*(--S)
pop f EA 2 F=*(--S) pop f EA 2 F=*(--S)
pop p 43 3 P=*(----S) pop p 43 3 P=*(----S)
pop q 49 3 Q=*(----S) pop q 49 3 Q=*(----S)
psh imm8 3B 3 *(S++)=imm8 psh imm8 3B 3 *(S++)=imm8
phw imm16 3C 5 *(S++++)=imm16 phw imm16 3C 5 *(S++++)=imm16
8-bit Load/Store (B): 8-bit Load/Store (B):
lda imm8 20 2 A=imm8, update zero flag lda imm8 20 2 A=imm8, update zero flag
ldb imm8 26 2 B=imm8, update zero flag ldb imm8 26 2 B=imm8, update zero flag
ldc imm8 27 2 C=imm8, update zero flag ldc imm8 27 2 C=imm8, update zero flag
lda *s+imm8 28 3 A=*s+imm8, update zero flag lda *s+imm8 28 3 A=*s+imm8, update zero flag
ldb *s+imm8 29 3 B=*s+imm8, update zero flag ldb *s+imm8 29 3 B=*s+imm8, update zero flag
ldc *s+imm8 2A 3 C=*s+imm8, update zero flag ldc *s+imm8 2A 3 C=*s+imm8, update zero flag
sta *s+imm8 96 3 *s+imm8=A sta *s+imm8 96 3 *s+imm8=A
stb *s+imm8 97 3 *s+imm8=B stb *s+imm8 97 3 *s+imm8=B
stc *s+imm8 98 3 *s+imm8=C stc *s+imm8 98 3 *s+imm8=C
lda *imm16 51 4 A=*imm16, update zero flag lda *imm16 51 4 A=*imm16, update zero flag
ldb *imm16 56 4 B=*imm16, update zero flag ldb *imm16 56 4 B=*imm16, update zero flag
ldc *imm16 57 4 C=*imm16, update zero flag ldc *imm16 57 4 C=*imm16, update zero flag
sta *imm16 50 4 *imm16=A sta *imm16 50 4 *imm16=A
stb *imm16 58 4 *imm16=B stb *imm16 58 4 *imm16=B
stc *imm16 59 4 *imm16=C stc *imm16 59 4 *imm16=C
sta *p 52 2 *P=A sta *p 52 2 *P=A
stb *p 5A 2 *P=B stb *p 5A 2 *P=B
stc *p 5B 2 *P=C stc *p 5B 2 *P=C
sta *q 54 2 *Q=A sta *q 54 2 *Q=A
stb *q 5C 2 *Q=B stb *q 5C 2 *Q=B
stc *q 5D 2 *Q=C stc *q 5D 2 *Q=C
lda *p 53 2 A=*P, update zero flag lda *p 53 2 A=*P, update zero flag
ldb *p 5E 2 B=*P, update zero flag ldb *p 5E 2 B=*P, update zero flag
ldc *p 5F 2 C=*P, update zero flag ldc *p 5F 2 C=*P, update zero flag
lda *q 55 2 A=*Q, update zero flag lda *q 55 2 A=*Q, update zero flag
ldb *q 61 2 B=*Q, update zero flag ldb *q 61 2 B=*Q, update zero flag
ldc *q 62 2 C=*Q, update zero flag ldc *q 62 2 C=*Q, update zero flag
sta *p++ C0 2 *P++=A sta *p++ C0 2 *P++=A
stb *p++ C1 2 *P++=B stb *p++ C1 2 *P++=B
stc *p++ C2 2 *P++=C stc *p++ C2 2 *P++=C
sta *q++ C3 2 *Q++=A sta *q++ C3 2 *Q++=A
stb *q++ C4 2 *Q++=B stb *q++ C4 2 *Q++=B
stc *q++ C5 2 *Q++=C stc *q++ C5 2 *Q++=C
lda *p++ C6 2 A=*P++, update zero flag lda *p++ C6 2 A=*P++, update zero flag
ldb *p++ C7 2 B=*P++, update zero flag ldb *p++ C7 2 B=*P++, update zero flag
ldc *p++ C8 2 C=*P++, update zero flag ldc *p++ C8 2 C=*P++, update zero flag
lda *q++ C9 2 A=*Q++, update zero flag lda *q++ C9 2 A=*Q++, update zero flag
ldb *q++ CA 2 B=*Q++, update zero flag ldb *q++ CA 2 B=*Q++, update zero flag
ldc *q++ CB 2 C=*Q++, update zero flag ldc *q++ CB 2 C=*Q++, update zero flag
16-bit Load/Store (W): 16-bit Load/Store (W):
ldp imm16 21 3 P=imm16 ldp imm16 21 3 P=imm16
ldq imm16 23 3 Q=imm16 ldq imm16 23 3 Q=imm16
lds imm16 25 3 S=imm16 lds imm16 25 3 S=imm16
ldv imm16 22 3 V=imm16 ldv imm16 22 3 V=imm16
ldp *s+imm8 7A 4 P=*S+imm8 ldp *s+imm8 7A 4 P=*S+imm8
ldq *s+imm8 7B 4 Q=*S+imm8 ldq *s+imm8 7B 4 Q=*S+imm8
stp *s+imm8 7E 4 *S+imm8=P stp *s+imm8 7E 4 *S+imm8=P
stq *s+imm8 7F 4 *S+imm8=Q stq *s+imm8 7F 4 *S+imm8=Q
ldp *imm16 68 5 P=*imm16 ldp *imm16 68 5 P=*imm16
ldq *imm16 6A 5 Q=*imm16 ldq *imm16 6A 5 Q=*imm16
stp *imm16 6C 5 *imm16=P stp *imm16 6C 5 *imm16=P
stq *imm16 6E 5 *imm16=Q stq *imm16 6E 5 *imm16=Q
ldp *p 92 3 P=*P ldp *p 92 3 P=*P
ldq *p 93 3 Q=*P ldq *p 93 3 Q=*P
ldp *q 94 3 P=*Q ldp *q 94 3 P=*Q
ldq *q 95 3 Q=*Q ldq *q 95 3 Q=*Q
stp *q 7C 3 *Q=P stp *q 7C 3 *Q=P
stq *p 7D 3 *P=Q stq *p 7D 3 *P=Q
ldq *p++ CC 3 Q=*P++++ ldq *p++ CC 3 Q=*P++++
ldp *q++ CD 3 P=*Q++++ ldp *q++ CD 3 P=*Q++++
stp *q++ CE 3 *Q++++=P stp *q++ CE 3 *Q++++=P
stq *p++ CF 3 *P++++=Q stq *p++ CF 3 *P++++=Q
Moves (M): Moves (M):
lda b 80 1 A=B lda b 80 1 A=B
lda c 81 1 A=C lda c 81 1 A=C
ldb a 82 1 B=A ldb a 82 1 B=A
ldb c 83 1 B=C ldb c 83 1 B=C
ldc a 84 1 C=A ldc a 84 1 C=A
ldc b 85 1 C=B ldc b 85 1 C=B
lda pl 86 1 A=P&FF lda pl 86 1 A=P&FF
lda ph 87 1 A=P>>8 lda ph 87 1 A=P>>8
lda ql 88 1 A=Q&FF lda ql 88 1 A=Q&FF
lda qh 89 1 A=Q>>8 lda qh 89 1 A=Q>>8
ldb pl 37 1 B=P&FF ldb pl 37 1 B=P&FF
ldc ph 38 1 C=P>>8 ldc ph 38 1 C=P>>8
ldb ql 39 1 B=Q&FF ldb ql 39 1 B=Q&FF
ldc qh 3A 1 C=Q>>8 ldc qh 3A 1 C=Q>>8
ldp q 8A 1 P=Q ldp q 8A 1 P=Q
ldp s 8B 1 P=S ldp s 8B 1 P=S
ldp v 8C 1 P=V ldp v 8C 1 P=V
ldp i 8D 1 P=I ldp i 8D 1 P=I
ldp cb 91 1 P=(C<<8)+B ldp cb 91 1 P=(C<<8)+B
ldq cb E0 1 Q=(C<<8)+B ldq cb E0 1 Q=(C<<8)+B
ldq p 8E 1 Q=P ldq p 8E 1 Q=P
lds p 8F 1 S=P lds p 8F 1 S=P
ldv p 90 1 V=P ldv p 90 1 V=P
Opcodes used: 228/255 Opcodes used: 228/255
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