diff --git a/assembler-8608.lua b/assembler-8608.lua index c51560e..8a99e16 100644 --- a/assembler-8608.lua +++ b/assembler-8608.lua @@ -1,6 +1,4 @@ -local arch8608 = require("rom-8608-defs") - local function loadutf8table(fn) local tt = {} for l in io.lines(fn) do if l~="" then @@ -10,7 +8,7 @@ local function loadutf8table(fn) end end return tt end -local utf8table = loadutf8table("./utf8table.txt") +local utf8table = loadutf8table((RelPath or "./").."utf8table.txt") local function trim(s) return s:gsub("^ +", ""):gsub(" +$", "").."" end local function getutf8len(c) @@ -29,19 +27,25 @@ local function validWordsFromInstrs(instrs) end return words end +local function lobyte(n) return n%256 end +local function hibyte(n) return math.floor(n/256) end local function decodeNumber(n) n = trim(n) local sign = 1; if n:sub(1, 1)=="-" then sign = -1; n = n:sub(2, #n); end; - if n:sub(1, 1)=="$" then return sign*(tonumber(n:sub(2, #n ), 16) or error("invalid hex number "..n)), math.ceil((#n-1)/2) - elseif n:sub(1, 2)=="0x" then return sign*(tonumber(n:sub(3, #n ), 16) or error("invalid hex number "..n)), math.ceil((#n-2)/2) - elseif n:sub(#n, #n)=="h" then return sign*(tonumber(n:sub(1, #n-1), 16) or error("invalid hex number "..n)), math.ceil((#n-1)/2) - elseif n:sub(1, 2)=="0b" then return sign*(tonumber(n:sub(3, #n ), 2) or error("invalid binary number "..n)), math.ceil((#n-2)/8) - elseif n:sub(#n, #n)=="b" then return sign*(tonumber(n:sub(1, #n-1), 2) or error("invalid binary number "..n)), math.ceil((#n-1)/8) - else + if n:sub(1, 1)=="$" then return sign*(tonumber(n:sub(2, #n ), 16) or error("invalid hex number "..n)), math.ceil((#n-1)/2) + elseif n:sub(1, 2)=="0x" then return sign*(tonumber(n:sub(3, #n ), 16) or error("invalid hex number "..n)), math.ceil((#n-2)/2) + elseif n:sub(#n, #n)=="h" and n:find("^[0-9a-fA-F]+h$") then return sign*(tonumber(n:sub(1, #n-1), 16) or error("invalid hex number "..n)), math.ceil((#n-1)/2) + elseif n:sub(1, 2)=="0b" then return sign*(tonumber(n:sub(3, #n ), 2) or error("invalid binary number "..n)), math.ceil((#n-2)/8) + elseif n:sub(#n, #n)=="b" and n:find("^[01]+b$") then return sign*(tonumber(n:sub(1, #n-1), 2) or error("invalid binary number "..n)), math.ceil((#n-1)/8) + elseif n:sub(1, 3)=="lo(" and n:sub(#n, #n)==")" then return lobyte(decodeNumber(n:sub(4, #n-1))), 1 + elseif n:sub(1, 3)=="hi(" and n:sub(#n, #n)==")" then return hibyte(decodeNumber(n:sub(4, #n-1))), 1 + elseif n:find("^[0-9]+$") then local v = sign*(tonumber(n) or error("invalid decimal number "..n)) if v>=-128 and v<=255 then return v, 1 elseif v>=-32768 and v<=65535 then return v, 2 else error("out-of-range number "..v) end + else + return nil end end local function mnemFromLine(line, instrs, validWords) @@ -49,6 +53,7 @@ local function mnemFromLine(line, instrs, validWords) local function addNum(n) n = trim(n) local val, len = decodeNumber(n) + assert(val and len, "invalid number "..n) local linei8 = line:gsub(n, "imm8", 1, true):lower() local linei16 = line:gsub(n, "imm16", 1, true):lower() if len==1 and (not instrs[linei8]) and instrs[linei16] then len = 2 end @@ -134,12 +139,15 @@ end local directiveFunctions = { fn = function(state, fn) state.fileName = fn end, ln = function(state, ln) state.lineNum = tonumber(ln) end, - org = function(state, addr) state.curAddr = decodeNumber(addr) end, + org = function(state, addr) state.curAddr = decodeNumber(addr) or error("Invalid origin \""..addr.."\"") end, align = function(state, alns) local aln = decodeNumber(alns); if state.curAddr % aln ~= 0 then state.curAddr = state.curAddr + (aln - state.curAddr%aln) end end, define = true, space = function(state, amts) local amt = decodeNumber(amts); state.curAddr = state.curAddr + amt; end, } -local function assembleCode(code, instrs) +local function postEvaluateExpression(expr, labels) + +end +local function assembleCode(code, instrs, uexprs) local validWords = validWordsFromInstrs(instrs) local state = { @@ -169,11 +177,19 @@ local function assembleCode(code, instrs) end for _, rep in ipairs(state.labelReplacements) do - local labelAddr = state.labelAddrs[rep.name] or error("no label named "..rep.name) - state.curAddr = rep.addr - if rep.len==1 then addByte(state, labelAddr-(rep.addr+1), rep.isCode) - elseif rep.len==2 then addWord(state, labelAddr , rep.isCode) - else error("invalid labelreplace len") end + local expr = uexprs[rep.name] + if expr then + local val = postEvaluateExpression(expr, state.labelAddrs) + if rep.len==1 then addByte(state, val, rep.isCode) + elseif rep.len==2 then addWord(state, val, rep.isCode) + else error("invalid expr replace len "..rep.len) end + else + local labelAddr = state.labelAddrs[rep.name] or error("no label named "..rep.name) + state.curAddr = rep.addr + if rep.len==1 then addByte(state, labelAddr-(rep.addr+1), rep.isCode) + elseif rep.len==2 then addWord(state, labelAddr , rep.isCode) + else error("invalid labelreplace len "..rep.len) end + end end return state.memory, state.codeMap @@ -190,7 +206,7 @@ end local function separateCommas(l) local c = {}; for a in l:gmatch("[^,]+") do table.insert(c, trim(a)) end; return c; end -local function evaluateExpression(expr) +local function evaluateExpression(expr, uexprs) expr = expr:gsub("[^%+%-%*%/]+", function(word) local val = decodeNumber(word) or error("invalid number in expression: "..word) return val @@ -267,18 +283,23 @@ local function preprocessCode(code) code = code:gsub("\\", "\n") + local uexprs = {} + local codet = {} local exprt = {} local parenLevel = 0 for i = 1, #code do local c = code:sub(i, i) if c=="(" then + if parenLevel>0 then table.insert(exprt, c) end parenLevel = parenLevel+1 elseif c==")" then parenLevel = parenLevel-1 if parenLevel==0 then - table.insert(codet, evaluateExpression(table.concat(exprt))) + table.insert(codet, evaluateExpression(table.concat(exprt), uexprs)) exprt = {} + else + table.insert(exprt, c) end else if parenLevel==0 then table.insert(codet, c) @@ -287,7 +308,7 @@ local function preprocessCode(code) end code = table.concat(codet) - return code + return code, uexprs end local function fixCode(code) code = code:gsub(",", " ") @@ -322,6 +343,14 @@ local function prefixCode(code, fn) -- fix strings, add line numbers local utf8str = "" local utf8len = 0 + local function newline() + lastnl = true + for _, v in ipairs(outnextnl) do + if v=="\n" and skipnl then out("\\") + else out(v) end + end; outnextnl = {}; + end + out(".ln 1"); out("\n"); for i = 1, #code do local c = code:sub(i, i) @@ -333,11 +362,7 @@ local function prefixCode(code, fn) -- fix strings, add line numbers elseif c=="\n" or (c=="/" and cn~="/" and cn~="*") then linenum = linenum+1 if not skipnl then out("\n") out(".ln "..linenum); out("\n"); end - lastnl = true - for _, v in ipairs(outnextnl) do - if v=="\n" and skipnl then out("\\") - else out(v) end - end; outnextnl = {}; + newline() skipnl = false elseif c=="#" or c==";" or (c=="/" and cn=="/") then state = "comment" elseif c=="/" and cn=="*" then state = "commentml" @@ -362,7 +387,7 @@ local function prefixCode(code, fn) -- fix strings, add line numbers bracehasmid[#bracestack] = true else error("invalid char "..c) end elseif state=="comment" then - if c=="\n" then state = "code" out("\n") lastnl = true end + if c=="\n" then state = "code" out("\n") newline() end elseif state=="commentml" then if c=="/" and cp=="*" then state = "code" end elseif state=="string" then @@ -401,6 +426,7 @@ local function includeFile(fn) local fnf = fixFilename(fn) code = ".fn "..fnf.."\n"..code code = code:gsub(".include ([^\r\n]+)", function(fn2) + fn2 = fn:gsub("[^\\/]+$", "")..fn2 return "\n"..includeFile(fn2).."\n"..".fn "..fnf.."\n" end) return code @@ -437,10 +463,10 @@ local function instrsFromArch(arch) end local function assembleFile(fn, arch) local code = includeFile(fn) - code = preprocessCode(code) + code, uexprs = preprocessCode(code) code = fixCode(code) local instrs = instrsFromArch(arch) - local mem, code = assembleCode(code, instrs) + local mem, code = assembleCode(code, instrs, uexprs) return mem, code end @@ -457,7 +483,6 @@ local function mnemsFromArch(arch) end local function toSigned8(x) return x>=128 and x-256 or x end local function disassembleMemory(mem, code, arch) - print("Disassembly:") local mnems = mnemsFromArch(arch) local addr = 0 @@ -494,6 +519,7 @@ local function disassembleMemory(mem, code, arch) else jmp.name = "subroutine_"..subnum ; subnum = subnum +1; end end + local lines = {} addr = 0 while addr<=0xFFFF do local startaddr = addr @@ -540,12 +566,12 @@ local function disassembleMemory(mem, code, arch) local jmp = jmpaddrs[startaddr] if jmp then label = jmp.name..":" end local lb = table.concat(lineb, " ") - if lastaddr~=addr-tlen then print("...") end - print(string.format("%04X", addr-tlen).." | "..(" "):rep(8-#lb)..lb.." | "..(" "):rep(13-#label)..label.." "..table.concat(line, " ")) + if lastaddr~=addr-tlen then table.insert(lines, "...") end + table.insert(lines, string.format("%04X", addr-tlen).." | "..(" "):rep(8-#lb)..lb.." | "..(" "):rep(13-#label)..label.." "..table.concat(line, " ")) lastaddr = addr end end - print() + return table.concat(lines, "\n") end local function memToHex(hex) local mem = {} @@ -557,7 +583,7 @@ local function memToHex(hex) return mem end local function disassembleHex(hex, arch) - disassembleMemory(memToHex(hex), arch) + return disassembleMemory(memToHex(hex), arch) end local printableCharsS = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789`-=[]\\;\',./~!@#$%^&*()_+{}|:\"<> " @@ -567,14 +593,14 @@ local function toPrintableChar(n) return printableChars[c] and c or "?" end local function printMemory(mem) - print("Memory Dump:") local anynonempty = false local lastbase = -16 local lastline = "" local numreps = 0 + local lines = {} local function closereps(base) if numreps~=0 then - print("(repeated "..numreps.." more times, up to "..string.format("%04X", base+15)..")") + table.insert(lines, "(repeated "..numreps.." more times, up to "..string.format("%04X", base+15)..")") numreps = 0 end end @@ -601,8 +627,8 @@ local function printMemory(mem) local l = table.concat(line) if l~=lastline or base~=lastbase+16 then closereps(base-16) - if base ~= lastbase+16 then print("...") end - print(string.format("%04X", base).." | "..l.." | "..table.concat(strt)) + if base ~= lastbase+16 then table.insert(lines, "...") end + table.insert(lines, string.format("%04X", base).." | "..l.." | "..table.concat(strt)) else numreps = numreps+1 end @@ -612,10 +638,12 @@ local function printMemory(mem) end end closereps(lastbase) - if not anynonempty then print("Empty") end - print() + if not anynonempty then table.insert(lines, "Empty") end + + return table.concat(lines, "\n") end +local HasTs = ts~=nil local ts = ts or { call = function() end, eval = function() end, @@ -656,17 +684,30 @@ local function buildMemory(mem, romsize, offset, len) end local function strtovec(str) local v = {}; for word in str:gmatch("[^ \t\r\n]+") do table.insert(v, tonumber(word)) end; return v; end -function AssembleFile(fn, romsizes, offsets, lens) local offset = tonumber(offsets); local len = tonumber(lens); local romsize = strtovec(romsizes); - local arch = arch8608 - local mem, code = assembleFile(fn, arch) - print(""..fn:match("[^/\\]+$").."\n") - printMemory(mem) - assert(#romsize==3, "incorrect rom size") - buildMemory(mem, romsize, offset, len) - disassembleMemory(mem, code, arch) +if HasTs or (not AsmIncluded) then + function AssembleBuildFile(fn, romsizes, offsets, lens) local offset = tonumber(offsets); local len = tonumber(lens); local romsize = strtovec(romsizes); + local arch = require("rom-8608-defs") + local mem, code = assembleFile(fn, arch) + print(""..fn:match("[^/\\]+$").."\n") + + print("Memory Dump:") + print(printMemory(mem)) + print() + print("Disassembly:") + print(disassembleMemory(mem, code, arch)) + print() + + assert(#romsize==3, "incorrect rom size") + buildMemory(mem, romsize, offset, len) + end + ts.eval [[ + function AssembleBuildFile(%fn, %romsize, %offset, %len) { luacall("AssembleBuildFile", strReplace(%fn, "$", "Add-ons/_misc/rom/8608programs/"), %romsize, %offset, %len); } + ]] + AssembleBuildFile(arg[1] or "../8608programs/test.asm", "16 16 8", "0", "256") end -ts.eval [[ - function AssembleFile(%fn, %romsize, %offset, %len) { luacall("AssembleFile", strReplace(%fn, "$", "Add-ons/_misc/rom/8608programs/"), %romsize, %offset, %len); } -]] -if arg then AssembleFile(arg[1] or "../8608programs/test.asm", "16 16 8", "0", "256") end +return { + assembleFile = assembleFile, + disassembleMemory = disassembleMemory, + printMemory = printMemory, +} diff --git a/emulator/8608emulator.bat b/emulator/8608emulator.bat new file mode 100644 index 0000000..62a8f4f --- /dev/null +++ b/emulator/8608emulator.bat @@ -0,0 +1,3 @@ +luajit gendefs.lua +gcc 8608emulator.c -shared -Ofast -o 8608emulator.dll +pause diff --git a/emulator/8608emulator.c b/emulator/8608emulator.c new file mode 100644 index 0000000..7273ae0 --- /dev/null +++ b/emulator/8608emulator.c @@ -0,0 +1,145 @@ + +#define lobyte(x) (x&0xFF) +#define hibyte(x) ((x>>8)&0xFF) +#define wordfrombytes(h,l) (((h<<8)&0xFF00)|(l&0xFF)) +#define popbyte readmemory(--cpu->s) +#define loadimmed readmemory(cpu->i++) +#define loadstackrel readmemory((cpu->s+signed8(cpu->t))%65536) +#define loadstackrelp1 readmemory((cpu->s+signed8(cpu->t)+1)%65536) +#define wordut (wordfrombytes(cpu->u, cpu->t)) +#define wordcb (wordfrombytes(cpu->c, cpu->b)) +#define loadut readmemory(wordut) +#define loadutp1 readmemory((wordut+1)%65536) +#define loadp readmemory(cpu->p) +#define loadpinc readmemory(cpu->p++) +#define loadpp1 readmemory((cpu->p+1)%65536) +#define loadq readmemory(cpu->q) +#define loadqinc readmemory(cpu->q++) +#define loadqp1 readmemory((cpu->q+1)%65536) +#define signed8(x) (x>=128 ? x|0xFF00 : x) + +#define setzf(x) cpu->nz=(x!=0); +#define loadimmedt cpu->t = loadimmed; +#define loadimm161 cpu->u = loadimmed; +#define loadimm162 cpu->t = loadimmed; +#define loadstackrelu cpu->u = loadstackrel; +#define storestackrel(x) writememory(cpu->s+signed8(cpu->t), x); +#define storestackrel161(x) writememory((cpu->s+signed8(cpu->t) )%65536, hibyte(x)); +#define storestackrel162(x) writememory((cpu->s+signed8(cpu->t)+1)%65536, lobyte(x)); +#define loadstackrel161 cpu->u=loadstackrel; +#define loadstackrel162 cpu->t=loadstackrelp1; +#define storeut(x) writememory(wordut, x); +#define storeutp1(x) writememory((wordut+1)%65536, x); +#define storep(x) writememory(cpu->p, x); +#define storepinc(x) writememory(cpu->p++, x); +#define storepp1(x) writememory((cpu->p+1)%65536, x); +#define storeq(x) writememory(cpu->q, x); +#define storeqinc(x) writememory(cpu->q++, x); +#define storeqp1(x) writememory((cpu->q+1)%65536, x); +#define pushretaddr1 writememory(cpu->s++, hibyte(cpu->i)); +#define pushretaddr2 writememory(cpu->s++, lobyte(cpu->i)); +#define lni cpu->instr = readmemory(cpu->i++); cpu->cycle = 0; +#define ldi cpu->instr = readmemory(cpu->i); cpu->cycle = 0; +#define addf(x,y) { x=(x+y); cpu->cf=x>=256; x&=0xFF; setzf(x); } +#define subf(x,y) addf(x,-y); +#define cmpf(x,y) { int t=x-y; cpu->cf=(t>=256); setzf(t); } +#define rol(x,y) x=(x<>(8-y)); +#define ror(x,y) x=(x>>y)|(x<<(8-y)); +#define sra(x,y) x=(x>>y); +#define jmpabsp cpu->i=cpu->p; lni; +#define jmpabsq cpu->i=cpu->q; lni; +#define jmpabsut cpu->i=wordut; lni; +#define jmpabsutplus1 cpu->i=(wordut+1)%65536; lni; +#define pushbyte(b) writememory(cpu->s++, b); +#define push161(x) pushbyte(hibyte(x)); +#define push162(x) pushbyte(lobyte(x)); +#define pop161 cpu->t=popbyte; +#define pop162 cpu->u=popbyte; +#define tst(x) cpu->cf = x>=128; cpu->nz = x!=0; +#define instrpreload cpu->instrpre = loadimmed; +#define instrloadpre cpu->instr = cpu->instrpre; +#define jmprelt cpu->i = (cpu->i + signed8(cpu->t))%65536; lni; +#define saveretaddr cpu->q = (cpu->i+1)%65536; + +#define readmemory(x) _readmemory(cpu, mem, x) +#define writememory(x, y) _writememory(cpu, mem, x, y) + +struct CPU { + int a; + int b; + int c; + int u; + int t; + int p; + int q; + int s; + int v; + int i; + int cf; + int nz; + int irq; + int ifg; + int rfg; + int instr; + int cycle; + int instrpre; + int tick; +}; +struct Event { + int id; + int addr; +}; +struct Memory { + int data[65536]; + int canwrite[65536]; + int writes[65536]; + int reads[65536]; + int onread[65536]; + int onwrite[65536]; + struct Event events[4096]; + int numevents; +}; + +void postEvent(struct Memory* const mem, int id, int addr) { + if(mem->numevents<4096) { + mem->events[mem->numevents].id = id; + mem->events[mem->numevents].addr = addr; + mem->numevents++; + } +} +int _readmemory(const struct CPU* const cpu, struct Memory* const mem, const int addr) { + int addr2 = addr%65536; + mem->reads[addr2] = cpu->tick; + if(mem->onread[addr2]) { + postEvent(mem, mem->onread[addr2], addr2); + } + return mem->data[addr2]; +} +int _writememory(const struct CPU* const cpu, struct Memory* const mem, const int addr, const int data) { + int addr2 = addr%65536; + if(mem->canwrite[addr2]) { + mem->writes[addr2] = cpu->tick; + mem->data[addr2] = data%256; + } + if(mem->onwrite[addr2]) { + postEvent(mem, mem->onwrite[addr2], addr2); + } +} + +typedef void(*CPUInstruction)(struct CPU* const cpu, struct Memory* const mem); + +#include "instructions_gen.c" + +int TickCPU(struct CPU* const cpu, struct Memory* const mem, const int count, const int countinstrs) { + int i = 0; + while(iirq && !cpu->ifg && cpu->cycle==0) { cpu->instr = 0xF2; } + if(cpu->rfg || cpu->ifg || cpu->irq) { + CPUInstruction instr = CPUInstructions[cpu->instr][cpu->cycle]; + if(instr) instr(cpu, mem); + if(!countinstrs || cpu->cycle==0) { i++; } + } else { i = count; break; } + if(mem->numevents!=0) { break; } + } + return count-i; +} diff --git a/emulator/8608emulator.dll b/emulator/8608emulator.dll new file mode 100644 index 0000000..28a156c Binary files /dev/null and b/emulator/8608emulator.dll differ diff --git a/emulator/8608emulator.lua b/emulator/8608emulator.lua new file mode 100644 index 0000000..1b089c9 --- /dev/null +++ b/emulator/8608emulator.lua @@ -0,0 +1,562 @@ +--love 1 + +require("colorset") +local ffi = require("ffi") +RelPath = "../" +AsmIncluded = true +local asm = dofile("../assembler-8608.lua") +local Arch = dofile("../rom-8608-defs.lua") + +local lg = love.graphics +local li = love.image +local le = love.event +local lt = love.timer + +---- +local function InitColorset() + for i = 0, 63 do + local c = ColorSet[i+1] + ColorSet[i] = { + c[1]/255, + c[2]/255, + c[3]/255, + } + ColorSet[i+1] = nil + end +end + +local eventTypes = {} +local function registerEvent(mem, addrFirst, addrLast, read, write, func) + table.insert(eventTypes, func) + local id = #eventTypes + for addr = addrFirst, addrLast do + if read then mem.c.onread [addr] = id end + if write then mem.c.onwrite[addr] = id end + end +end +local function handleEvents(cpu, mem) + for i = 0, mem.c.numevents-1 do + local event = mem.c.events[i] + eventTypes[event.id](event.addr, cpu, mem) + end + mem.c.numevents = 0 +end + +local RegDisplay = { + scrX = 384+16, scrY = 32, + width = 128, height = 192, + fontWidth = 8, fontHeight = 12, + registers = { + { name = "A" , idx = "a" , x=8,y=8 ,w=2}, + { name = "B" , idx = "b" , x=8,y=8+16 ,w=2}, + { name = "C" , idx = "c" , x=8,y=8+16* 2,w=2}, + { name = "U" , idx = "u" , x=8,y=8+16* 3,w=2}, + { name = "T" , idx = "t" , x=8,y=8+16* 4,w=2}, + { name = "P" , idx = "p" , x=8,y=8+16* 5,w=4}, + { name = "Q" , idx = "q" , x=8,y=8+16* 6,w=4}, + { name = "S" , idx = "s" , x=8,y=8+16* 7,w=4}, + { name = "V" , idx = "v" , x=8,y=8+16* 8,w=4}, + { name = "I" , idx = "i" , x=8,y=8+16* 9,w=4}, + { name = "Ins", idx = "instr", x=8,y=8+16*10,w=2}, + { name = "Cyc", idx = "cycle", x=64+8-16,y=8+16*10,w=2}, + }, + flags = { + { name = "CF" , idx = "cf" , x=64+8,y=8 }, + { name = "NZ" , idx = "nz" , x=64+8,y=8+16 }, + { name = "IRQ", idx = "irq", x=64+8,y=8+16*2}, + { name = "Int", idx = "ifg", x=64+8,y=8+16*3}, + { name = "Run", idx = "rfg", x=64+8,y=8+16*4}, + }, +} +local function InitRegDisplay(rd) + lg.print("Registers", rd.scrX, rd.scrY-16) + lg.rectangle("line", rd.scrX, rd.scrY, rd.width, rd.height+1) + for i, reg in ipairs(rd.registers) do + lg.rectangle("line", rd.scrX+reg.x+(rd.fontWidth*(4-reg.w)), rd.scrY+reg.y, rd.fontWidth*reg.w+1, rd.fontHeight+1) + lg.print(reg.name, rd.scrX+reg.x+32+4, reg.y + rd.scrY) + end + for i, flg in pairs(rd.flags) do + lg.rectangle("line", rd.scrX+flg.x, rd.scrY+flg.y, rd.fontHeight+1, rd.fontHeight+1) + lg.print(flg.name, rd.scrX+flg.x+rd.fontHeight+4, flg.y+rd.scrY) + end +end +local function printValue(val, w, x, y, fw) + for i = 1, w do + local v = math.floor(val/math.pow(16,i-1))%16 + lg.print(string.format("%01X", v), x+(fw*(4-i)), y+1) + end +end +local function RedrawRegDisplay(rd, cpu, mem) + for i, reg in ipairs(rd.registers) do + lg.setColor(0,0,0) + lg.rectangle("fill", rd.scrX+reg.x+(rd.fontWidth*(4-reg.w)), rd.scrY+reg.y, rd.fontWidth*reg.w, rd.fontHeight) + lg.setColor(1,1,1) + local val = cpu.data[reg.idx]%(math.pow(16, reg.w)) + printValue(val, reg.w, rd.scrX+reg.x, rd.scrY+reg.y, rd.fontWidth) + end + for i, flg in pairs(rd.flags) do + local val = cpu.data[flg.idx] + if val~=0 then + lg.setColor(1,1,1) + else + lg.setColor(0,0,0) + end + lg.rectangle("fill", rd.scrX+flg.x, rd.scrY+flg.y, rd.fontHeight, rd.fontHeight) + end + lg.setColor(1,1,1) +end + +local ReadMemory +local StackDisplay = { + scrX = 8+384+32+6, scrY = 32+192+32, + lines = 16, fontHeight = 12, +} +local function InitStackDisplay(sd) + sd.width = 96+1 + sd.height = 12+(sd.lines*sd.fontHeight) + lg.print("Stack", sd.scrX, sd.scrY-16) + lg.rectangle("line", sd.scrX, sd.scrY, sd.width+1, sd.height+1) +end +local function RedrawStackDisplay(sd, cpu, mem) + lg.setColor(0,0,0) + lg.rectangle("fill", sd.scrX, sd.scrY, sd.width, sd.height) + lg.setColor(1,1,1) + for i = 1, sd.lines do + local addr = (cpu.data.s-i)%65536 + local val = ReadMemory(mem, addr) + lg.print(string.format("%04X -%2i %02X", addr, i, val), sd.scrX+8, sd.scrY+8+(12*(i-1))) + end +end + +local MemoryDisplays = { + { + scrX = 8, scrY = 32+192+32, + columns = 16, columnSpace = 4, rows = 16, + fontHeight = 12, + showAscii = false, + addr = 0x1000, + highlightTime = 8, + }, +} +local function InitMemoryDisplay(md) + local cw = 7 + md.mainCols = 9+md.columns*3+md.columnSpace-1 + md.width = cw*(md.mainCols)+cw*(md.showAscii and (md.columns+5) or 0)-8 + md.height = 12+md.fontHeight*md.rows + lg.print("Memory", md.scrX, md.scrY-16) + lg.rectangle("line", md.scrX, md.scrY, md.width+1, md.height+1) + md.ticksDrawn = {}; for i = 1, md.highlightTime do md.ticksDrawn[i] = 0 end; +end +local function RedrawMemoryDisplay(md, cpu, mem) + lg.setColor(0,0,0) + lg.rectangle("fill", md.scrX, md.scrY, md.width, md.height) + lg.setColor(1,1,1) + + local highlightAddrs = {} + highlightAddrs[cpu.data.p] = "P" + highlightAddrs[cpu.data.q] = "Q" + highlightAddrs[cpu.data.s] = "S" + highlightAddrs[cpu.data.v] = "V" + highlightAddrs[(cpu.data.i-1)%65536] = "I" + + local cw = 7 + + local tickDraw = md.ticksDrawn[1] + for l = 1, md.rows do + local addr = md.addr + (l-1)*md.columns + local lx = md.scrX+8 + local ly = md.scrY+8+(md.fontHeight*(l-1)) + lg.print(string.format("%04X", addr).." | ", lx, ly) + lx = lx+(cw*7) + for x = 1, md.columns do + local a = addr + (x-1) + local v = ReadMemory(mem, a) + if highlightAddrs[a] then + lg.line(lx, ly, lx, ly+11) + lg.line(lx-1, ly, lx+15, ly) + lg.line(lx-1, ly+11, lx+15, ly+11) + lg.print(highlightAddrs[a], lx-cw, ly) + end + if mem.c.writes[a] > tickDraw then + lg.rectangle("fill",lx-1,ly,cw*2+2,11) + lg.setColor(0,0,0) + end + lg.print(string.format("%02X", v), lx, ly) + lg.setColor(1,1,1) + if mem.c.reads[a] > tickDraw then + lg.rectangle("line", lx-1, ly, cw*2+2+1, 11+1) + end + lx = lx+(cw*3) + if x%md.columnSpace==0 then lx = lx+cw end + end + if md.showAscii then + lg.print("|", lx, ly) + lx = lx+cw + end + if md.showAscii then + for x = 1, md.columns do + local a = addr + (x-1) + local v = ReadMemory(mem, a) + if v>=128 then v = 0 end + local c = string.char(v) + lg.print(c, md.scrX+lx+((x-1)*cw), md.scrY+8+(12*(l-1))) + end + end + end + table.insert(md.ticksDrawn, cpu.data.tick) + table.remove(md.ticksDrawn, 1) +end + +local ProgramDisplay = { + scrX = 8+384+8+128+8, scrY = 32, + fontHeight = 12, + numLines = 35, +} +local function pdLinesFromDasm(dasm) + local lines, addrLines = {}, {} + for line in dasm:gmatch("[^\n]+") do + if line~="..." then + local addrh, datah, rest = line:match("^(.+) | (.+) | +(.+)$") + local text = rest + local label = nil + if rest:find(":") then label, text = rest:match("^(.+): (.+)$") end + local addr = tonumber(addrh, 16) + + if label then + table.insert(lines, " | "..label..":") + lineidx = #lines + end + table.insert(lines, addrh.." | "..text) + + local lineidx = #lines + local len = 0; for _ in datah:gfind("[0-9a-fA-F][0-9a-fA-F]") do len = len+1 end; + for i = 1, len do addrLines[addr+i-1] = lineidx end + else + table.insert(lines, "") + end + end + return lines, addrLines +end +local function InitProgramDisplay(pd, data, code, arch) + pd.width = 256 + pd.height = 12+pd.fontHeight*pd.numLines-3 + lg.print("Program", pd.scrX, pd.scrY-16) + lg.rectangle("line", pd.scrX, pd.scrY, pd.width, pd.height) + pd.firstLine = 1 + pd.data = data + pd.code = code + local dasm = asm.disassembleMemory(data, code, arch) + pd.lines, pd.addrLines = pdLinesFromDasm(dasm) +end +local function RedrawProgramDisplay(pd, cpu) + lg.setColor(0,0,0) + lg.rectangle("fill", pd.scrX, pd.scrY, pd.width-1, pd.height-1) + lg.setColor(1,1,1) + + local instrAddr = (cpu.data.i-1)%65536 + for lineidx = pd.firstLine, pd.firstLine+pd.numLines-1 do + local line = pd.lines[lineidx] + if line then + local x, y = pd.scrX+8, pd.scrY+8+(lineidx-1)*pd.fontHeight + lg.print(line, x, y) + if pd.addrLines[instrAddr]==lineidx then + lg.rectangle("line", x, y, pd.width-18, pd.fontHeight-1) + end + end + end + --lg.print(pd.dasm or "nil", pd.scrX+8, pd.scrY+8) +end + +local VideoDisplay = { + width = 256, height = 128, + scrX = 8, scrY = 256, + addr = 0x8000, +} +local function InitVideoDisplay(vd) + lg.print("Video Display", vd.scrX, vd.scrY-16) + vd.imageData = li.newImageData(vd.width, vd.height) + lg.setColor(1,1,1) + lg.rectangle("line", vd.scrX, vd.scrY, vd.width+1, vd.height+1) +end +local CharDisplay = { + width = 64*6, height = 16*12, + rows = 16, cols = 64, + fontWidth = 6, fontHeight = 12, + scrX = 8, scrY = 32, + addrChar = 0x0800, + addrColor = 0x0C00, +} +local function InitCharDisplay(cd) + lg.print("Char Display", cd.scrX, cd.scrY-16) + cd.chars = {} + cd.colors = {} + cd.highlight = {} + for a = 0, cd.rows*cd.cols-1 do + cd.chars[a] = "" + cd.colors[a] = ColorSet[1] + cd.highlight[a] = false + end + cd.font = lg.newFont("consola.ttf", cd.fontHeight-1, "mono") +end + +local Keyboard = { + addrRange = {0x0500, 0x05FF}, + queueSize = 16, + queue = {}, + interrupts = false, + queueEmpty = true, +} +local function kbSetNext(kb, cpu, mem) + local newval = kb.queue[1] or 0 + if mem.c.data[kb.addrRange[1]] ~= newval then + for a = kb.addrRange[1], kb.addrRange[2] do + mem.c.data[a] = newval + end + end +end +local function KeyboardOnRead(addr, cpu, mem, kb) + table.remove(kb.queue, 1) + kbSetNext(kb, cpu, mem) +end +local function KeyboardOnWrite(addr, cpu, mem, kb) + local val = mem.c.data[addr] + kb.interrupts = val~=0 + mem.c.data[addr] = kb.queue[1] or 0 +end +local keycodes = require("keycodes") +local CPURequestInterrupt +local function KeyboardOnKey(kb, key, press, cpu, mem) + local code = keycodes[key] or keycodes["invalid"] + table.insert(kb.queue, code) + if #kb.queue > kb.queueSize then table.remove(kb.queue, 1) end + kb.queueEmpty = false + kbSetNext(kb, cpu, mem) + if kb.interrupts then CPURequestInterrupt(cpu) end +end + +local function RedrawFPSCounter(x,y) + lg.setColor(0,0,0) + lg.rectangle("fill",x,y,64,12) + lg.setColor(1,1,1) + lg.print("FPS: "..lt.getFPS(), x,y) +end + +local peripherals = { + CharDisplay = { range = {0x0800, 0x0FFF}, write = true }, + BootROM = { range = {0x0000, 0x03FF}, write = false }, + SystemRAM = { range = {0x1000, 0x1FFF}, write = true }, + UserROM = { range = {0x2000, 0x2FFF}, write = false }, + UserRAM = { range = {0x3000, 0x3FFF}, write = true }, + VideoDisplay = { range = {0x8000, 0xFFFF}, write = true }, + Keyboard = { range = {0x0500, 0x05FF}, write = true, + onread = function(addr, cpu, mem) KeyboardOnRead (addr, cpu, mem, Keyboard) end, + onwrite = function(addr, cpu, mem) KeyboardOnWrite(addr, cpu, mem, Keyboard) end, + }, +} + +---- +ffi.cdef [[ +struct Event { + int id; + int addr; +}; +struct Memory { + int data[65536]; + int canwrite[65536]; + int writes[65536]; + int reads[65536]; + int onread[65536]; + int onwrite[65536]; + struct Event events[4096]; + int numevents; +}; +]] +local Memory = { + c = ffi.new("struct Memory"), +} +local function InitMemory(mem, pers) + for i = 0, 65535 do + mem.c.data[i] = 0 + mem.c.canwrite[i] = 0 + mem.c.writes[i] = 0 + mem.c.reads[i] = 0 + mem.c.onread[i] = 0 + mem.c.onwrite[i] = 0 + end + for k, per in pairs(pers) do + if per.onread then registerEvent(mem, per.range[1], per.range[2], true , false, per.onread ) end + if per.onwrite then registerEvent(mem, per.range[1], per.range[2], false, true , per.onwrite) end + for a = per.range[1], per.range[2] do + mem.c.canwrite[a] = (per.write and 1 or 0) + end + end +end +ReadMemory = function(mem, addr) + return mem.c.data[addr%65536]%256 +end +local function WriteMemory(mem, addr, val) + if mem.c.canwrite[addr%65536]~=0 then + mem.c.data[addr%65536] = val%256 + end +end +local function AssembleToMemory(mem, fn, arch) + local data, code = asm.assembleFile(fn, arch) + for addr = 0, 65535 do + if data[addr] then + mem.c.data[addr] = data[addr] + end + end + return data, code +end + +ffi.cdef [[ +struct CPU { + int a; + int b; + int c; + int u; + int t; + int p; + int q; + int s; + int v; + int i; + int cf; + int nz; + int irq; + int ifg; + int rfg; + int instr; + int cycle; + int tick; +}; +int TickCPU(struct CPU* const cpu, struct Memory* const mem, const int count, const int countinstrs); +]] +local CPU = { + data = ffi.new("struct CPU"), +} +local cpuDll = ffi.load("8608emulator.dll") +local function TickCPU(cpu, mem, count, countinstrs) + local countleft = count + while countleft>0 do + countleft = cpuDll.TickCPU(cpu.data, mem.c, countleft, countinstrs and 1 or 0) + handleEvents(cpu, mem) + end +end +local function InitCPU(cpu) + cpu.data.rfg = 1; +end +CPURequestInterrupt = function(cpu) + cpu.data.irq = 1; +end + +---- + +local function RedrawVideoDisplay(vd, mem) + local vd = VideoDisplay + for y = 0, vd.height-1 do + for x = 0, vd.width-1 do + local a = vd.addr + y*vd.width + x + local colorid = ReadMemory(mem, a)%64 + local color = ColorSet[colorid] + vd.imageData:setPixel(x, y, color[1], color[2], color[3]) + end + end + local img = lg.newImage(vd.imageData) + lg.setColor(1,1,1) + lg.draw(img, vd.scrX, vd.scrY) +end +local function RedrawCharDisplay(cd, mem) + lg.rectangle("line", cd.scrX, cd.scrY, cd.width+1, cd.height+1) + lg.setColor(0,0,0) + lg.rectangle("fill", cd.scrX, cd.scrY, cd.width, cd.height) + lg.setFont(cd.font) + local cd = CharDisplay + for cy = 0, cd.rows-1 do + for cx = 0, cd.cols-1 do + local abase = cy*cd.cols + cx + local achar = cd.addrChar + abase + local acolor = cd.addrColor + abase + local colorid = ReadMemory(mem, acolor)%64 + lg.setColor(ColorSet[colorid]) + if cd.highlight[a] then + lg.rectangle("fill", cd.scrX + cx*cd.fontWidth, cd.scrY + cy*cd.fontHeight, cd.fontWidth, cd.fontHeight) + lg.setColor(0, 0, 0) + end + local val = ReadMemory(mem, achar)%128 + if val>=32 then + local char = string.char(val) + lg.print(char, cd.scrX + cx*cd.fontWidth, cd.scrY + cy*cd.fontHeight) + elseif val>=16 and val<=31 then + local r, g, b = math.floor(val/4)%2, math.floor(val/2)%2, val%2 + lg.setColor(r, g, b) + lg.rectangle("fill", cd.scrX + cx*cd.fontWidth, cd.scrY + cy*cd.fontHeight, cd.fontWidth, cd.fontHeight) + end + end + end + lg.setColor(1,1,1) + lg.setFont(InfoFont) +end +local function InitWindowCanvas() + WindowCanvas = lg.newCanvas(WindowX, WindowY) + lg.setCanvas(WindowCanvas) + lg.setColor(1,1,1) + lg.setFont(InfoFont) + lg.print("8608 CPU Emulator", 4, 4) +end +local function RedrawWindow() + lg.setCanvas(WindowCanvas) + lg.setFont(InfoFont) + RedrawCharDisplay(CharDisplay, Memory) + --RedrawVideoDisplay(VideoDisplay, Memory) + RedrawRegDisplay(RegDisplay, CPU, Memory) + RedrawStackDisplay(StackDisplay, CPU, Memory) + RedrawProgramDisplay(ProgramDisplay, CPU) + for _, md in ipairs(MemoryDisplays) do RedrawMemoryDisplay(md, CPU, Memory) end + RedrawFPSCounter(128+32, 4) + + lg.setCanvas() +end + +function love.load() + InitColorset() + lg.setDefaultFilter("nearest", "nearest") + lg.setLineWidth(1) + lg.setLineStyle("rough") + InfoFont = lg.newFont("consola.ttf", 12, "mono") + InitMemory(Memory, peripherals) + InitWindowCanvas() + InitCPU(CPU) + --InitVideoDisplay(VideoDisplay) + InitCharDisplay(CharDisplay) + InitRegDisplay(RegDisplay) + InitStackDisplay(StackDisplay) + local data, code = AssembleToMemory(Memory, "../../8608programs/emutest.asm", Arch) + InitProgramDisplay(ProgramDisplay, data, code, Arch) + for _, md in ipairs(MemoryDisplays) do InitMemoryDisplay(md) end + RedrawWindow() + lg.setCanvas() +end + +local RunCPU = false +local CPUSpeed = 4999 +function love.draw() + CPU.data.tick = CPU.data.tick+1 + if RunCPU then + TickCPU(CPU, Memory, CPUSpeed, false) + end + + RedrawWindow() + + lg.setColor(1,1,1) + lg.draw(WindowCanvas, 0, 0, 0, 2, 2) +end +function love.keypressed(k) + if k=="escape" then le.quit() + elseif k=="t" then TickCPU(CPU, Memory, 1, true ) + elseif k=="e" then TickCPU(CPU, Memory, 1, false) + elseif k=="r" then RunCPU = not RunCPU + elseif k=="i" then CPU.data.irq = 1 + else KeyboardOnKey(Keyboard, k, true, CPU, Memory) + end +end diff --git a/emulator/colorset.lua b/emulator/colorset.lua new file mode 100644 index 0000000..d1e8b07 --- /dev/null +++ b/emulator/colorset.lua @@ -0,0 +1,74 @@ + +ColorSet = { + {222,52,52,255}, + {166,65,65,255}, + {220,215,144,255}, + {231,193,110,255}, + {57,180,74,255}, + {0,128,64,255}, + {50,105,227,255}, + {49,79,145,255}, + + {196,17,14,255}, + {112,17,10,255}, + {255,191,0,255}, + {168,98,0,255}, + {38,107,22,255}, + {28,82,17,255}, + {165,189,210,255}, + {105,145,170,255}, + + {198,105,156,255}, + {145,68,92,255}, + {239,202,217,255}, + {225,175,153,255}, + {255,125,64,255}, + {160,66,22,255}, + {165,234,240,255}, + {85,175,205,255}, + + {178,169,231,255}, + {139,90,176,255}, + {229,175,121,255}, + {100,50,0,255}, + {232,114,0,255}, + {191,54,0,255}, + {138,178,141,255}, + {37,69,69,255}, + + {240,239,235,255}, + {221,216,214,255}, + {188,184,182,255}, + {163,158,153,255}, + {124,124,117,255}, + {87,86,80,255}, + {45,45,42,255}, + {17,17,14,255}, + + {207,175,144,255}, + {189,158,121,255}, + {177,138,102,255}, + {154,112,79,255}, + {119,82,56,255}, + {87,59,35,255}, + {61,36,14,255}, + {40,23,8,255}, + + {127,52,52,190}, + {196,136,52,190}, + {55,90,25,190}, + {160,180,255,180}, + {10,45,80,180}, + {31,22,8,200}, + {230,228,225,150}, + {18,18,18,150}, + + {199,178,156,255}, + {150,135,120,255}, + {115,99,87,255}, + {85,70,65,255}, + {54,47,45,255}, + {255,255,255,255}, + {0,0,0,255}, + {255,255,255,50}, +} diff --git a/emulator/conf.lua b/emulator/conf.lua new file mode 100644 index 0000000..62ce7cc --- /dev/null +++ b/emulator/conf.lua @@ -0,0 +1,10 @@ + +WindowScale = 2 +WindowX = 800 +WindowY = 480 + +function love.conf(t) + t.console = true + t.window.width = WindowX*WindowScale + t.window.height = WindowY*WindowScale +end diff --git a/emulator/consola.ttf b/emulator/consola.ttf new file mode 100644 index 0000000..e881ca4 Binary files /dev/null and b/emulator/consola.ttf differ diff --git a/emulator/gendefs.lua b/emulator/gendefs.lua new file mode 100644 index 0000000..1f6f3e2 --- /dev/null +++ b/emulator/gendefs.lua @@ -0,0 +1,66 @@ + +local function fixCode(code) + code = code:gsub("cpu%.", "cpu%->") + if + not code:find("lni") and + not code:find("instrloadpre") and + not code:find("jmp") and + not code:find("ldi") + then code = code.." cpu->cycle++;" end + return code +end +local function lineFromInstr(instr) + local cycleLines = {} + for cycle = 0, 7 do + if instr and instr.ccode[cycle+1] then + cycleLines[cycle+1] = string.format("cpu_instr_%i_%i", instr.opcode, cycle) + else + cycleLines[cycle+1] = 0 + end + end + return string.format("{%s},", table.concat(cycleLines, ",")) +end +local function codeFromInstr(instr, lines) + for i, code in ipairs(instr.ccode) do + local cycle = i-1 + local line = string.format( + "void cpu_instr_%i_%i(struct CPU* const cpu, struct Memory* const mem) { %s }", + instr.opcode, cycle, + fixCode(code) + ) + table.insert(lines, line) + end +end + +local ccode = [[ +// Auto-generated by gendefs.lua + +%s + +CPUInstruction CPUInstructions[256][8] = { + %s +}; +]] +local function ccodeFromArch(arch) + local instrsByOpcode = {} + for i, instr in ipairs(arch.instructions) do + if instr.opcode then instrsByOpcode[instr.opcode] = instr end + end + + local instrLines = {} + local funcLines = {} + for opcode = 0, 255 do + local instr = instrsByOpcode[opcode] + instrLines[opcode+1] = lineFromInstr(instr) + if instr then codeFromInstr(instr, funcLines) end + end + return string.format(ccode, + table.concat(funcLines, "\n"), + table.concat(instrLines, "\n\t") + ) +end + +local arch = dofile("../rom-8608-defs.lua") +local fo = io.open("instructions_gen.c", "w") +fo:write(ccodeFromArch(arch)) +fo:close() diff --git a/emulator/instructions_gen.c b/emulator/instructions_gen.c new file mode 100644 index 0000000..5bfbb12 --- /dev/null +++ b/emulator/instructions_gen.c @@ -0,0 +1,707 @@ +// Auto-generated by gendefs.lua + +void cpu_instr_0_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a=0; cpu->b=0; cpu->c=0; cpu->u=0; cpu->t=0; cpu->p=0; cpu->q=0; cpu->s=0; cpu->v=0; cpu->i=0; cpu->cf=0; cpu->nz=0; cpu->irq=0; cpu->ifg=0; cpu->rfg=1; lni; } +void cpu_instr_16_0(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->a, 1 ); lni; } +void cpu_instr_17_0(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->a,-1 ); lni; } +void cpu_instr_18_0(struct CPU* const cpu, struct Memory* const mem) { cpu->p++; lni; } +void cpu_instr_19_0(struct CPU* const cpu, struct Memory* const mem) { cpu->q++; lni; } +void cpu_instr_20_0(struct CPU* const cpu, struct Memory* const mem) { tst(cpu->a); lni; } +void cpu_instr_21_0(struct CPU* const cpu, struct Memory* const mem) { cpu->p--; lni; } +void cpu_instr_22_0(struct CPU* const cpu, struct Memory* const mem) { cpu->q--; lni; } +void cpu_instr_23_0(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->c, 1 ); lni; } +void cpu_instr_24_0(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->c,-1 ); lni; } +void cpu_instr_25_0(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->b, 1 ); lni; } +void cpu_instr_26_0(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->b,-1 ); lni; } +void cpu_instr_27_0(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->a,cpu->cf); lni; } +void cpu_instr_28_0(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->b,cpu->cf); lni; } +void cpu_instr_29_0(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->c,cpu->cf); lni; } +void cpu_instr_30_0(struct CPU* const cpu, struct Memory* const mem) { tst(cpu->b); lni; } +void cpu_instr_31_0(struct CPU* const cpu, struct Memory* const mem) { tst(cpu->c); lni; } +void cpu_instr_32_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a=loadimmed; setzf(cpu->a); cpu->cycle++; } +void cpu_instr_32_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_33_0(struct CPU* const cpu, struct Memory* const mem) { loadimm161 cpu->cycle++; } +void cpu_instr_33_1(struct CPU* const cpu, struct Memory* const mem) { loadimm162 cpu->cycle++; } +void cpu_instr_33_2(struct CPU* const cpu, struct Memory* const mem) { cpu->p=wordut; lni; } +void cpu_instr_34_0(struct CPU* const cpu, struct Memory* const mem) { loadimm161 cpu->cycle++; } +void cpu_instr_34_1(struct CPU* const cpu, struct Memory* const mem) { loadimm162 cpu->cycle++; } +void cpu_instr_34_2(struct CPU* const cpu, struct Memory* const mem) { cpu->v=wordut; lni; } +void cpu_instr_35_0(struct CPU* const cpu, struct Memory* const mem) { loadimm161 cpu->cycle++; } +void cpu_instr_35_1(struct CPU* const cpu, struct Memory* const mem) { loadimm162 cpu->cycle++; } +void cpu_instr_35_2(struct CPU* const cpu, struct Memory* const mem) { cpu->q=wordut; lni; } +void cpu_instr_36_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_36_1(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->a,cpu->t); lni; } +void cpu_instr_37_0(struct CPU* const cpu, struct Memory* const mem) { loadimm161 cpu->cycle++; } +void cpu_instr_37_1(struct CPU* const cpu, struct Memory* const mem) { loadimm162 cpu->cycle++; } +void cpu_instr_37_2(struct CPU* const cpu, struct Memory* const mem) { cpu->s=wordut; lni; } +void cpu_instr_38_0(struct CPU* const cpu, struct Memory* const mem) { cpu->b=loadimmed; setzf(cpu->b); cpu->cycle++; } +void cpu_instr_38_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_39_0(struct CPU* const cpu, struct Memory* const mem) { cpu->c=loadimmed; setzf(cpu->c); cpu->cycle++; } +void cpu_instr_39_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_40_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt; cpu->cycle++; } +void cpu_instr_40_1(struct CPU* const cpu, struct Memory* const mem) { cpu->a=loadstackrel; setzf(cpu->a); cpu->cycle++; } +void cpu_instr_40_2(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_41_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt; cpu->cycle++; } +void cpu_instr_41_1(struct CPU* const cpu, struct Memory* const mem) { cpu->b=loadstackrel; setzf(cpu->b); cpu->cycle++; } +void cpu_instr_41_2(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_42_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt; cpu->cycle++; } +void cpu_instr_42_1(struct CPU* const cpu, struct Memory* const mem) { cpu->c=loadstackrel; setzf(cpu->c); cpu->cycle++; } +void cpu_instr_42_2(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_43_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_43_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrelu cpu->cycle++; } +void cpu_instr_43_2(struct CPU* const cpu, struct Memory* const mem) { instrpreload; addf(cpu->u, 1 ); cpu->cycle++; } +void cpu_instr_43_3(struct CPU* const cpu, struct Memory* const mem) { instrloadpre } +void cpu_instr_44_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_44_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrelu cpu->cycle++; } +void cpu_instr_44_2(struct CPU* const cpu, struct Memory* const mem) { instrpreload; addf(cpu->u,-1 ); cpu->cycle++; } +void cpu_instr_44_3(struct CPU* const cpu, struct Memory* const mem) { instrloadpre } +void cpu_instr_45_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_45_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrelu cpu->cycle++; } +void cpu_instr_45_2(struct CPU* const cpu, struct Memory* const mem) { instrpreload; addf(cpu->u,cpu->cf); cpu->cycle++; } +void cpu_instr_45_3(struct CPU* const cpu, struct Memory* const mem) { instrloadpre } +void cpu_instr_46_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_46_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrelu cpu->cycle++; } +void cpu_instr_46_2(struct CPU* const cpu, struct Memory* const mem) { tst(cpu->u); lni; } +void cpu_instr_47_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a=sra(cpu->a,cpu->c); setzf(cpu->a); lni; } +void cpu_instr_48_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_48_1(struct CPU* const cpu, struct Memory* const mem) { if( cpu->nz ) { jmprelt } else { lni } } +void cpu_instr_49_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_49_1(struct CPU* const cpu, struct Memory* const mem) { jmprelt } +void cpu_instr_50_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_50_1(struct CPU* const cpu, struct Memory* const mem) { if(!cpu->nz ) { jmprelt } else { lni } } +void cpu_instr_51_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_51_1(struct CPU* const cpu, struct Memory* const mem) { if(!cpu->cf ) { jmprelt } else { lni } } +void cpu_instr_52_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_52_1(struct CPU* const cpu, struct Memory* const mem) { if( cpu->cf ) { jmprelt } else { lni } } +void cpu_instr_53_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_53_1(struct CPU* const cpu, struct Memory* const mem) { if( cpu->nz && cpu->cf) { jmprelt } else { lni } } +void cpu_instr_54_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_54_1(struct CPU* const cpu, struct Memory* const mem) { if(!cpu->nz && !cpu->cf) { jmprelt } else { lni } } +void cpu_instr_55_0(struct CPU* const cpu, struct Memory* const mem) { cpu->b=lobyte(cpu->p); lni; } +void cpu_instr_56_0(struct CPU* const cpu, struct Memory* const mem) { cpu->c=hibyte(cpu->p); lni; } +void cpu_instr_57_0(struct CPU* const cpu, struct Memory* const mem) { cpu->b=lobyte(cpu->q); lni; } +void cpu_instr_58_0(struct CPU* const cpu, struct Memory* const mem) { cpu->c=hibyte(cpu->q); lni; } +void cpu_instr_59_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt; cpu->cycle++; } +void cpu_instr_59_1(struct CPU* const cpu, struct Memory* const mem) { pushbyte(cpu->t); cpu->cycle++; } +void cpu_instr_59_2(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_60_0(struct CPU* const cpu, struct Memory* const mem) { loadimm161 cpu->cycle++; } +void cpu_instr_60_1(struct CPU* const cpu, struct Memory* const mem) { loadimm162 cpu->cycle++; } +void cpu_instr_60_2(struct CPU* const cpu, struct Memory* const mem) { pushbyte(cpu->u); cpu->cycle++; } +void cpu_instr_60_3(struct CPU* const cpu, struct Memory* const mem) { pushbyte(cpu->t); cpu->cycle++; } +void cpu_instr_60_4(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_62_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a=rol(cpu->a,cpu->c); setzf(cpu->a); lni; } +void cpu_instr_63_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a=ror(cpu->a,cpu->c); setzf(cpu->a); lni; } +void cpu_instr_64_0(struct CPU* const cpu, struct Memory* const mem) { pushbyte(cpu->a); cpu->cycle++; } +void cpu_instr_64_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_65_0(struct CPU* const cpu, struct Memory* const mem) { push161(cpu->p); cpu->cycle++; } +void cpu_instr_65_1(struct CPU* const cpu, struct Memory* const mem) { push162(cpu->p); cpu->cycle++; } +void cpu_instr_65_2(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_66_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a=popbyte; cpu->cycle++; } +void cpu_instr_66_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_67_0(struct CPU* const cpu, struct Memory* const mem) { pop161 cpu->cycle++; } +void cpu_instr_67_1(struct CPU* const cpu, struct Memory* const mem) { pop162 cpu->cycle++; } +void cpu_instr_67_2(struct CPU* const cpu, struct Memory* const mem) { cpu->p=wordut; lni; } +void cpu_instr_68_0(struct CPU* const cpu, struct Memory* const mem) { pushbyte(cpu->b); cpu->cycle++; } +void cpu_instr_68_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_69_0(struct CPU* const cpu, struct Memory* const mem) { pushbyte(cpu->c); cpu->cycle++; } +void cpu_instr_69_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_70_0(struct CPU* const cpu, struct Memory* const mem) { push161(cpu->q); cpu->cycle++; } +void cpu_instr_70_1(struct CPU* const cpu, struct Memory* const mem) { push162(cpu->q); cpu->cycle++; } +void cpu_instr_70_2(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_71_0(struct CPU* const cpu, struct Memory* const mem) { cpu->b=popbyte; cpu->cycle++; } +void cpu_instr_71_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_72_0(struct CPU* const cpu, struct Memory* const mem) { cpu->c=popbyte; cpu->cycle++; } +void cpu_instr_72_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_73_0(struct CPU* const cpu, struct Memory* const mem) { pop161 cpu->cycle++; } +void cpu_instr_73_1(struct CPU* const cpu, struct Memory* const mem) { pop162 cpu->cycle++; } +void cpu_instr_73_2(struct CPU* const cpu, struct Memory* const mem) { cpu->q=wordut; lni; } +void cpu_instr_74_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_74_1(struct CPU* const cpu, struct Memory* const mem) { cpu->p+=signed8(cpu->t); lni; } +void cpu_instr_75_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_75_1(struct CPU* const cpu, struct Memory* const mem) { cpu->q+=signed8(cpu->t); lni; } +void cpu_instr_76_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_76_1(struct CPU* const cpu, struct Memory* const mem) { cpu->s+=signed8(cpu->t); lni; } +void cpu_instr_77_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a>>=cpu->c; setzf(cpu->a); lni; } +void cpu_instr_78_0(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->c,cpu->a); lni; } +void cpu_instr_79_0(struct CPU* const cpu, struct Memory* const mem) { subf(cpu->c,cpu->a); lni; } +void cpu_instr_80_0(struct CPU* const cpu, struct Memory* const mem) { loadimm161 cpu->cycle++; } +void cpu_instr_80_1(struct CPU* const cpu, struct Memory* const mem) { loadimm162 cpu->cycle++; } +void cpu_instr_80_2(struct CPU* const cpu, struct Memory* const mem) { storeut(cpu->a); cpu->cycle++; } +void cpu_instr_80_3(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_81_0(struct CPU* const cpu, struct Memory* const mem) { loadimm161 cpu->cycle++; } +void cpu_instr_81_1(struct CPU* const cpu, struct Memory* const mem) { loadimm162 cpu->cycle++; } +void cpu_instr_81_2(struct CPU* const cpu, struct Memory* const mem) { cpu->a=loadut; setzf(cpu->a); cpu->cycle++; } +void cpu_instr_81_3(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_82_0(struct CPU* const cpu, struct Memory* const mem) { storep(cpu->a); cpu->cycle++; } +void cpu_instr_82_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_83_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a=loadp; setzf(cpu->a); cpu->cycle++; } +void cpu_instr_83_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_84_0(struct CPU* const cpu, struct Memory* const mem) { storeq(cpu->a); cpu->cycle++; } +void cpu_instr_84_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_85_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a=loadq; setzf(cpu->a); cpu->cycle++; } +void cpu_instr_85_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_86_0(struct CPU* const cpu, struct Memory* const mem) { loadimm161 cpu->cycle++; } +void cpu_instr_86_1(struct CPU* const cpu, struct Memory* const mem) { loadimm162 cpu->cycle++; } +void cpu_instr_86_2(struct CPU* const cpu, struct Memory* const mem) { cpu->b=loadut; setzf(cpu->b); cpu->cycle++; } +void cpu_instr_86_3(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_87_0(struct CPU* const cpu, struct Memory* const mem) { loadimm161 cpu->cycle++; } +void cpu_instr_87_1(struct CPU* const cpu, struct Memory* const mem) { loadimm162 cpu->cycle++; } +void cpu_instr_87_2(struct CPU* const cpu, struct Memory* const mem) { cpu->c=loadut; setzf(cpu->c); cpu->cycle++; } +void cpu_instr_87_3(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_88_0(struct CPU* const cpu, struct Memory* const mem) { loadimm161 cpu->cycle++; } +void cpu_instr_88_1(struct CPU* const cpu, struct Memory* const mem) { loadimm162 cpu->cycle++; } +void cpu_instr_88_2(struct CPU* const cpu, struct Memory* const mem) { storeut(cpu->b); cpu->cycle++; } +void cpu_instr_88_3(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_89_0(struct CPU* const cpu, struct Memory* const mem) { loadimm161 cpu->cycle++; } +void cpu_instr_89_1(struct CPU* const cpu, struct Memory* const mem) { loadimm162 cpu->cycle++; } +void cpu_instr_89_2(struct CPU* const cpu, struct Memory* const mem) { storeut(cpu->c); cpu->cycle++; } +void cpu_instr_89_3(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_90_0(struct CPU* const cpu, struct Memory* const mem) { storep(cpu->b); cpu->cycle++; } +void cpu_instr_90_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_91_0(struct CPU* const cpu, struct Memory* const mem) { storep(cpu->c); cpu->cycle++; } +void cpu_instr_91_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_92_0(struct CPU* const cpu, struct Memory* const mem) { storeq(cpu->b); cpu->cycle++; } +void cpu_instr_92_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_93_0(struct CPU* const cpu, struct Memory* const mem) { storeq(cpu->c); cpu->cycle++; } +void cpu_instr_93_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_94_0(struct CPU* const cpu, struct Memory* const mem) { cpu->b=loadp; setzf(cpu->b); cpu->cycle++; } +void cpu_instr_94_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_95_0(struct CPU* const cpu, struct Memory* const mem) { cpu->c=loadp; setzf(cpu->c); cpu->cycle++; } +void cpu_instr_95_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_96_0(struct CPU* const cpu, struct Memory* const mem) { loadimm161 cpu->cycle++; } +void cpu_instr_96_1(struct CPU* const cpu, struct Memory* const mem) { loadimm162 cpu->cycle++; } +void cpu_instr_96_2(struct CPU* const cpu, struct Memory* const mem) { jmpabsut } +void cpu_instr_97_0(struct CPU* const cpu, struct Memory* const mem) { cpu->b=loadq; setzf(cpu->b); cpu->cycle++; } +void cpu_instr_97_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_98_0(struct CPU* const cpu, struct Memory* const mem) { cpu->c=loadq; setzf(cpu->c); cpu->cycle++; } +void cpu_instr_98_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_99_0(struct CPU* const cpu, struct Memory* const mem) { loadimm161 cpu->cycle++; } +void cpu_instr_99_1(struct CPU* const cpu, struct Memory* const mem) { loadimm162 cpu->cycle++; } +void cpu_instr_99_2(struct CPU* const cpu, struct Memory* const mem) { jmpabsut saveretaddr } +void cpu_instr_100_0(struct CPU* const cpu, struct Memory* const mem) { jmpabsp } +void cpu_instr_101_0(struct CPU* const cpu, struct Memory* const mem) { jmpabsp } +void cpu_instr_101_1(struct CPU* const cpu, struct Memory* const mem) { saveretaddr cpu->cycle++; } +void cpu_instr_102_0(struct CPU* const cpu, struct Memory* const mem) { jmpabsq } +void cpu_instr_103_0(struct CPU* const cpu, struct Memory* const mem) { jmpabsq } +void cpu_instr_103_1(struct CPU* const cpu, struct Memory* const mem) { saveretaddr cpu->cycle++; } +void cpu_instr_104_0(struct CPU* const cpu, struct Memory* const mem) { loadimm161 cpu->cycle++; } +void cpu_instr_104_1(struct CPU* const cpu, struct Memory* const mem) { loadimm162 cpu->cycle++; } +void cpu_instr_104_2(struct CPU* const cpu, struct Memory* const mem) { cpu->p=wordut; cpu->u=loadut; cpu->cycle++; } +void cpu_instr_104_3(struct CPU* const cpu, struct Memory* const mem) { cpu->t=loadpp1; cpu->cycle++; } +void cpu_instr_104_4(struct CPU* const cpu, struct Memory* const mem) { cpu->p=wordut; lni; } +void cpu_instr_106_0(struct CPU* const cpu, struct Memory* const mem) { loadimm161 cpu->cycle++; } +void cpu_instr_106_1(struct CPU* const cpu, struct Memory* const mem) { loadimm162 cpu->cycle++; } +void cpu_instr_106_2(struct CPU* const cpu, struct Memory* const mem) { cpu->q=wordut; cpu->u=loadut; cpu->cycle++; } +void cpu_instr_106_3(struct CPU* const cpu, struct Memory* const mem) { cpu->t=loadqp1; cpu->cycle++; } +void cpu_instr_106_4(struct CPU* const cpu, struct Memory* const mem) { cpu->q=wordut; lni; } +void cpu_instr_108_0(struct CPU* const cpu, struct Memory* const mem) { loadimm161 cpu->cycle++; } +void cpu_instr_108_1(struct CPU* const cpu, struct Memory* const mem) { loadimm162 cpu->cycle++; } +void cpu_instr_108_2(struct CPU* const cpu, struct Memory* const mem) { storeut(hibyte(cpu->p)); cpu->cycle++; } +void cpu_instr_108_3(struct CPU* const cpu, struct Memory* const mem) { storeutp1(lobyte(cpu->p)); cpu->cycle++; } +void cpu_instr_108_4(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_110_0(struct CPU* const cpu, struct Memory* const mem) { loadimm161 cpu->cycle++; } +void cpu_instr_110_1(struct CPU* const cpu, struct Memory* const mem) { loadimm162 cpu->cycle++; } +void cpu_instr_110_2(struct CPU* const cpu, struct Memory* const mem) { storeut(hibyte(cpu->p)); cpu->cycle++; } +void cpu_instr_110_3(struct CPU* const cpu, struct Memory* const mem) { storeutp1(lobyte(cpu->p)); cpu->cycle++; } +void cpu_instr_110_4(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_112_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_112_1(struct CPU* const cpu, struct Memory* const mem) { subf(cpu->a,cpu->t); lni; } +void cpu_instr_113_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_113_1(struct CPU* const cpu, struct Memory* const mem) { cmpf(cpu->a,cpu->t); lni; } +void cpu_instr_114_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_114_1(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->b,cpu->t); lni; } +void cpu_instr_115_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_115_1(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->c,cpu->t); lni; } +void cpu_instr_116_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_116_1(struct CPU* const cpu, struct Memory* const mem) { cpu->a&=cpu->t; setzf(cpu->a); lni; } +void cpu_instr_117_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_117_1(struct CPU* const cpu, struct Memory* const mem) { cpu->a|=cpu->t; setzf(cpu->a); lni; } +void cpu_instr_118_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_118_1(struct CPU* const cpu, struct Memory* const mem) { cpu->a^=cpu->t; setzf(cpu->a); lni; } +void cpu_instr_119_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_119_1(struct CPU* const cpu, struct Memory* const mem) { cpu->a&=~cpu->t; setzf(cpu->a); lni; } +void cpu_instr_120_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_120_1(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->a,cpu->t+cpu->cf); lni; } +void cpu_instr_121_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_121_1(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->a,-cpu->t+cpu->cf); lni; } +void cpu_instr_122_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_122_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrel161 cpu->cycle++; } +void cpu_instr_122_2(struct CPU* const cpu, struct Memory* const mem) { loadstackrel162 cpu->cycle++; } +void cpu_instr_122_3(struct CPU* const cpu, struct Memory* const mem) { cpu->p=wordut; lni; } +void cpu_instr_123_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_123_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrel161 cpu->cycle++; } +void cpu_instr_123_2(struct CPU* const cpu, struct Memory* const mem) { loadstackrel162 cpu->cycle++; } +void cpu_instr_123_3(struct CPU* const cpu, struct Memory* const mem) { cpu->p=wordut; lni; } +void cpu_instr_124_0(struct CPU* const cpu, struct Memory* const mem) { storeq(hibyte(cpu->p)); cpu->cycle++; } +void cpu_instr_124_1(struct CPU* const cpu, struct Memory* const mem) { storeqp1(lobyte(cpu->p)); cpu->cycle++; } +void cpu_instr_124_2(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_125_0(struct CPU* const cpu, struct Memory* const mem) { storep(hibyte(cpu->q)); cpu->cycle++; } +void cpu_instr_125_1(struct CPU* const cpu, struct Memory* const mem) { storepp1(lobyte(cpu->q)); cpu->cycle++; } +void cpu_instr_125_2(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_126_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_126_1(struct CPU* const cpu, struct Memory* const mem) { storestackrel161(cpu->p); cpu->cycle++; } +void cpu_instr_126_2(struct CPU* const cpu, struct Memory* const mem) { storestackrel162(cpu->p); cpu->cycle++; } +void cpu_instr_126_3(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_127_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_127_1(struct CPU* const cpu, struct Memory* const mem) { storestackrel161(cpu->q); cpu->cycle++; } +void cpu_instr_127_2(struct CPU* const cpu, struct Memory* const mem) { storestackrel162(cpu->q); cpu->cycle++; } +void cpu_instr_127_3(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_128_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a=cpu->b; lni; } +void cpu_instr_129_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a=cpu->c; lni; } +void cpu_instr_130_0(struct CPU* const cpu, struct Memory* const mem) { cpu->b=cpu->a; lni; } +void cpu_instr_131_0(struct CPU* const cpu, struct Memory* const mem) { cpu->b=cpu->c; lni; } +void cpu_instr_132_0(struct CPU* const cpu, struct Memory* const mem) { cpu->c=cpu->a; lni; } +void cpu_instr_133_0(struct CPU* const cpu, struct Memory* const mem) { cpu->c=cpu->b; lni; } +void cpu_instr_134_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a=lobyte(cpu->p); lni; } +void cpu_instr_135_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a=hibyte(cpu->p); lni; } +void cpu_instr_136_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a=lobyte(cpu->q); lni; } +void cpu_instr_137_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a=hibyte(cpu->q); lni; } +void cpu_instr_138_0(struct CPU* const cpu, struct Memory* const mem) { cpu->p=cpu->q; lni; } +void cpu_instr_139_0(struct CPU* const cpu, struct Memory* const mem) { cpu->p=cpu->s; lni; } +void cpu_instr_140_0(struct CPU* const cpu, struct Memory* const mem) { cpu->p=cpu->v; lni; } +void cpu_instr_141_0(struct CPU* const cpu, struct Memory* const mem) { cpu->p=cpu->i; lni; } +void cpu_instr_142_0(struct CPU* const cpu, struct Memory* const mem) { cpu->q=cpu->p; lni; } +void cpu_instr_143_0(struct CPU* const cpu, struct Memory* const mem) { cpu->s=cpu->p; lni; } +void cpu_instr_144_0(struct CPU* const cpu, struct Memory* const mem) { cpu->v=cpu->p; lni; } +void cpu_instr_145_0(struct CPU* const cpu, struct Memory* const mem) { cpu->p=wordcb; lni; } +void cpu_instr_146_0(struct CPU* const cpu, struct Memory* const mem) { cpu->u=loadp; cpu->cycle++; } +void cpu_instr_146_1(struct CPU* const cpu, struct Memory* const mem) { cpu->t=loadpp1; cpu->cycle++; } +void cpu_instr_146_2(struct CPU* const cpu, struct Memory* const mem) { cpu->p=wordut; lni; } +void cpu_instr_147_0(struct CPU* const cpu, struct Memory* const mem) { cpu->u=loadp; cpu->cycle++; } +void cpu_instr_147_1(struct CPU* const cpu, struct Memory* const mem) { cpu->t=loadpp1; cpu->cycle++; } +void cpu_instr_147_2(struct CPU* const cpu, struct Memory* const mem) { cpu->q=wordut; lni; } +void cpu_instr_148_0(struct CPU* const cpu, struct Memory* const mem) { cpu->u=loadq; cpu->cycle++; } +void cpu_instr_148_1(struct CPU* const cpu, struct Memory* const mem) { cpu->t=loadqp1; cpu->cycle++; } +void cpu_instr_148_2(struct CPU* const cpu, struct Memory* const mem) { cpu->p=wordut; lni; } +void cpu_instr_149_0(struct CPU* const cpu, struct Memory* const mem) { cpu->u=loadq; cpu->cycle++; } +void cpu_instr_149_1(struct CPU* const cpu, struct Memory* const mem) { cpu->t=loadqp1; cpu->cycle++; } +void cpu_instr_149_2(struct CPU* const cpu, struct Memory* const mem) { cpu->q=wordut; lni; } +void cpu_instr_150_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt; cpu->cycle++; } +void cpu_instr_150_1(struct CPU* const cpu, struct Memory* const mem) { storestackrel(cpu->a); cpu->cycle++; } +void cpu_instr_150_2(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_151_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt; cpu->cycle++; } +void cpu_instr_151_1(struct CPU* const cpu, struct Memory* const mem) { storestackrel(cpu->a); cpu->cycle++; } +void cpu_instr_151_2(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_152_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt; cpu->cycle++; } +void cpu_instr_152_1(struct CPU* const cpu, struct Memory* const mem) { storestackrel(cpu->a); cpu->cycle++; } +void cpu_instr_152_2(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_153_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_153_1(struct CPU* const cpu, struct Memory* const mem) { subf(cpu->b,cpu->t); lni; } +void cpu_instr_154_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_154_1(struct CPU* const cpu, struct Memory* const mem) { subf(cpu->c,cpu->t); lni; } +void cpu_instr_155_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_155_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrelu cpu->cycle++; } +void cpu_instr_155_2(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->b,cpu->u); lni; } +void cpu_instr_156_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_156_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrelu cpu->cycle++; } +void cpu_instr_156_2(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->c,cpu->u); lni; } +void cpu_instr_157_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_157_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrelu cpu->cycle++; } +void cpu_instr_157_2(struct CPU* const cpu, struct Memory* const mem) { subf(cpu->b,cpu->u); lni; } +void cpu_instr_158_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_158_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrelu cpu->cycle++; } +void cpu_instr_158_2(struct CPU* const cpu, struct Memory* const mem) { subf(cpu->c,cpu->u); lni; } +void cpu_instr_159_0(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->c,cpu->b); lni; } +void cpu_instr_160_0(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->a,cpu->b); lni; } +void cpu_instr_161_0(struct CPU* const cpu, struct Memory* const mem) { subf(cpu->a,cpu->b); lni; } +void cpu_instr_162_0(struct CPU* const cpu, struct Memory* const mem) { cmpf(cpu->a,cpu->b); lni; } +void cpu_instr_163_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a&=cpu->b; setzf(cpu->a); lni; } +void cpu_instr_164_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a|=cpu->b; setzf(cpu->a); lni; } +void cpu_instr_165_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a^=cpu->b; setzf(cpu->a); lni; } +void cpu_instr_166_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a&=~cpu->b; setzf(cpu->a); lni; } +void cpu_instr_167_0(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->a,cpu->c); lni; } +void cpu_instr_168_0(struct CPU* const cpu, struct Memory* const mem) { subf(cpu->a,cpu->c); lni; } +void cpu_instr_169_0(struct CPU* const cpu, struct Memory* const mem) { cmpf(cpu->a,cpu->c); lni; } +void cpu_instr_170_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a&=cpu->c; setzf(cpu->a); lni; } +void cpu_instr_171_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a|=cpu->c; setzf(cpu->a); lni; } +void cpu_instr_172_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a^=cpu->c; setzf(cpu->a); lni; } +void cpu_instr_173_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a&=~cpu->c; setzf(cpu->a); lni; } +void cpu_instr_174_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_174_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrelu cpu->cycle++; } +void cpu_instr_174_2(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->a,cpu->u); lni; } +void cpu_instr_175_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_175_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrelu cpu->cycle++; } +void cpu_instr_175_2(struct CPU* const cpu, struct Memory* const mem) { subf(cpu->a,cpu->u); lni; } +void cpu_instr_176_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_176_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrelu cpu->cycle++; } +void cpu_instr_176_2(struct CPU* const cpu, struct Memory* const mem) { cmpf(cpu->a,cpu->u); lni; } +void cpu_instr_177_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_177_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrelu cpu->cycle++; } +void cpu_instr_177_2(struct CPU* const cpu, struct Memory* const mem) { cpu->a&=cpu->u; setzf(cpu->a); lni; } +void cpu_instr_178_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_178_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrelu cpu->cycle++; } +void cpu_instr_178_2(struct CPU* const cpu, struct Memory* const mem) { cpu->a|=cpu->u; setzf(cpu->a); lni; } +void cpu_instr_179_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_179_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrelu cpu->cycle++; } +void cpu_instr_179_2(struct CPU* const cpu, struct Memory* const mem) { cpu->a^=cpu->u; setzf(cpu->a); lni; } +void cpu_instr_180_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_180_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrelu cpu->cycle++; } +void cpu_instr_180_2(struct CPU* const cpu, struct Memory* const mem) { cpu->a&=~cpu->u; setzf(cpu->a); lni; } +void cpu_instr_181_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_181_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrelu cpu->cycle++; } +void cpu_instr_181_2(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->a,cpu->u+cpu->cf); lni; } +void cpu_instr_182_0(struct CPU* const cpu, struct Memory* const mem) { subf(cpu->c,cpu->b); lni; } +void cpu_instr_183_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_183_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrelu cpu->cycle++; } +void cpu_instr_183_2(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->a,-cpu->u+cpu->cf); lni; } +void cpu_instr_184_0(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->a,cpu->b+cpu->cf); lni; } +void cpu_instr_185_0(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->a,-cpu->b+cpu->cf); lni; } +void cpu_instr_186_0(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->a,cpu->c+cpu->cf); lni; } +void cpu_instr_187_0(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->a,-cpu->c+cpu->cf); lni; } +void cpu_instr_188_0(struct CPU* const cpu, struct Memory* const mem) { subf(cpu->b,cpu->c); lni; } +void cpu_instr_189_0(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->b,cpu->c); lni; } +void cpu_instr_190_0(struct CPU* const cpu, struct Memory* const mem) { addf(cpu->b,cpu->a); lni; } +void cpu_instr_191_0(struct CPU* const cpu, struct Memory* const mem) { subf(cpu->b,cpu->a); lni; } +void cpu_instr_192_0(struct CPU* const cpu, struct Memory* const mem) { storepinc(cpu->a); cpu->cycle++; } +void cpu_instr_192_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_193_0(struct CPU* const cpu, struct Memory* const mem) { storepinc(cpu->b); cpu->cycle++; } +void cpu_instr_193_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_194_0(struct CPU* const cpu, struct Memory* const mem) { storepinc(cpu->c); cpu->cycle++; } +void cpu_instr_194_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_195_0(struct CPU* const cpu, struct Memory* const mem) { storeqinc(cpu->a); cpu->cycle++; } +void cpu_instr_195_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_196_0(struct CPU* const cpu, struct Memory* const mem) { storeqinc(cpu->b); cpu->cycle++; } +void cpu_instr_196_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_197_0(struct CPU* const cpu, struct Memory* const mem) { storeqinc(cpu->c); cpu->cycle++; } +void cpu_instr_197_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_198_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a=loadpinc; setzf(cpu->a); cpu->cycle++; } +void cpu_instr_198_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_199_0(struct CPU* const cpu, struct Memory* const mem) { cpu->b=loadpinc; setzf(cpu->b); cpu->cycle++; } +void cpu_instr_199_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_200_0(struct CPU* const cpu, struct Memory* const mem) { cpu->c=loadpinc; setzf(cpu->c); cpu->cycle++; } +void cpu_instr_200_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_201_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a=loadqinc; setzf(cpu->a); cpu->cycle++; } +void cpu_instr_201_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_202_0(struct CPU* const cpu, struct Memory* const mem) { cpu->b=loadqinc; setzf(cpu->b); cpu->cycle++; } +void cpu_instr_202_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_203_0(struct CPU* const cpu, struct Memory* const mem) { cpu->c=loadqinc; setzf(cpu->c); cpu->cycle++; } +void cpu_instr_203_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_204_0(struct CPU* const cpu, struct Memory* const mem) { cpu->u=loadpinc; cpu->cycle++; } +void cpu_instr_204_1(struct CPU* const cpu, struct Memory* const mem) { cpu->t=loadpinc; cpu->cycle++; } +void cpu_instr_204_2(struct CPU* const cpu, struct Memory* const mem) { cpu->q=wordut; lni; } +void cpu_instr_205_0(struct CPU* const cpu, struct Memory* const mem) { cpu->u=loadqinc; cpu->cycle++; } +void cpu_instr_205_1(struct CPU* const cpu, struct Memory* const mem) { cpu->t=loadqinc; cpu->cycle++; } +void cpu_instr_205_2(struct CPU* const cpu, struct Memory* const mem) { cpu->p=wordut; lni; } +void cpu_instr_206_0(struct CPU* const cpu, struct Memory* const mem) { storeqinc(hibyte(cpu->p)); cpu->cycle++; } +void cpu_instr_206_1(struct CPU* const cpu, struct Memory* const mem) { storeqinc(lobyte(cpu->p)); cpu->cycle++; } +void cpu_instr_206_2(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_207_0(struct CPU* const cpu, struct Memory* const mem) { storepinc(hibyte(cpu->q)); cpu->cycle++; } +void cpu_instr_207_1(struct CPU* const cpu, struct Memory* const mem) { storepinc(lobyte(cpu->q)); cpu->cycle++; } +void cpu_instr_207_2(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_208_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_208_1(struct CPU* const cpu, struct Memory* const mem) { cpu->a<<=cpu->t; setzf(cpu->a); lni; } +void cpu_instr_209_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_209_1(struct CPU* const cpu, struct Memory* const mem) { cpu->a>>=cpu->t; setzf(cpu->a); lni; } +void cpu_instr_210_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_210_1(struct CPU* const cpu, struct Memory* const mem) { cpu->a=rol(cpu->a,cpu->t); setzf(cpu->a); lni; } +void cpu_instr_211_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_211_1(struct CPU* const cpu, struct Memory* const mem) { cpu->a=ror(cpu->a,cpu->t); setzf(cpu->a); lni; } +void cpu_instr_212_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_212_1(struct CPU* const cpu, struct Memory* const mem) { cpu->a=sra(cpu->a,cpu->t); setzf(cpu->a); lni; } +void cpu_instr_213_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_213_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrelu cpu->cycle++; } +void cpu_instr_213_2(struct CPU* const cpu, struct Memory* const mem) { cpu->a<<=cpu->u; setzf(cpu->a); lni; } +void cpu_instr_214_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_214_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrelu cpu->cycle++; } +void cpu_instr_214_2(struct CPU* const cpu, struct Memory* const mem) { cpu->a>>=cpu->u; setzf(cpu->a); lni; } +void cpu_instr_215_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_215_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrelu cpu->cycle++; } +void cpu_instr_215_2(struct CPU* const cpu, struct Memory* const mem) { cpu->a=rol(cpu->a,cpu->u); setzf(cpu->a); lni; } +void cpu_instr_216_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_216_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrelu cpu->cycle++; } +void cpu_instr_216_2(struct CPU* const cpu, struct Memory* const mem) { cpu->a=ror(cpu->a,cpu->u); setzf(cpu->a); lni; } +void cpu_instr_217_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; } +void cpu_instr_217_1(struct CPU* const cpu, struct Memory* const mem) { loadstackrelu cpu->cycle++; } +void cpu_instr_217_2(struct CPU* const cpu, struct Memory* const mem) { cpu->a=sra(cpu->a,cpu->u); setzf(cpu->a); lni; } +void cpu_instr_218_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a<<=cpu->b; setzf(cpu->a); lni; } +void cpu_instr_219_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a>>=cpu->b; setzf(cpu->a); lni; } +void cpu_instr_220_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a=rol(cpu->a,cpu->b); setzf(cpu->a); lni; } +void cpu_instr_221_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a=ror(cpu->a,cpu->b); setzf(cpu->a); lni; } +void cpu_instr_222_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a=sra(cpu->a,cpu->b); setzf(cpu->a); lni; } +void cpu_instr_223_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a<<=cpu->c; setzf(cpu->a); lni; } +void cpu_instr_224_0(struct CPU* const cpu, struct Memory* const mem) { cpu->q=wordcb; lni; } +void cpu_instr_225_0(struct CPU* const cpu, struct Memory* const mem) { pop161 cpu->cycle++; } +void cpu_instr_225_1(struct CPU* const cpu, struct Memory* const mem) { pop162 cpu->cycle++; } +void cpu_instr_225_2(struct CPU* const cpu, struct Memory* const mem) { jmpabsutplus1 } +void cpu_instr_226_0(struct CPU* const cpu, struct Memory* const mem) { loadimm161 cpu->cycle++; } +void cpu_instr_226_1(struct CPU* const cpu, struct Memory* const mem) { loadimm162 cpu->cycle++; } +void cpu_instr_226_2(struct CPU* const cpu, struct Memory* const mem) { pushretaddr1 cpu->cycle++; } +void cpu_instr_226_3(struct CPU* const cpu, struct Memory* const mem) { pushretaddr2 cpu->cycle++; } +void cpu_instr_226_4(struct CPU* const cpu, struct Memory* const mem) { jmpabsut } +void cpu_instr_228_0(struct CPU* const cpu, struct Memory* const mem) { pushretaddr1 cpu->cycle++; } +void cpu_instr_228_1(struct CPU* const cpu, struct Memory* const mem) { pushretaddr2 cpu->cycle++; } +void cpu_instr_228_2(struct CPU* const cpu, struct Memory* const mem) { jmpabsp } +void cpu_instr_229_0(struct CPU* const cpu, struct Memory* const mem) { pushretaddr1 cpu->cycle++; } +void cpu_instr_229_1(struct CPU* const cpu, struct Memory* const mem) { pushretaddr2 cpu->cycle++; } +void cpu_instr_229_2(struct CPU* const cpu, struct Memory* const mem) { jmpabsq } +void cpu_instr_230_0(struct CPU* const cpu, struct Memory* const mem) { cpu->p+=signed8(cpu->b); lni; } +void cpu_instr_231_0(struct CPU* const cpu, struct Memory* const mem) { cpu->q+=signed8(cpu->b); lni; } +void cpu_instr_232_0(struct CPU* const cpu, struct Memory* const mem) { cpu->s+=signed8(cpu->b); lni; } +void cpu_instr_233_0(struct CPU* const cpu, struct Memory* const mem) { int f = cpu->nz | (cpu->cf<<1); pushbyte(f); cpu->cycle++; } +void cpu_instr_233_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_234_0(struct CPU* const cpu, struct Memory* const mem) { int f=popbyte; cpu->nz = f&1; cpu->cf = (f>>1)&1; cpu->cycle++; } +void cpu_instr_234_1(struct CPU* const cpu, struct Memory* const mem) { lni; } +void cpu_instr_240_0(struct CPU* const cpu, struct Memory* const mem) { cpu->rfg=0; lni; } +void cpu_instr_241_0(struct CPU* const cpu, struct Memory* const mem) { cpu->rfg=1; lni; } +void cpu_instr_242_0(struct CPU* const cpu, struct Memory* const mem) { cpu->irq=0; cpu->ifg=1; int t=cpu->i; cpu->i=cpu->v; cpu->v=(t-1)%65536; lni; } +void cpu_instr_243_0(struct CPU* const cpu, struct Memory* const mem) { cpu->ifg=1; int t=cpu->i; cpu->i=cpu->v; cpu->v=t; lni; } +void cpu_instr_244_0(struct CPU* const cpu, struct Memory* const mem) { cpu->ifg=0; int t=cpu->i; cpu->i=cpu->v; cpu->v=t; lni; } +void cpu_instr_255_0(struct CPU* const cpu, struct Memory* const mem) { lni; } + +CPUInstruction CPUInstructions[256][8] = { + {cpu_instr_0_0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {cpu_instr_16_0,0,0,0,0,0,0,0}, + {cpu_instr_17_0,0,0,0,0,0,0,0}, + {cpu_instr_18_0,0,0,0,0,0,0,0}, + {cpu_instr_19_0,0,0,0,0,0,0,0}, + {cpu_instr_20_0,0,0,0,0,0,0,0}, + {cpu_instr_21_0,0,0,0,0,0,0,0}, + {cpu_instr_22_0,0,0,0,0,0,0,0}, + {cpu_instr_23_0,0,0,0,0,0,0,0}, + {cpu_instr_24_0,0,0,0,0,0,0,0}, + {cpu_instr_25_0,0,0,0,0,0,0,0}, + {cpu_instr_26_0,0,0,0,0,0,0,0}, + {cpu_instr_27_0,0,0,0,0,0,0,0}, + {cpu_instr_28_0,0,0,0,0,0,0,0}, + {cpu_instr_29_0,0,0,0,0,0,0,0}, + {cpu_instr_30_0,0,0,0,0,0,0,0}, + {cpu_instr_31_0,0,0,0,0,0,0,0}, + {cpu_instr_32_0,cpu_instr_32_1,0,0,0,0,0,0}, + {cpu_instr_33_0,cpu_instr_33_1,cpu_instr_33_2,0,0,0,0,0}, + {cpu_instr_34_0,cpu_instr_34_1,cpu_instr_34_2,0,0,0,0,0}, + {cpu_instr_35_0,cpu_instr_35_1,cpu_instr_35_2,0,0,0,0,0}, + {cpu_instr_36_0,cpu_instr_36_1,0,0,0,0,0,0}, + {cpu_instr_37_0,cpu_instr_37_1,cpu_instr_37_2,0,0,0,0,0}, + {cpu_instr_38_0,cpu_instr_38_1,0,0,0,0,0,0}, + {cpu_instr_39_0,cpu_instr_39_1,0,0,0,0,0,0}, + {cpu_instr_40_0,cpu_instr_40_1,cpu_instr_40_2,0,0,0,0,0}, + {cpu_instr_41_0,cpu_instr_41_1,cpu_instr_41_2,0,0,0,0,0}, + {cpu_instr_42_0,cpu_instr_42_1,cpu_instr_42_2,0,0,0,0,0}, + {cpu_instr_43_0,cpu_instr_43_1,cpu_instr_43_2,cpu_instr_43_3,0,0,0,0}, + {cpu_instr_44_0,cpu_instr_44_1,cpu_instr_44_2,cpu_instr_44_3,0,0,0,0}, + {cpu_instr_45_0,cpu_instr_45_1,cpu_instr_45_2,cpu_instr_45_3,0,0,0,0}, + {cpu_instr_46_0,cpu_instr_46_1,cpu_instr_46_2,0,0,0,0,0}, + {cpu_instr_47_0,0,0,0,0,0,0,0}, + {cpu_instr_48_0,cpu_instr_48_1,0,0,0,0,0,0}, + {cpu_instr_49_0,cpu_instr_49_1,0,0,0,0,0,0}, + {cpu_instr_50_0,cpu_instr_50_1,0,0,0,0,0,0}, + {cpu_instr_51_0,cpu_instr_51_1,0,0,0,0,0,0}, + {cpu_instr_52_0,cpu_instr_52_1,0,0,0,0,0,0}, + {cpu_instr_53_0,cpu_instr_53_1,0,0,0,0,0,0}, + {cpu_instr_54_0,cpu_instr_54_1,0,0,0,0,0,0}, + {cpu_instr_55_0,0,0,0,0,0,0,0}, + {cpu_instr_56_0,0,0,0,0,0,0,0}, + {cpu_instr_57_0,0,0,0,0,0,0,0}, + {cpu_instr_58_0,0,0,0,0,0,0,0}, + {cpu_instr_59_0,cpu_instr_59_1,cpu_instr_59_2,0,0,0,0,0}, + {cpu_instr_60_0,cpu_instr_60_1,cpu_instr_60_2,cpu_instr_60_3,cpu_instr_60_4,0,0,0}, + {0,0,0,0,0,0,0,0}, + {cpu_instr_62_0,0,0,0,0,0,0,0}, + {cpu_instr_63_0,0,0,0,0,0,0,0}, + {cpu_instr_64_0,cpu_instr_64_1,0,0,0,0,0,0}, + {cpu_instr_65_0,cpu_instr_65_1,cpu_instr_65_2,0,0,0,0,0}, + {cpu_instr_66_0,cpu_instr_66_1,0,0,0,0,0,0}, + {cpu_instr_67_0,cpu_instr_67_1,cpu_instr_67_2,0,0,0,0,0}, + {cpu_instr_68_0,cpu_instr_68_1,0,0,0,0,0,0}, + {cpu_instr_69_0,cpu_instr_69_1,0,0,0,0,0,0}, + {cpu_instr_70_0,cpu_instr_70_1,cpu_instr_70_2,0,0,0,0,0}, + {cpu_instr_71_0,cpu_instr_71_1,0,0,0,0,0,0}, + {cpu_instr_72_0,cpu_instr_72_1,0,0,0,0,0,0}, + {cpu_instr_73_0,cpu_instr_73_1,cpu_instr_73_2,0,0,0,0,0}, + {cpu_instr_74_0,cpu_instr_74_1,0,0,0,0,0,0}, + {cpu_instr_75_0,cpu_instr_75_1,0,0,0,0,0,0}, + {cpu_instr_76_0,cpu_instr_76_1,0,0,0,0,0,0}, + {cpu_instr_77_0,0,0,0,0,0,0,0}, + {cpu_instr_78_0,0,0,0,0,0,0,0}, + {cpu_instr_79_0,0,0,0,0,0,0,0}, + {cpu_instr_80_0,cpu_instr_80_1,cpu_instr_80_2,cpu_instr_80_3,0,0,0,0}, + {cpu_instr_81_0,cpu_instr_81_1,cpu_instr_81_2,cpu_instr_81_3,0,0,0,0}, + {cpu_instr_82_0,cpu_instr_82_1,0,0,0,0,0,0}, + {cpu_instr_83_0,cpu_instr_83_1,0,0,0,0,0,0}, + {cpu_instr_84_0,cpu_instr_84_1,0,0,0,0,0,0}, + {cpu_instr_85_0,cpu_instr_85_1,0,0,0,0,0,0}, + {cpu_instr_86_0,cpu_instr_86_1,cpu_instr_86_2,cpu_instr_86_3,0,0,0,0}, + {cpu_instr_87_0,cpu_instr_87_1,cpu_instr_87_2,cpu_instr_87_3,0,0,0,0}, + {cpu_instr_88_0,cpu_instr_88_1,cpu_instr_88_2,cpu_instr_88_3,0,0,0,0}, + {cpu_instr_89_0,cpu_instr_89_1,cpu_instr_89_2,cpu_instr_89_3,0,0,0,0}, + {cpu_instr_90_0,cpu_instr_90_1,0,0,0,0,0,0}, + {cpu_instr_91_0,cpu_instr_91_1,0,0,0,0,0,0}, + {cpu_instr_92_0,cpu_instr_92_1,0,0,0,0,0,0}, + {cpu_instr_93_0,cpu_instr_93_1,0,0,0,0,0,0}, + {cpu_instr_94_0,cpu_instr_94_1,0,0,0,0,0,0}, + {cpu_instr_95_0,cpu_instr_95_1,0,0,0,0,0,0}, + {cpu_instr_96_0,cpu_instr_96_1,cpu_instr_96_2,0,0,0,0,0}, + {cpu_instr_97_0,cpu_instr_97_1,0,0,0,0,0,0}, + {cpu_instr_98_0,cpu_instr_98_1,0,0,0,0,0,0}, + {cpu_instr_99_0,cpu_instr_99_1,cpu_instr_99_2,0,0,0,0,0}, + {cpu_instr_100_0,0,0,0,0,0,0,0}, + {cpu_instr_101_0,cpu_instr_101_1,0,0,0,0,0,0}, + {cpu_instr_102_0,0,0,0,0,0,0,0}, + {cpu_instr_103_0,cpu_instr_103_1,0,0,0,0,0,0}, + {cpu_instr_104_0,cpu_instr_104_1,cpu_instr_104_2,cpu_instr_104_3,cpu_instr_104_4,0,0,0}, + {0,0,0,0,0,0,0,0}, + {cpu_instr_106_0,cpu_instr_106_1,cpu_instr_106_2,cpu_instr_106_3,cpu_instr_106_4,0,0,0}, + {0,0,0,0,0,0,0,0}, + {cpu_instr_108_0,cpu_instr_108_1,cpu_instr_108_2,cpu_instr_108_3,cpu_instr_108_4,0,0,0}, + {0,0,0,0,0,0,0,0}, + {cpu_instr_110_0,cpu_instr_110_1,cpu_instr_110_2,cpu_instr_110_3,cpu_instr_110_4,0,0,0}, + {0,0,0,0,0,0,0,0}, + {cpu_instr_112_0,cpu_instr_112_1,0,0,0,0,0,0}, + {cpu_instr_113_0,cpu_instr_113_1,0,0,0,0,0,0}, + {cpu_instr_114_0,cpu_instr_114_1,0,0,0,0,0,0}, + {cpu_instr_115_0,cpu_instr_115_1,0,0,0,0,0,0}, + {cpu_instr_116_0,cpu_instr_116_1,0,0,0,0,0,0}, + {cpu_instr_117_0,cpu_instr_117_1,0,0,0,0,0,0}, + {cpu_instr_118_0,cpu_instr_118_1,0,0,0,0,0,0}, + {cpu_instr_119_0,cpu_instr_119_1,0,0,0,0,0,0}, + {cpu_instr_120_0,cpu_instr_120_1,0,0,0,0,0,0}, + {cpu_instr_121_0,cpu_instr_121_1,0,0,0,0,0,0}, + {cpu_instr_122_0,cpu_instr_122_1,cpu_instr_122_2,cpu_instr_122_3,0,0,0,0}, + {cpu_instr_123_0,cpu_instr_123_1,cpu_instr_123_2,cpu_instr_123_3,0,0,0,0}, + {cpu_instr_124_0,cpu_instr_124_1,cpu_instr_124_2,0,0,0,0,0}, + {cpu_instr_125_0,cpu_instr_125_1,cpu_instr_125_2,0,0,0,0,0}, + {cpu_instr_126_0,cpu_instr_126_1,cpu_instr_126_2,cpu_instr_126_3,0,0,0,0}, + {cpu_instr_127_0,cpu_instr_127_1,cpu_instr_127_2,cpu_instr_127_3,0,0,0,0}, + {cpu_instr_128_0,0,0,0,0,0,0,0}, + {cpu_instr_129_0,0,0,0,0,0,0,0}, + {cpu_instr_130_0,0,0,0,0,0,0,0}, + {cpu_instr_131_0,0,0,0,0,0,0,0}, + {cpu_instr_132_0,0,0,0,0,0,0,0}, + {cpu_instr_133_0,0,0,0,0,0,0,0}, + {cpu_instr_134_0,0,0,0,0,0,0,0}, + {cpu_instr_135_0,0,0,0,0,0,0,0}, + {cpu_instr_136_0,0,0,0,0,0,0,0}, + {cpu_instr_137_0,0,0,0,0,0,0,0}, + {cpu_instr_138_0,0,0,0,0,0,0,0}, + {cpu_instr_139_0,0,0,0,0,0,0,0}, + {cpu_instr_140_0,0,0,0,0,0,0,0}, + {cpu_instr_141_0,0,0,0,0,0,0,0}, + {cpu_instr_142_0,0,0,0,0,0,0,0}, + {cpu_instr_143_0,0,0,0,0,0,0,0}, + {cpu_instr_144_0,0,0,0,0,0,0,0}, + {cpu_instr_145_0,0,0,0,0,0,0,0}, + {cpu_instr_146_0,cpu_instr_146_1,cpu_instr_146_2,0,0,0,0,0}, + {cpu_instr_147_0,cpu_instr_147_1,cpu_instr_147_2,0,0,0,0,0}, + {cpu_instr_148_0,cpu_instr_148_1,cpu_instr_148_2,0,0,0,0,0}, + {cpu_instr_149_0,cpu_instr_149_1,cpu_instr_149_2,0,0,0,0,0}, + {cpu_instr_150_0,cpu_instr_150_1,cpu_instr_150_2,0,0,0,0,0}, + {cpu_instr_151_0,cpu_instr_151_1,cpu_instr_151_2,0,0,0,0,0}, + {cpu_instr_152_0,cpu_instr_152_1,cpu_instr_152_2,0,0,0,0,0}, + {cpu_instr_153_0,cpu_instr_153_1,0,0,0,0,0,0}, + {cpu_instr_154_0,cpu_instr_154_1,0,0,0,0,0,0}, + {cpu_instr_155_0,cpu_instr_155_1,cpu_instr_155_2,0,0,0,0,0}, + {cpu_instr_156_0,cpu_instr_156_1,cpu_instr_156_2,0,0,0,0,0}, + {cpu_instr_157_0,cpu_instr_157_1,cpu_instr_157_2,0,0,0,0,0}, + {cpu_instr_158_0,cpu_instr_158_1,cpu_instr_158_2,0,0,0,0,0}, + {cpu_instr_159_0,0,0,0,0,0,0,0}, + {cpu_instr_160_0,0,0,0,0,0,0,0}, + {cpu_instr_161_0,0,0,0,0,0,0,0}, + {cpu_instr_162_0,0,0,0,0,0,0,0}, + {cpu_instr_163_0,0,0,0,0,0,0,0}, + {cpu_instr_164_0,0,0,0,0,0,0,0}, + {cpu_instr_165_0,0,0,0,0,0,0,0}, + {cpu_instr_166_0,0,0,0,0,0,0,0}, + {cpu_instr_167_0,0,0,0,0,0,0,0}, + {cpu_instr_168_0,0,0,0,0,0,0,0}, + {cpu_instr_169_0,0,0,0,0,0,0,0}, + {cpu_instr_170_0,0,0,0,0,0,0,0}, + {cpu_instr_171_0,0,0,0,0,0,0,0}, + {cpu_instr_172_0,0,0,0,0,0,0,0}, + {cpu_instr_173_0,0,0,0,0,0,0,0}, + {cpu_instr_174_0,cpu_instr_174_1,cpu_instr_174_2,0,0,0,0,0}, + {cpu_instr_175_0,cpu_instr_175_1,cpu_instr_175_2,0,0,0,0,0}, + {cpu_instr_176_0,cpu_instr_176_1,cpu_instr_176_2,0,0,0,0,0}, + {cpu_instr_177_0,cpu_instr_177_1,cpu_instr_177_2,0,0,0,0,0}, + {cpu_instr_178_0,cpu_instr_178_1,cpu_instr_178_2,0,0,0,0,0}, + {cpu_instr_179_0,cpu_instr_179_1,cpu_instr_179_2,0,0,0,0,0}, + {cpu_instr_180_0,cpu_instr_180_1,cpu_instr_180_2,0,0,0,0,0}, + {cpu_instr_181_0,cpu_instr_181_1,cpu_instr_181_2,0,0,0,0,0}, + {cpu_instr_182_0,0,0,0,0,0,0,0}, + {cpu_instr_183_0,cpu_instr_183_1,cpu_instr_183_2,0,0,0,0,0}, + {cpu_instr_184_0,0,0,0,0,0,0,0}, + {cpu_instr_185_0,0,0,0,0,0,0,0}, + {cpu_instr_186_0,0,0,0,0,0,0,0}, + {cpu_instr_187_0,0,0,0,0,0,0,0}, + {cpu_instr_188_0,0,0,0,0,0,0,0}, + {cpu_instr_189_0,0,0,0,0,0,0,0}, + {cpu_instr_190_0,0,0,0,0,0,0,0}, + {cpu_instr_191_0,0,0,0,0,0,0,0}, + {cpu_instr_192_0,cpu_instr_192_1,0,0,0,0,0,0}, + {cpu_instr_193_0,cpu_instr_193_1,0,0,0,0,0,0}, + {cpu_instr_194_0,cpu_instr_194_1,0,0,0,0,0,0}, + {cpu_instr_195_0,cpu_instr_195_1,0,0,0,0,0,0}, + {cpu_instr_196_0,cpu_instr_196_1,0,0,0,0,0,0}, + {cpu_instr_197_0,cpu_instr_197_1,0,0,0,0,0,0}, + {cpu_instr_198_0,cpu_instr_198_1,0,0,0,0,0,0}, + {cpu_instr_199_0,cpu_instr_199_1,0,0,0,0,0,0}, + {cpu_instr_200_0,cpu_instr_200_1,0,0,0,0,0,0}, + {cpu_instr_201_0,cpu_instr_201_1,0,0,0,0,0,0}, + {cpu_instr_202_0,cpu_instr_202_1,0,0,0,0,0,0}, + {cpu_instr_203_0,cpu_instr_203_1,0,0,0,0,0,0}, + {cpu_instr_204_0,cpu_instr_204_1,cpu_instr_204_2,0,0,0,0,0}, + {cpu_instr_205_0,cpu_instr_205_1,cpu_instr_205_2,0,0,0,0,0}, + {cpu_instr_206_0,cpu_instr_206_1,cpu_instr_206_2,0,0,0,0,0}, + {cpu_instr_207_0,cpu_instr_207_1,cpu_instr_207_2,0,0,0,0,0}, + {cpu_instr_208_0,cpu_instr_208_1,0,0,0,0,0,0}, + {cpu_instr_209_0,cpu_instr_209_1,0,0,0,0,0,0}, + {cpu_instr_210_0,cpu_instr_210_1,0,0,0,0,0,0}, + {cpu_instr_211_0,cpu_instr_211_1,0,0,0,0,0,0}, + {cpu_instr_212_0,cpu_instr_212_1,0,0,0,0,0,0}, + {cpu_instr_213_0,cpu_instr_213_1,cpu_instr_213_2,0,0,0,0,0}, + {cpu_instr_214_0,cpu_instr_214_1,cpu_instr_214_2,0,0,0,0,0}, + {cpu_instr_215_0,cpu_instr_215_1,cpu_instr_215_2,0,0,0,0,0}, + {cpu_instr_216_0,cpu_instr_216_1,cpu_instr_216_2,0,0,0,0,0}, + {cpu_instr_217_0,cpu_instr_217_1,cpu_instr_217_2,0,0,0,0,0}, + {cpu_instr_218_0,0,0,0,0,0,0,0}, + {cpu_instr_219_0,0,0,0,0,0,0,0}, + {cpu_instr_220_0,0,0,0,0,0,0,0}, + {cpu_instr_221_0,0,0,0,0,0,0,0}, + {cpu_instr_222_0,0,0,0,0,0,0,0}, + {cpu_instr_223_0,0,0,0,0,0,0,0}, + {cpu_instr_224_0,0,0,0,0,0,0,0}, + {cpu_instr_225_0,cpu_instr_225_1,cpu_instr_225_2,0,0,0,0,0}, + {cpu_instr_226_0,cpu_instr_226_1,cpu_instr_226_2,cpu_instr_226_3,cpu_instr_226_4,0,0,0}, + {0,0,0,0,0,0,0,0}, + {cpu_instr_228_0,cpu_instr_228_1,cpu_instr_228_2,0,0,0,0,0}, + {cpu_instr_229_0,cpu_instr_229_1,cpu_instr_229_2,0,0,0,0,0}, + {cpu_instr_230_0,0,0,0,0,0,0,0}, + {cpu_instr_231_0,0,0,0,0,0,0,0}, + {cpu_instr_232_0,0,0,0,0,0,0,0}, + {cpu_instr_233_0,cpu_instr_233_1,0,0,0,0,0,0}, + {cpu_instr_234_0,cpu_instr_234_1,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {cpu_instr_240_0,0,0,0,0,0,0,0}, + {cpu_instr_241_0,0,0,0,0,0,0,0}, + {cpu_instr_242_0,0,0,0,0,0,0,0}, + {cpu_instr_243_0,0,0,0,0,0,0,0}, + {cpu_instr_244_0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {0,0,0,0,0,0,0,0}, + {cpu_instr_255_0,0,0,0,0,0,0,0}, +}; diff --git a/emulator/keycodes.lua b/emulator/keycodes.lua new file mode 100644 index 0000000..9e40dc5 --- /dev/null +++ b/emulator/keycodes.lua @@ -0,0 +1,111 @@ + +return { + ["backspace"] = 8, + ["tab"] = 9, + ["return"] = 13, + + ["lshift"] = 16, + ["lcontrol"] = 17, + ["lalt"] = 18, + + -- this block does not match vkey codes + ["rshift"] = 20, + ["rcontrol"] = 21, + ["ralt"] = 22, + + -- this block does not match vkey codes + [";"] = 24, + ["="] = 25, + [","] = 26, + ["."] = 27, + ["/"] = 29, + ["`"] = 30, + + ["space"] = 32, + ["pageup"] = 33, + ["pagedown"] = 34, + ["end"] = 35, + ["home"] = 36, + ["left"] = 37, + ["up"] = 38, + ["right"] = 39, + ["down"] = 40, + ["insert"] = 45, + ["delete"] = 46, + + ["0"] = 48, + ["1"] = 49, + ["2"] = 50, + ["3"] = 51, + ["4"] = 52, + ["5"] = 53, + ["6"] = 54, + ["7"] = 55, + ["8"] = 56, + ["9"] = 57, + + -- this block does not match vkey codes + ["["] = 60, + ["\\"] = 61, + ["]"] = 62, + ["\'"] = 63, --["apostrophe"] = 63, + + ["a"] = 65, + ["b"] = 66, + ["c"] = 67, + ["d"] = 68, + ["e"] = 69, + ["f"] = 70, + ["g"] = 71, + ["h"] = 72, + ["i"] = 73, + ["j"] = 74, + ["k"] = 75, + ["l"] = 76, + ["m"] = 77, + ["n"] = 78, + ["o"] = 79, + ["p"] = 80, + ["q"] = 81, + ["r"] = 82, + ["s"] = 83, + ["t"] = 84, + ["u"] = 85, + ["v"] = 86, + ["w"] = 87, + ["x"] = 88, + ["y"] = 89, + ["z"] = 90, + + ["kp0"] = 96, --["numpad0"] = 96, + ["kp1"] = 97, --["numpad1"] = 97, + ["kp2"] = 98, --["numpad2"] = 98, + ["kp3"] = 99, --["numpad3"] = 99, + ["kp4"] = 100, --["numpad4"] = 100, + ["kp5"] = 101, --["numpad5"] = 101, + ["kp6"] = 102, --["numpad6"] = 102, + ["kp7"] = 103, --["numpad7"] = 103, + ["kp8"] = 104, --["numpad8"] = 104, + ["kp9"] = 105, --["numpad9"] = 105, + ["kp*"] = 106, --["*"] = 106, + ["kp+"] = 107, --["+"] = 107, + ["kpenter"] = 108, --["numpadenter"] = 108, + ["kp-"] = 109, --["minus"] = 109, + ["kp."] = 110, --["numpaddecimal"] = 110, + ["kp/"] = 111, --["/"] = 111, + + ["f1"] = 112, + ["f2"] = 113, + ["f3"] = 114, + ["f4"] = 115, + ["f5"] = 116, + ["f6"] = 117, + ["f7"] = 118, + ["f8"] = 119, + ["f9"] = 120, + ["f10"] = 121, + ["f11"] = 122, + ["f12"] = 123, + + ["invalid"] = 127, +} diff --git a/emulator/main.lua b/emulator/main.lua new file mode 100644 index 0000000..ce8bf5c --- /dev/null +++ b/emulator/main.lua @@ -0,0 +1 @@ +require("8608emulator") diff --git a/instructionList.txt b/instructionList.txt index e839794..062bb90 100644 --- a/instructionList.txt +++ b/instructionList.txt @@ -35,6 +35,9 @@ tst *s+imm8 2E 3 Set flags according to *(S+imm8)-0 adp imm8 4A 2 P+=imm8 signed adq imm8 4B 2 Q+=imm8 signed ads imm8 4C 2 S+=imm8 signed +adp b E6 1 P+=B signed +adq b E7 1 Q+=B signed +ads b E8 1 S+=B signed 8-bit Arithmetic/Logic (A): add imm8 24 2 A+=imm8, set flags @@ -133,11 +136,13 @@ Stack (S): psh a 40 2 *(S++)=A psh b 44 2 *(S++)=B psh c 45 2 *(S++)=C +psh f E9 2 *(S++)=F psh p 41 3 *(S++++)=P psh q 46 3 *(S++++)=Q pop a 42 2 A=*(--S) pop b 47 2 B=*(--S) pop c 48 2 C=*(--S) +pop f EA 2 F=*(--S) pop p 43 3 P=*(----S) pop q 49 3 Q=*(----S) psh imm8 3B 3 *(S++)=imm8 @@ -233,7 +238,7 @@ ldq p 8E 1 Q=P lds p 8F 1 S=P ldv p 90 1 V=P -Opcodes used: 221/255 +Opcodes used: 226/255 0123456789ABCDEF 00 | C--------------- 10 | UUIIUIIUUUUUUUUU @@ -249,5 +254,5 @@ A0 | AAAAAAAAAAAAAAAA B0 | AAAAAAAAAAAAAAAA C0 | BBBBBBBBBBBBWWWW D0 | AAAAAAAAAAAAAAAA -E0 | MJJJJJ---------- +E0 | MJJJJJXXXSS----- F0 | CCCCC----------C diff --git a/rom-8608-defs.lua b/rom-8608-defs.lua index 34417ec..0838e59 100644 --- a/rom-8608-defs.lua +++ b/rom-8608-defs.lua @@ -17,14 +17,14 @@ roms = { } }, { pos = {-34, 16, 17}, size = {32, 32, 32}, signals = { "_", "_", "_", "_", "_", "_", "_", "_", - "_", "_", "memSaveNZ", "instrPre", "instrLoadPre", "always1", "instrLoadSel", "adrOut", + "_", "memSaveF", "memSaveNZ", "instrPre", "instrLoadPre", "always1", "instrLoadSel", "adrOut", "memWriteAlur", "memSave", "instrNext0NZ", "instrNext0Z", "instrNext0NC", "instrNext0C", "instrLoadSub", "instrLoad", "instrNext2", "instrNext1", "instrNext0", "memSaveU", "memSaveT", "memSaveC", "memSaveB", "memSaveA", } }, { pos = {66, 16, 0}, size = {32, 32, 32}, signals = { "adrr1", "adrrm1", "adrrm2", "adrr2", "adwrm1", "adwrm2", "adwr2", "adwr1", "memRead", "memWrite", "runFlgVal", "runFlgClk", "intFlgVal", "intFlgClk", "irqFlgClk", "always1", - "aluShiftArith", "aluShiftRoll", "aluShiftRight", "aluShift", "_", "_", "_", "_", + "aluShiftArith", "aluShiftRoll", "aluShiftRight", "aluShift", "alurF", "_", "_", "_", "_", "_", "_", "_", "_", "_", "_", "_", } }, }, @@ -130,239 +130,244 @@ operations = { instructions = { { category = "Control", catlet="C" }, - { mnem="rst" , opcode=0x00, {"base","intFlgClk","irqFlgClk","runFlgClk","runFlgVal","clearRegs","loadInstr"}, desc="Clear all registers and set I=0" }, - { mnem="hlt" , opcode=0xF0, {"runFlgClk","instrNext"}, desc="Halt non-interrupt execution" }, - { mnem="run" , opcode=0xF1, {"runFlgClk","runFlgVal","instrNext"}, desc ="Resume non-interrupt execution" }, - { mnem="int" , opcode=0xF2, {"instrSwapIV","intFlgVal","intFlgClk","irqFlgClk"}, }, - { mnem="brk" , opcode=0xF3, {"instrSwapIV","adwInc","intFlgVal","intFlgClk"}, desc="Trigger interrupt" }, - { mnem="irt" , opcode=0xF4, {"instrSwapIV","adwInc","intFlgClk"}, desc="Return from interrupt" }, - { mnem="nop" , opcode=0xFF, {"instrNext"}, desc="Do nothing" }, + { mnem="rst" , opcode=0x00, {"base","intFlgClk","irqFlgClk","runFlgClk","runFlgVal","clearRegs","loadInstr"}, desc="Clear all registers and set I=0", ccode={"cpu.a=0; cpu.b=0; cpu.c=0; cpu.u=0; cpu.t=0; cpu.p=0; cpu.q=0; cpu.s=0; cpu.v=0; cpu.i=0; cpu.cf=0; cpu.nz=0; cpu.irq=0; cpu.ifg=0; cpu.rfg=1; lni;"} }, + { mnem="hlt" , opcode=0xF0, {"runFlgClk","instrNext"}, desc="Halt non-interrupt execution", ccode={"cpu.rfg=0; lni;"} }, + { mnem="run" , opcode=0xF1, {"runFlgClk","runFlgVal","instrNext"}, desc ="Resume non-interrupt execution", ccode={"cpu.rfg=1; lni;"} }, + { mnem="int" , opcode=0xF2, {"instrSwapIV","intFlgVal","intFlgClk","irqFlgClk"}, ccode={"cpu.irq=0; cpu.ifg=1; int t=cpu.i; cpu.i=cpu.v; cpu.v=(t-1)%65536; lni;"} }, + { mnem="brk" , opcode=0xF3, {"instrSwapIV","adwInc","intFlgVal","intFlgClk"}, desc="Trigger interrupt", ccode={"cpu.ifg=1; int t=cpu.i; cpu.i=cpu.v; cpu.v=t; lni;"} }, + { mnem="irt" , opcode=0xF4, {"instrSwapIV","adwInc","intFlgClk"}, desc="Return from interrupt", ccode={"cpu.ifg=0; int t=cpu.i; cpu.i=cpu.v; cpu.v=t; lni;"} }, + { mnem="nop" , opcode=0xFF, {"instrNext"}, desc="Do nothing", ccode={"lni;"}, }, { category = "16-bit Inc/Dec", catlet="I" }, - { mnem="inc p" , opcode=0x12, {"adwlP","adwInc","adwSaveP","instrNext"}, desc="P++" }, - { mnem="dec p" , opcode=0x15, {"adwlP","adwrm1","adwSaveP","instrNext"}, desc="P--" }, - { mnem="inc q" , opcode=0x13, {"adwlQ","adwInc","adwSaveQ","instrNext"}, desc="Q++" }, - { mnem="dec q" , opcode=0x16, {"adwlQ","adwrm1","adwSaveQ","instrNext"}, desc="Q--" }, + { mnem="inc p" , opcode=0x12, {"adwlP","adwInc","adwSaveP","instrNext"}, desc="P++", ccode={"cpu.p++; lni;"} }, + { mnem="dec p" , opcode=0x15, {"adwlP","adwrm1","adwSaveP","instrNext"}, desc="P--", ccode={"cpu.p--; lni;"} }, + { mnem="inc q" , opcode=0x13, {"adwlQ","adwInc","adwSaveQ","instrNext"}, desc="Q++", ccode={"cpu.q++; lni;"} }, + { mnem="dec q" , opcode=0x16, {"adwlQ","adwrm1","adwSaveQ","instrNext"}, desc="Q--", ccode={"cpu.q--; lni;"} }, { category = "8-bit Unary", catlet="U" }, - { mnem="inc a" , opcode=0x10, {"aluA","alur1" ,"aluOpAdd" ,"instrNext"}, desc="A++, set flags" }, - { mnem="dec a" , opcode=0x11, {"aluA","alurm1","aluOpAdd" ,"instrNext"}, desc="A--, set flags" }, - { mnem="icc a" , opcode=0x1B, {"aluA", "aluOpAddC","instrNext"}, desc="A+=CF, set flags" }, - { mnem="inc b" , opcode=0x19, {"aluB","alur1" ,"aluOpAdd" ,"instrNext"}, desc="B++, set flags" }, - { mnem="dec b" , opcode=0x1A, {"aluB","alurm1","aluOpAdd" ,"instrNext"}, desc="B--, set flags" }, - { mnem="icc b" , opcode=0x1C, {"aluB", "aluOpAddC","instrNext"}, desc="B+=CF, set flags" }, - { mnem="inc c" , opcode=0x17, {"aluC","alur1" ,"aluOpAdd" ,"instrNext"}, desc="C++, set flags" }, - { mnem="dec c" , opcode=0x18, {"aluC","alurm1","aluOpAdd" ,"instrNext"}, desc="C--, set flags" }, - { mnem="icc c" , opcode=0x1D, {"aluC", "aluOpAddC","instrNext"}, desc="C+=CF, set flags" }, - { mnem="tst a" , opcode=0x14, {"alulA", "aluOpCmp" ,"instrNext"}, desc="Set flags according to A-0" }, - { mnem="tst b" , opcode=0x1E, {"alulB", "aluOpCmp" ,"instrNext"}, desc="Set flags according to B-0" }, - { mnem="tst c" , opcode=0x1F, {"alulC", "aluOpCmp" ,"instrNext"}, desc="Set flags according to C-0" }, - { mnem="inc *s+imm8", opcode=0x2B, {"loadImmedT","instrSub1"}, {"loadStackRelU","instrSub2"}, {"aluU","alur1" ,"aluOpAdd" ,"instrSub3","instrPreload"}, {"storeStackRelU","instrNextPre"}, desc="*(S+imm8)++, set flags" }, - { mnem="dec *s+imm8", opcode=0x2C, {"loadImmedT","instrSub1"}, {"loadStackRelU","instrSub2"}, {"aluU","alurm1","aluOpAdd" ,"instrSub3","instrPreload"}, {"storeStackRelU","instrNextPre"}, desc="*(S+imm8)--, set flags" }, - { mnem="icc *s+imm8", opcode=0x2D, {"loadImmedT","instrSub1"}, {"loadStackRelU","instrSub2"}, {"aluU", "aluOpAddC","instrSub3","instrPreload"}, {"storeStackRelU","instrNextPre"}, desc="*(S+imm8)+=CF, set flags" }, - { mnem="tst *s+imm8", opcode=0x2E, {"loadImmedT","instrSub1"}, {"loadStackRelU","instrSub2"}, {"alulU", "aluOpCmp" ,"instrNext"}, desc="Set flags according to *(S+imm8)-0" }, + { mnem="inc a" , opcode=0x10, {"aluA","alur1" ,"aluOpAdd" ,"instrNext"}, desc="A++, set flags" , ccode={"addf(cpu.a, 1 ); lni;"} }, + { mnem="dec a" , opcode=0x11, {"aluA","alurm1","aluOpAdd" ,"instrNext"}, desc="A--, set flags" , ccode={"addf(cpu.a,-1 ); lni;"} }, + { mnem="icc a" , opcode=0x1B, {"aluA", "aluOpAddC","instrNext"}, desc="A+=CF, set flags", ccode={"addf(cpu.a,cpu.cf); lni;"} }, + { mnem="inc b" , opcode=0x19, {"aluB","alur1" ,"aluOpAdd" ,"instrNext"}, desc="B++, set flags" , ccode={"addf(cpu.b, 1 ); lni;"} }, + { mnem="dec b" , opcode=0x1A, {"aluB","alurm1","aluOpAdd" ,"instrNext"}, desc="B--, set flags" , ccode={"addf(cpu.b,-1 ); lni;"} }, + { mnem="icc b" , opcode=0x1C, {"aluB", "aluOpAddC","instrNext"}, desc="B+=CF, set flags", ccode={"addf(cpu.b,cpu.cf); lni;"} }, + { mnem="inc c" , opcode=0x17, {"aluC","alur1" ,"aluOpAdd" ,"instrNext"}, desc="C++, set flags" , ccode={"addf(cpu.c, 1 ); lni;"} }, + { mnem="dec c" , opcode=0x18, {"aluC","alurm1","aluOpAdd" ,"instrNext"}, desc="C--, set flags" , ccode={"addf(cpu.c,-1 ); lni;"} }, + { mnem="icc c" , opcode=0x1D, {"aluC", "aluOpAddC","instrNext"}, desc="C+=CF, set flags", ccode={"addf(cpu.c,cpu.cf); lni;"} }, + { mnem="tst a" , opcode=0x14, {"alulA", "aluOpCmp" ,"instrNext"}, desc="Set flags according to A-0", ccode={"tst(cpu.a); lni;"} }, + { mnem="tst b" , opcode=0x1E, {"alulB", "aluOpCmp" ,"instrNext"}, desc="Set flags according to B-0", ccode={"tst(cpu.b); lni;"} }, + { mnem="tst c" , opcode=0x1F, {"alulC", "aluOpCmp" ,"instrNext"}, desc="Set flags according to C-0", ccode={"tst(cpu.c); lni;"} }, + { mnem="inc *s+imm8", opcode=0x2B, {"loadImmedT","instrSub1"}, {"loadStackRelU","instrSub2"}, {"aluU","alur1" ,"aluOpAdd" ,"instrSub3","instrPreload"}, {"storeStackRelU","instrNextPre"}, desc="*(S+imm8)++, set flags" , ccode={"loadimmedt","loadstackrelu","instrpreload; addf(cpu.u, 1 );","instrloadpre"} }, + { mnem="dec *s+imm8", opcode=0x2C, {"loadImmedT","instrSub1"}, {"loadStackRelU","instrSub2"}, {"aluU","alurm1","aluOpAdd" ,"instrSub3","instrPreload"}, {"storeStackRelU","instrNextPre"}, desc="*(S+imm8)--, set flags" , ccode={"loadimmedt","loadstackrelu","instrpreload; addf(cpu.u,-1 );","instrloadpre"} }, + { mnem="icc *s+imm8", opcode=0x2D, {"loadImmedT","instrSub1"}, {"loadStackRelU","instrSub2"}, {"aluU", "aluOpAddC","instrSub3","instrPreload"}, {"storeStackRelU","instrNextPre"}, desc="*(S+imm8)+=CF, set flags", ccode={"loadimmedt","loadstackrelu","instrpreload; addf(cpu.u,cpu.cf);","instrloadpre"} }, + { mnem="tst *s+imm8", opcode=0x2E, {"loadImmedT","instrSub1"}, {"loadStackRelU","instrSub2"}, {"alulU", "aluOpCmp" ,"instrNext"}, desc="Set flags according to *(S+imm8)-0", ccode={"loadimmedt","loadstackrelu","tst(cpu.u); lni;"} }, { category = "16-bit Arithmetic", catlet = "X"}, - { mnem="adp imm8" , opcode=0x4A, {"loadImmedT","instrSub1"}, {"adwP","adwrTX","instrNext"}, desc="P+=imm8 signed"}, - { mnem="adq imm8" , opcode=0x4B, {"loadImmedT","instrSub1"}, {"adwQ","adwrTX","instrNext"}, desc="Q+=imm8 signed"}, - { mnem="ads imm8" , opcode=0x4C, {"loadImmedT","instrSub1"}, {"adwS","adwrTX","instrNext"}, desc="S+=imm8 signed"}, + { mnem="adp imm8" , opcode=0x4A, {"loadImmedT","instrSub1"}, {"adwP","adwrTX","instrNext"}, desc="P+=imm8 signed", ccode={"loadimmedt","cpu.p+=signed8(cpu.t); lni;"} }, + { mnem="adq imm8" , opcode=0x4B, {"loadImmedT","instrSub1"}, {"adwQ","adwrTX","instrNext"}, desc="Q+=imm8 signed", ccode={"loadimmedt","cpu.q+=signed8(cpu.t); lni;"} }, + { mnem="ads imm8" , opcode=0x4C, {"loadImmedT","instrSub1"}, {"adwS","adwrTX","instrNext"}, desc="S+=imm8 signed", ccode={"loadimmedt","cpu.s+=signed8(cpu.t); lni;"} }, + { mnem="adp b" , opcode=0xE6, {"adwP","adwrBX","instrNext"}, desc="P+=B signed", ccode={"cpu.p+=signed8(cpu.b); lni;"} }, + { mnem="adq b" , opcode=0xE7, {"adwQ","adwrBX","instrNext"}, desc="Q+=B signed", ccode={"cpu.q+=signed8(cpu.b); lni;"} }, + { mnem="ads b" , opcode=0xE8, {"adwS","adwrBX","instrNext"}, desc="S+=B signed", ccode={"cpu.s+=signed8(cpu.b); lni;"} }, { category = "8-bit Arithmetic/Logic", catlet="A" }, - { mnem="add imm8" , opcode=0x24, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpAdd" ,"instrNext"}, desc="A+=imm8, set flags" }, - { mnem="adb imm8" , opcode=0x72, {"loadImmedT","instrSub1"}, {"aluB", "alurT","aluOpAdd" ,"instrNext"}, desc="B+=imm8, set flags" }, - { mnem="adc imm8" , opcode=0x73, {"loadImmedT","instrSub1"}, {"aluC", "alurT","aluOpAdd" ,"instrNext"}, desc="C+=imm8, set flags" }, - { mnem="sub imm8" , opcode=0x70, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpSub" ,"instrNext"}, desc="A-=imm8, set flags" }, - { mnem="sbb imm8" , opcode=0x99, {"loadImmedT","instrSub1"}, {"aluB", "alurT","aluOpSub" ,"instrNext"}, desc="B-=imm8, set flags" }, - { mnem="sbc imm8" , opcode=0x9A, {"loadImmedT","instrSub1"}, {"aluC", "alurT","aluOpSub" ,"instrNext"}, desc="C-=imm8, set flags" }, - { mnem="acc imm8" , opcode=0x78, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpAddC","instrNext"}, desc="A+=imm8+CF, set flags" }, - { mnem="scc imm8" , opcode=0x79, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpSubC","instrNext"}, desc="A-=imm8+CF, set flags" }, - { mnem="cmp imm8" , opcode=0x71, {"loadImmedT","instrSub1"}, {"alulA","alurT","aluOpSub" ,"instrNext"}, desc="set flags according to A-imm8" }, - { mnem="and imm8" , opcode=0x74, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpAnd" ,"instrNext"}, desc="A&=imm8, set zero flag" }, - { mnem="ior imm8" , opcode=0x75, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpIor" ,"instrNext"}, desc="A|=imm8, set zero flag" }, - { mnem="xor imm8" , opcode=0x76, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpXor" ,"instrNext"}, desc="A^=imm8, set zero flag" }, - { mnem="ann imm8" , opcode=0x77, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpAnn" ,"instrNext"}, desc="A&=~imm8, set zero flag" }, - { mnem="shl imm8" , opcode=0xD0, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpShl" ,"instrNext"}, desc="A<<=imm8, set zero flag" }, - { mnem="shr imm8" , opcode=0xD1, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpShr" ,"instrNext"}, desc="A>>=imm8, set zero flag" }, - { mnem="rol imm8" , opcode=0xD2, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpRol" ,"instrNext"}, desc="A<<<=imm8, set zero flag" }, - { mnem="ror imm8" , opcode=0xD3, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpRor" ,"instrNext"}, desc="A>>>=imm8, set zero flag" }, - { mnem="sra imm8" , opcode=0xD4, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpSra" ,"instrNext"}, desc="A>>a=imm8, set zero flag" }, - { mnem="add *s+imm8", opcode=0xAE, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpAdd" ,"instrNext"}, desc="A+=*(S+imm8), set flags" }, - { mnem="adb *s+imm8", opcode=0x9B, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluB", "alurT","aluOpAdd" ,"instrNext"}, desc="B+=*(S+imm8), set flags" }, - { mnem="adc *s+imm8", opcode=0x9C, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluC", "alurT","aluOpAdd" ,"instrNext"}, desc="C+=*(S+imm8), set flags" }, - { mnem="sub *s+imm8", opcode=0xAF, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpSub" ,"instrNext"}, desc="A-=*(S+imm8), set flags" }, - { mnem="sbb *s+imm8", opcode=0x9D, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluB", "alurT","aluOpSub" ,"instrNext"}, desc="B-=*(S+imm8), set flags" }, - { mnem="sbc *s+imm8", opcode=0x9E, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluC", "alurT","aluOpSub" ,"instrNext"}, desc="C-=*(S+imm8), set flags" }, - { mnem="acc *s+imm8", opcode=0xB5, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpAddC","instrNext"}, desc="A+=*(S+imm8)+CF, set flags" }, - { mnem="scc *s+imm8", opcode=0xB7, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpSubC","instrNext"}, desc="A-=*(S+imm8)+CF, set flags" }, - { mnem="cmp *s+imm8", opcode=0xB0, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"alulA","alurT","aluOpSub" ,"instrNext"}, desc="set flags according to A-*(S+imm8)" }, - { mnem="and *s+imm8", opcode=0xB1, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpAnd" ,"instrNext"}, desc="A&=*(S+imm8), set zero flag" }, - { mnem="ior *s+imm8", opcode=0xB2, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpIor" ,"instrNext"}, desc="A|=*(S+imm8), set zero flag" }, - { mnem="xor *s+imm8", opcode=0xB3, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpXor" ,"instrNext"}, desc="A^=*(S+imm8), set zero flag" }, - { mnem="ann *s+imm8", opcode=0xB4, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpAnn" ,"instrNext"}, desc="A&=~*(S+imm8), set zero flag" }, - { mnem="shl *s+imm8", opcode=0xD5, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpShl" ,"instrNext"}, desc="A<<=*(S+imm8), set zero flag" }, - { mnem="shr *s+imm8", opcode=0xD6, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpShr" ,"instrNext"}, desc="A<<=*(S+imm8), set zero flag" }, - { mnem="rol *s+imm8", opcode=0xD7, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpRol" ,"instrNext"}, desc="A<<<=*(S+imm8), set zero flag" }, - { mnem="ror *s+imm8", opcode=0xD8, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpRor" ,"instrNext"}, desc="A>>>=*(S+imm8), set zero flag" }, - { mnem="sra *s+imm8", opcode=0xD9, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpSra" ,"instrNext"}, desc="A>>a=*(S+imm8), set zero flag" }, - { mnem="add b" , opcode=0xA0, {"aluA", "alurB","aluOpAdd" ,"instrNext"}, desc="A+=B, set flags" }, - { mnem="adc b" , opcode=0x9F, {"aluC", "alurB","aluOpAdd" ,"instrNext"}, desc="C+=B, set flags" }, - { mnem="sub b" , opcode=0xA1, {"aluA", "alurB","aluOpSub" ,"instrNext"}, desc="A-=B, set flags" }, - { mnem="sbc b" , opcode=0xB6, {"aluC", "alurB","aluOpSub" ,"instrNext"}, desc="C-=B, set flags" }, - { mnem="acc b" , opcode=0xB8, {"aluA", "alurB","aluOpAddC","instrNext"}, desc="A+=B+CF, set flags" }, - { mnem="scc b" , opcode=0xB9, {"aluA", "alurB","aluOpSubC","instrNext"}, desc="A-=B+CF, set flags" }, - { mnem="cmp b" , opcode=0xA2, {"alulA","alurB","aluOpSub" ,"instrNext"}, desc="set flags according to A-B" }, - { mnem="and b" , opcode=0xA3, {"aluA", "alurB","aluOpAnd" ,"instrNext"}, desc="A&=B, set zero flag" }, - { mnem="ior b" , opcode=0xA4, {"aluA", "alurB","aluOpIor" ,"instrNext"}, desc="A|=B, set zero flag" }, - { mnem="xor b" , opcode=0xA5, {"aluA", "alurB","aluOpXor" ,"instrNext"}, desc="A^=B, set zero flag" }, - { mnem="ann b" , opcode=0xA6, {"aluA", "alurB","aluOpAnn" ,"instrNext"}, desc="A&=~B, set zero flag" }, - { mnem="shl b" , opcode=0xDA, {"aluA", "alurB","aluOpShl" ,"instrNext"}, desc="A<<=B, set zero flag" }, - { mnem="shr b" , opcode=0xDB, {"aluA", "alurB","aluOpShr" ,"instrNext"}, desc="A>>=B, set zero flag" }, - { mnem="rol b" , opcode=0xDC, {"aluA", "alurB","aluOpRol" ,"instrNext"}, desc="A<<<=B, set zero flag" }, - { mnem="ror b" , opcode=0xDD, {"aluA", "alurB","aluOpRor" ,"instrNext"}, desc="A>>>=B, set zero flag" }, - { mnem="sra b" , opcode=0xDE, {"aluA", "alurB","aluOpSra" ,"instrNext"}, desc="A>>a=B, set zero flag" }, - { mnem="add c" , opcode=0xA7, {"aluA", "alurC","aluOpAdd" ,"instrNext"}, desc="A+=C, set flags" }, - { mnem="adb c" , opcode=0xBD, {"aluB", "alurC","aluOpAdd" ,"instrNext"}, desc="B+=C, set flags" }, - { mnem="sub c" , opcode=0xA8, {"aluA", "alurC","aluOpSub" ,"instrNext"}, desc="A-=C, set flags" }, - { mnem="sbb c" , opcode=0xBC, {"aluB", "alurC","aluOpSub" ,"instrNext"}, desc="B-=C, set flags" }, - { mnem="acc c" , opcode=0xBA, {"aluA", "alurC","aluOpAddC","instrNext"}, desc="A+=C+CF, set flags" }, - { mnem="scc c" , opcode=0xBB, {"aluA", "alurC","aluOpSubC","instrNext"}, desc="A-=C+CF, set flags" }, - { mnem="cmp c" , opcode=0xA9, {"alulA","alurC","aluOpSub" ,"instrNext"}, desc="set flags according to A-C" }, - { mnem="and c" , opcode=0xAA, {"aluA", "alurC","aluOpAnd" ,"instrNext"}, desc="A&=C, set zero flag" }, - { mnem="ior c" , opcode=0xAB, {"aluA", "alurC","aluOpIor" ,"instrNext"}, desc="A|=C, set zero flag" }, - { mnem="xor c" , opcode=0xAC, {"aluA", "alurC","aluOpXor" ,"instrNext"}, desc="A^=C, set zero flag" }, - { mnem="ann c" , opcode=0xAD, {"aluA", "alurC","aluOpAnn" ,"instrNext"}, desc="A&=~C, set zero flag" }, - { mnem="shl c" , opcode=0xDF, {"aluA", "alurC","aluOpShl" ,"instrNext"}, desc="A<<=C, set zero flag" }, - { mnem="shr c" , opcode=0x4D, {"aluA", "alurC","aluOpShr" ,"instrNext"}, desc="A>>=C, set zero flag" }, - { mnem="rol c" , opcode=0x3E, {"aluA", "alurC","aluOpRol" ,"instrNext"}, desc="A<<<=C, set zero flag" }, - { mnem="ror c" , opcode=0x3F, {"aluA", "alurC","aluOpRor" ,"instrNext"}, desc="A>>>=C, set zero flag" }, - { mnem="sra c" , opcode=0x2F, {"aluA", "alurC","aluOpSra" ,"instrNext"}, desc="A>>a=C, set zero flag" }, - { mnem="adb a" , opcode=0xBE, {"aluB", "alurA","aluOpAdd" ,"instrNext"}, desc="B+=A, set flags" }, - { mnem="sbb a" , opcode=0xBF, {"aluB", "alurA","aluOpSub" ,"instrNext"}, desc="B-=A, set flags" }, - { mnem="adc a" , opcode=0x4E, {"aluC", "alurA","aluOpAdd" ,"instrNext"}, desc="C+=A, set flags" }, - { mnem="sbc a" , opcode=0x4F, {"aluC", "alurA","aluOpSub" ,"instrNext"}, desc="C-=A, set flags" }, + { mnem="add imm8" , opcode=0x24, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpAdd" ,"instrNext"}, desc="A+=imm8, set flags" , ccode={"loadimmedt","addf(cpu.a,cpu.t); lni;"} }, + { mnem="adb imm8" , opcode=0x72, {"loadImmedT","instrSub1"}, {"aluB", "alurT","aluOpAdd" ,"instrNext"}, desc="B+=imm8, set flags" , ccode={"loadimmedt","addf(cpu.b,cpu.t); lni;"} }, + { mnem="adc imm8" , opcode=0x73, {"loadImmedT","instrSub1"}, {"aluC", "alurT","aluOpAdd" ,"instrNext"}, desc="C+=imm8, set flags" , ccode={"loadimmedt","addf(cpu.c,cpu.t); lni;"} }, + { mnem="sub imm8" , opcode=0x70, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpSub" ,"instrNext"}, desc="A-=imm8, set flags" , ccode={"loadimmedt","subf(cpu.a,cpu.t); lni;"} }, + { mnem="sbb imm8" , opcode=0x99, {"loadImmedT","instrSub1"}, {"aluB", "alurT","aluOpSub" ,"instrNext"}, desc="B-=imm8, set flags" , ccode={"loadimmedt","subf(cpu.b,cpu.t); lni;"} }, + { mnem="sbc imm8" , opcode=0x9A, {"loadImmedT","instrSub1"}, {"aluC", "alurT","aluOpSub" ,"instrNext"}, desc="C-=imm8, set flags" , ccode={"loadimmedt","subf(cpu.c,cpu.t); lni;"} }, + { mnem="acc imm8" , opcode=0x78, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpAddC","instrNext"}, desc="A+=imm8+CF, set flags" , ccode={"loadimmedt","addf(cpu.a,cpu.t+cpu.cf); lni;"} }, + { mnem="scc imm8" , opcode=0x79, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpSubC","instrNext"}, desc="A-=imm8+CF, set flags" , ccode={"loadimmedt","addf(cpu.a,-cpu.t+cpu.cf); lni;"} }, + { mnem="cmp imm8" , opcode=0x71, {"loadImmedT","instrSub1"}, {"alulA","alurT","aluOpSub" ,"instrNext"}, desc="set flags according to A-imm8" , ccode={"loadimmedt","cmpf(cpu.a,cpu.t); lni;"} }, + { mnem="and imm8" , opcode=0x74, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpAnd" ,"instrNext"}, desc="A&=imm8, set zero flag" , ccode={"loadimmedt","cpu.a&=cpu.t; setzf(cpu.a); lni;"} }, + { mnem="ior imm8" , opcode=0x75, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpIor" ,"instrNext"}, desc="A|=imm8, set zero flag" , ccode={"loadimmedt","cpu.a|=cpu.t; setzf(cpu.a); lni;"} }, + { mnem="xor imm8" , opcode=0x76, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpXor" ,"instrNext"}, desc="A^=imm8, set zero flag" , ccode={"loadimmedt","cpu.a^=cpu.t; setzf(cpu.a); lni;"} }, + { mnem="ann imm8" , opcode=0x77, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpAnn" ,"instrNext"}, desc="A&=~imm8, set zero flag" , ccode={"loadimmedt","cpu.a&=~cpu.t; setzf(cpu.a); lni;"} }, + { mnem="shl imm8" , opcode=0xD0, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpShl" ,"instrNext"}, desc="A<<=imm8, set zero flag" , ccode={"loadimmedt","cpu.a<<=cpu.t; setzf(cpu.a); lni;"} }, + { mnem="shr imm8" , opcode=0xD1, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpShr" ,"instrNext"}, desc="A>>=imm8, set zero flag" , ccode={"loadimmedt","cpu.a>>=cpu.t; setzf(cpu.a); lni;"} }, + { mnem="rol imm8" , opcode=0xD2, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpRol" ,"instrNext"}, desc="A<<<=imm8, set zero flag" , ccode={"loadimmedt","cpu.a=rol(cpu.a,cpu.t); setzf(cpu.a); lni;"} }, + { mnem="ror imm8" , opcode=0xD3, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpRor" ,"instrNext"}, desc="A>>>=imm8, set zero flag" , ccode={"loadimmedt","cpu.a=ror(cpu.a,cpu.t); setzf(cpu.a); lni;"} }, + { mnem="sra imm8" , opcode=0xD4, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluOpSra" ,"instrNext"}, desc="A>>a=imm8, set zero flag" , ccode={"loadimmedt","cpu.a=sra(cpu.a,cpu.t); setzf(cpu.a); lni;"} }, + { mnem="add *s+imm8", opcode=0xAE, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpAdd" ,"instrNext"}, desc="A+=*(S+imm8), set flags" , ccode={"loadimmedt","loadstackrelu","addf(cpu.a,cpu.u); lni;"} }, + { mnem="adb *s+imm8", opcode=0x9B, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluB", "alurT","aluOpAdd" ,"instrNext"}, desc="B+=*(S+imm8), set flags" , ccode={"loadimmedt","loadstackrelu","addf(cpu.b,cpu.u); lni;"} }, + { mnem="adc *s+imm8", opcode=0x9C, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluC", "alurT","aluOpAdd" ,"instrNext"}, desc="C+=*(S+imm8), set flags" , ccode={"loadimmedt","loadstackrelu","addf(cpu.c,cpu.u); lni;"} }, + { mnem="sub *s+imm8", opcode=0xAF, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpSub" ,"instrNext"}, desc="A-=*(S+imm8), set flags" , ccode={"loadimmedt","loadstackrelu","subf(cpu.a,cpu.u); lni;"} }, + { mnem="sbb *s+imm8", opcode=0x9D, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluB", "alurT","aluOpSub" ,"instrNext"}, desc="B-=*(S+imm8), set flags" , ccode={"loadimmedt","loadstackrelu","subf(cpu.b,cpu.u); lni;"} }, + { mnem="sbc *s+imm8", opcode=0x9E, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluC", "alurT","aluOpSub" ,"instrNext"}, desc="C-=*(S+imm8), set flags" , ccode={"loadimmedt","loadstackrelu","subf(cpu.c,cpu.u); lni;"} }, + { mnem="acc *s+imm8", opcode=0xB5, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpAddC","instrNext"}, desc="A+=*(S+imm8)+CF, set flags" , ccode={"loadimmedt","loadstackrelu","addf(cpu.a,cpu.u+cpu.cf); lni;"} }, + { mnem="scc *s+imm8", opcode=0xB7, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpSubC","instrNext"}, desc="A-=*(S+imm8)+CF, set flags" , ccode={"loadimmedt","loadstackrelu","addf(cpu.a,-cpu.u+cpu.cf); lni;"} }, + { mnem="cmp *s+imm8", opcode=0xB0, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"alulA","alurT","aluOpSub" ,"instrNext"}, desc="set flags according to A-*(S+imm8)", ccode={"loadimmedt","loadstackrelu","cmpf(cpu.a,cpu.u); lni;"} }, + { mnem="and *s+imm8", opcode=0xB1, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpAnd" ,"instrNext"}, desc="A&=*(S+imm8), set zero flag" , ccode={"loadimmedt","loadstackrelu","cpu.a&=cpu.u; setzf(cpu.a); lni;"} }, + { mnem="ior *s+imm8", opcode=0xB2, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpIor" ,"instrNext"}, desc="A|=*(S+imm8), set zero flag" , ccode={"loadimmedt","loadstackrelu","cpu.a|=cpu.u; setzf(cpu.a); lni;"} }, + { mnem="xor *s+imm8", opcode=0xB3, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpXor" ,"instrNext"}, desc="A^=*(S+imm8), set zero flag" , ccode={"loadimmedt","loadstackrelu","cpu.a^=cpu.u; setzf(cpu.a); lni;"} }, + { mnem="ann *s+imm8", opcode=0xB4, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpAnn" ,"instrNext"}, desc="A&=~*(S+imm8), set zero flag" , ccode={"loadimmedt","loadstackrelu","cpu.a&=~cpu.u; setzf(cpu.a); lni;"} }, + { mnem="shl *s+imm8", opcode=0xD5, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpShl" ,"instrNext"}, desc="A<<=*(S+imm8), set zero flag" , ccode={"loadimmedt","loadstackrelu","cpu.a<<=cpu.u; setzf(cpu.a); lni;"} }, + { mnem="shr *s+imm8", opcode=0xD6, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpShr" ,"instrNext"}, desc="A<<=*(S+imm8), set zero flag" , ccode={"loadimmedt","loadstackrelu","cpu.a>>=cpu.u; setzf(cpu.a); lni;"} }, + { mnem="rol *s+imm8", opcode=0xD7, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpRol" ,"instrNext"}, desc="A<<<=*(S+imm8), set zero flag" , ccode={"loadimmedt","loadstackrelu","cpu.a=rol(cpu.a,cpu.u); setzf(cpu.a); lni;"} }, + { mnem="ror *s+imm8", opcode=0xD8, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpRor" ,"instrNext"}, desc="A>>>=*(S+imm8), set zero flag" , ccode={"loadimmedt","loadstackrelu","cpu.a=ror(cpu.a,cpu.u); setzf(cpu.a); lni;"} }, + { mnem="sra *s+imm8", opcode=0xD9, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluOpSra" ,"instrNext"}, desc="A>>a=*(S+imm8), set zero flag" , ccode={"loadimmedt","loadstackrelu","cpu.a=sra(cpu.a,cpu.u); setzf(cpu.a); lni;"} }, + { mnem="add b" , opcode=0xA0, {"aluA", "alurB","aluOpAdd" ,"instrNext"}, desc="A+=B, set flags" , ccode={"addf(cpu.a,cpu.b); lni;"} }, + { mnem="adc b" , opcode=0x9F, {"aluC", "alurB","aluOpAdd" ,"instrNext"}, desc="C+=B, set flags" , ccode={"addf(cpu.c,cpu.b); lni;"} }, + { mnem="sub b" , opcode=0xA1, {"aluA", "alurB","aluOpSub" ,"instrNext"}, desc="A-=B, set flags" , ccode={"subf(cpu.a,cpu.b); lni;"} }, + { mnem="sbc b" , opcode=0xB6, {"aluC", "alurB","aluOpSub" ,"instrNext"}, desc="C-=B, set flags" , ccode={"subf(cpu.c,cpu.b); lni;"} }, + { mnem="acc b" , opcode=0xB8, {"aluA", "alurB","aluOpAddC","instrNext"}, desc="A+=B+CF, set flags" , ccode={"addf(cpu.a,cpu.b+cpu.cf); lni;"} }, + { mnem="scc b" , opcode=0xB9, {"aluA", "alurB","aluOpSubC","instrNext"}, desc="A-=B+CF, set flags" , ccode={"addf(cpu.a,-cpu.b+cpu.cf); lni;"} }, + { mnem="cmp b" , opcode=0xA2, {"alulA","alurB","aluOpSub" ,"instrNext"}, desc="set flags according to A-B" , ccode={"cmpf(cpu.a,cpu.b); lni;"} }, + { mnem="and b" , opcode=0xA3, {"aluA", "alurB","aluOpAnd" ,"instrNext"}, desc="A&=B, set zero flag" , ccode={"cpu.a&=cpu.b; setzf(cpu.a); lni;"} }, + { mnem="ior b" , opcode=0xA4, {"aluA", "alurB","aluOpIor" ,"instrNext"}, desc="A|=B, set zero flag" , ccode={"cpu.a|=cpu.b; setzf(cpu.a); lni;"} }, + { mnem="xor b" , opcode=0xA5, {"aluA", "alurB","aluOpXor" ,"instrNext"}, desc="A^=B, set zero flag" , ccode={"cpu.a^=cpu.b; setzf(cpu.a); lni;"} }, + { mnem="ann b" , opcode=0xA6, {"aluA", "alurB","aluOpAnn" ,"instrNext"}, desc="A&=~B, set zero flag" , ccode={"cpu.a&=~cpu.b; setzf(cpu.a); lni;"} }, + { mnem="shl b" , opcode=0xDA, {"aluA", "alurB","aluOpShl" ,"instrNext"}, desc="A<<=B, set zero flag" , ccode={"cpu.a<<=cpu.b; setzf(cpu.a); lni;"} }, + { mnem="shr b" , opcode=0xDB, {"aluA", "alurB","aluOpShr" ,"instrNext"}, desc="A>>=B, set zero flag" , ccode={"cpu.a>>=cpu.b; setzf(cpu.a); lni;"} }, + { mnem="rol b" , opcode=0xDC, {"aluA", "alurB","aluOpRol" ,"instrNext"}, desc="A<<<=B, set zero flag" , ccode={"cpu.a=rol(cpu.a,cpu.b); setzf(cpu.a); lni;"} }, + { mnem="ror b" , opcode=0xDD, {"aluA", "alurB","aluOpRor" ,"instrNext"}, desc="A>>>=B, set zero flag" , ccode={"cpu.a=ror(cpu.a,cpu.b); setzf(cpu.a); lni;"} }, + { mnem="sra b" , opcode=0xDE, {"aluA", "alurB","aluOpSra" ,"instrNext"}, desc="A>>a=B, set zero flag" , ccode={"cpu.a=sra(cpu.a,cpu.b); setzf(cpu.a); lni;"} }, + { mnem="add c" , opcode=0xA7, {"aluA", "alurC","aluOpAdd" ,"instrNext"}, desc="A+=C, set flags" , ccode={"addf(cpu.a,cpu.c); lni;"} }, + { mnem="adb c" , opcode=0xBD, {"aluB", "alurC","aluOpAdd" ,"instrNext"}, desc="B+=C, set flags" , ccode={"addf(cpu.b,cpu.c); lni;"} }, + { mnem="sub c" , opcode=0xA8, {"aluA", "alurC","aluOpSub" ,"instrNext"}, desc="A-=C, set flags" , ccode={"subf(cpu.a,cpu.c); lni;"} }, + { mnem="sbb c" , opcode=0xBC, {"aluB", "alurC","aluOpSub" ,"instrNext"}, desc="B-=C, set flags" , ccode={"subf(cpu.b,cpu.c); lni;"} }, + { mnem="acc c" , opcode=0xBA, {"aluA", "alurC","aluOpAddC","instrNext"}, desc="A+=C+CF, set flags" , ccode={"addf(cpu.a,cpu.c+cpu.cf); lni;"} }, + { mnem="scc c" , opcode=0xBB, {"aluA", "alurC","aluOpSubC","instrNext"}, desc="A-=C+CF, set flags" , ccode={"addf(cpu.a,-cpu.c+cpu.cf); lni;"} }, + { mnem="cmp c" , opcode=0xA9, {"alulA","alurC","aluOpSub" ,"instrNext"}, desc="set flags according to A-C" , ccode={"cmpf(cpu.a,cpu.c); lni;"} }, + { mnem="and c" , opcode=0xAA, {"aluA", "alurC","aluOpAnd" ,"instrNext"}, desc="A&=C, set zero flag" , ccode={"cpu.a&=cpu.c; setzf(cpu.a); lni;"} }, + { mnem="ior c" , opcode=0xAB, {"aluA", "alurC","aluOpIor" ,"instrNext"}, desc="A|=C, set zero flag" , ccode={"cpu.a|=cpu.c; setzf(cpu.a); lni;"} }, + { mnem="xor c" , opcode=0xAC, {"aluA", "alurC","aluOpXor" ,"instrNext"}, desc="A^=C, set zero flag" , ccode={"cpu.a^=cpu.c; setzf(cpu.a); lni;"} }, + { mnem="ann c" , opcode=0xAD, {"aluA", "alurC","aluOpAnn" ,"instrNext"}, desc="A&=~C, set zero flag" , ccode={"cpu.a&=~cpu.c; setzf(cpu.a); lni;"} }, + { mnem="shl c" , opcode=0xDF, {"aluA", "alurC","aluOpShl" ,"instrNext"}, desc="A<<=C, set zero flag" , ccode={"cpu.a<<=cpu.c; setzf(cpu.a); lni;"} }, + { mnem="shr c" , opcode=0x4D, {"aluA", "alurC","aluOpShr" ,"instrNext"}, desc="A>>=C, set zero flag" , ccode={"cpu.a>>=cpu.c; setzf(cpu.a); lni;"} }, + { mnem="rol c" , opcode=0x3E, {"aluA", "alurC","aluOpRol" ,"instrNext"}, desc="A<<<=C, set zero flag" , ccode={"cpu.a=rol(cpu.a,cpu.c); setzf(cpu.a); lni;"} }, + { mnem="ror c" , opcode=0x3F, {"aluA", "alurC","aluOpRor" ,"instrNext"}, desc="A>>>=C, set zero flag" , ccode={"cpu.a=ror(cpu.a,cpu.c); setzf(cpu.a); lni;"} }, + { mnem="sra c" , opcode=0x2F, {"aluA", "alurC","aluOpSra" ,"instrNext"}, desc="A>>a=C, set zero flag" , ccode={"cpu.a=sra(cpu.a,cpu.c); setzf(cpu.a); lni;"} }, + { mnem="adb a" , opcode=0xBE, {"aluB", "alurA","aluOpAdd" ,"instrNext"}, desc="B+=A, set flags" , ccode={"addf(cpu.b,cpu.a); lni;"} }, + { mnem="sbb a" , opcode=0xBF, {"aluB", "alurA","aluOpSub" ,"instrNext"}, desc="B-=A, set flags" , ccode={"subf(cpu.b,cpu.a); lni;"} }, + { mnem="adc a" , opcode=0x4E, {"aluC", "alurA","aluOpAdd" ,"instrNext"}, desc="C+=A, set flags" , ccode={"addf(cpu.c,cpu.a); lni;"} }, + { mnem="sbc a" , opcode=0x4F, {"aluC", "alurA","aluOpSub" ,"instrNext"}, desc="C-=A, set flags" , ccode={"subf(cpu.c,cpu.a); lni;"} }, { category = "Jumps", catlet="J" }, - { mnem="jmp imm16" , opcode=0x60, jmp=true, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"jmpAbsUT" }, desc="I=imm16" }, - { mnem="jsr imm16" , opcode=0x63, jmp=true, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"jmpAbsUT","saveRetAddr"}, desc="I=imm16, Q=I" }, - { mnem="jss imm16" , opcode=0xE2, jmp=true, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"pushRetAddr1","instrSub3"}, {"pushRetAddr2","instrSub4"}, {"jmpAbsUT"}, desc="I=imm16, *(S++++)=I-1" }, - { mnem="jmp p" , opcode=0x64, {"jmpAbsP" }, desc="I=P" }, - { mnem="jmp q" , opcode=0x66, {"jmpAbsQ" }, desc="I=Q" }, - { mnem="jsr p" , opcode=0x65, {"jmpAbsP","saveRetAddr"}, desc="I=P, Q=I" }, - { mnem="jsr q" , opcode=0x67, {"jmpAbsQ","saveRetAddr"}, desc="I=Q, Q=I" }, - { mnem="jss p" , opcode=0xE4, {"pushRetAddr1","instrSub1"}, {"pushRetAddr2","instrSub2"}, {"jmpAbsP"}, desc="I=P, *(S++++)=I-1" }, - { mnem="jss q" , opcode=0xE5, {"pushRetAddr1","instrSub1"}, {"pushRetAddr2","instrSub2"}, {"jmpAbsQ"}, desc="I=Q, *(S++++)=I-1" }, - { mnem="rts" , opcode=0xE1, {"pop161","instrSub1"}, {"pop162","instrSub2"}, {"jmpAbsUT","adrInc"}, desc="I=*(----S)+1" }, - { mnem="jpr imm8" , opcode=0x31, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub1"}, {"jmpRelT"}, desc="I+=imm8" }, - { mnem="jnz imm8" , opcode=0x30, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NZ" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if !Zero" }, - { mnem="jpz imm8" , opcode=0x32, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0Z" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if Zero" }, - { mnem="jlt imm8" , opcode=0x33, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NC" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if !Carry" }, - { mnem="jge imm8" , opcode=0x34, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0C" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if Carry" }, - { mnem="jgt imm8" , opcode=0x35, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NC","instrNext0Z"}, {}, {"jmpRelT"}, {"instrNext"}, desc="I+=imm8 if !Zero & Carry"}, - { mnem="jle imm8" , opcode=0x36, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NC","instrNext0Z"}, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if Zero | !Carry"}, + { mnem="jmp imm16" , opcode=0x60, jmp=true, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"jmpAbsUT" }, desc="I=imm16" , ccode={"loadimm161","loadimm162","jmpabsut"} }, + { mnem="jsr imm16" , opcode=0x63, jmp=true, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"jmpAbsUT","saveRetAddr"}, desc="I=imm16, Q=I", ccode={"loadimm161","loadimm162","jmpabsut saveretaddr"} }, + { mnem="jss imm16" , opcode=0xE2, jmp=true, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"pushRetAddr1","instrSub3"}, {"pushRetAddr2","instrSub4"}, {"jmpAbsUT"}, desc="I=imm16, *(S++++)=I-1", ccode={"loadimm161","loadimm162","pushretaddr1","pushretaddr2","jmpabsut"} }, + { mnem="jmp p" , opcode=0x64, {"jmpAbsP" }, desc="I=P" , ccode={"jmpabsp"} }, + { mnem="jmp q" , opcode=0x66, {"jmpAbsQ" }, desc="I=Q" , ccode={"jmpabsq"} }, + { mnem="jsr p" , opcode=0x65, {"jmpAbsP","saveRetAddr"}, desc="I=P, Q=I", ccode={"jmpabsp","saveretaddr"} }, + { mnem="jsr q" , opcode=0x67, {"jmpAbsQ","saveRetAddr"}, desc="I=Q, Q=I", ccode={"jmpabsq","saveretaddr"} }, + { mnem="jss p" , opcode=0xE4, {"pushRetAddr1","instrSub1"}, {"pushRetAddr2","instrSub2"}, {"jmpAbsP"}, desc="I=P, *(S++++)=I-1", ccode={"pushretaddr1","pushretaddr2","jmpabsp"} }, + { mnem="jss q" , opcode=0xE5, {"pushRetAddr1","instrSub1"}, {"pushRetAddr2","instrSub2"}, {"jmpAbsQ"}, desc="I=Q, *(S++++)=I-1", ccode={"pushretaddr1","pushretaddr2","jmpabsq"} }, + { mnem="rts" , opcode=0xE1, {"pop161","instrSub1"}, {"pop162","instrSub2"}, {"jmpAbsUT","adrInc"}, desc="I=*(----S)+1", ccode={"pop161","pop162","jmpabsutplus1"} }, + { mnem="jpr imm8" , opcode=0x31, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub1"}, {"jmpRelT"}, desc="I+=imm8", ccode={"loadimmedt","jmprelt"} }, + { mnem="jnz imm8" , opcode=0x30, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NZ" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if !Zero" , ccode={"loadimmedt","if( cpu.nz ) { jmprelt } else { lni }"} }, + { mnem="jpz imm8" , opcode=0x32, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0Z" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if Zero" , ccode={"loadimmedt","if(!cpu.nz ) { jmprelt } else { lni }"} }, + { mnem="jlt imm8" , opcode=0x33, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NC" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if !Carry" , ccode={"loadimmedt","if(!cpu.cf ) { jmprelt } else { lni }"} }, + { mnem="jge imm8" , opcode=0x34, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0C" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if Carry" , ccode={"loadimmedt","if( cpu.cf ) { jmprelt } else { lni }"} }, + { mnem="jgt imm8" , opcode=0x35, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NC","instrNext0Z"}, {}, {"jmpRelT"}, {"instrNext"}, desc="I+=imm8 if !Zero & Carry", ccode={"loadimmedt","if( cpu.nz && cpu.cf) { jmprelt } else { lni }"} }, + { mnem="jle imm8" , opcode=0x36, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NC","instrNext0Z"}, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if Zero | !Carry", ccode={"loadimmedt","if(!cpu.nz && !cpu.cf) { jmprelt } else { lni }"} }, { category = "Stack", catlet="S" }, - { mnem="psh a" , opcode=0x40, {"pushReg","alurA","instrSub1"}, {"instrNext"}, desc="*(S++)=A" }, - { mnem="psh b" , opcode=0x44, {"pushReg","alurB","instrSub1"}, {"instrNext"}, desc="*(S++)=B" }, - { mnem="psh c" , opcode=0x45, {"pushReg","alurC","instrSub1"}, {"instrNext"}, desc="*(S++)=C" }, - { mnem="psh p" , opcode=0x41, {"pushReg","alurPH","instrSub1"}, {"pushReg","alurPL","instrSub2"}, {"instrNext"}, desc="*(S++++)=P" }, - { mnem="psh q" , opcode=0x46, {"pushReg","alurQH","instrSub1"}, {"pushReg","alurQL","instrSub2"}, {"instrNext"}, desc="*(S++++)=Q" }, - { mnem="pop a" , opcode=0x42, {"popReg","memSaveA","instrSub1"}, {"instrNext"}, desc="A=*(--S)" }, - { mnem="pop b" , opcode=0x47, {"popReg","memSaveB","instrSub1"}, {"instrNext"}, desc="B=*(--S)" }, - { mnem="pop c" , opcode=0x48, {"popReg","memSaveC","instrSub1"}, {"instrNext"}, desc="C=*(--S)" }, - { mnem="pop p" , opcode=0x43, {"pop161","instrSub1"}, {"pop162","instrSub2"}, {"adwrUT","adwSaveP","instrNext"}, desc="P=*(----S)" }, - { mnem="pop q" , opcode=0x49, {"pop161","instrSub1"}, {"pop162","instrSub2"}, {"adwrUT","adwSaveQ","instrNext"}, desc="Q=*(----S)" }, - { mnem="psh imm8" , opcode=0x3B, {"loadImmedT","instrSub1"}, {"pushReg","alurT","instrSub2"}, {"instrNext"}, desc="*(S++)=imm8" }, - { mnem="phw imm16" , opcode=0x3C, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"pushReg","alurU","instrSub3"}, {"pushReg","alurT","instrSub4"}, {"instrNext"}, desc="*(S++++)=imm16" }, -- 0x3D + { mnem="psh a" , opcode=0x40, {"pushReg","alurA","instrSub1"}, {"instrNext"}, desc="*(S++)=A", ccode={"pushbyte(cpu.a);","lni;"} }, + { mnem="psh b" , opcode=0x44, {"pushReg","alurB","instrSub1"}, {"instrNext"}, desc="*(S++)=B", ccode={"pushbyte(cpu.b);","lni;"} }, + { mnem="psh c" , opcode=0x45, {"pushReg","alurC","instrSub1"}, {"instrNext"}, desc="*(S++)=C", ccode={"pushbyte(cpu.c);","lni;"} }, + { mnem="psh f" , opcode=0xE9, {"pushReg","alurF","instrSub1"}, {"instrNext"}, desc="*(S++)=F", ccode={"int f = cpu.nz | (cpu.cf<<1); pushbyte(f);","lni;"} }, + { mnem="psh p" , opcode=0x41, {"pushReg","alurPH","instrSub1"}, {"pushReg","alurPL","instrSub2"}, {"instrNext"}, desc="*(S++++)=P", ccode={"push161(cpu.p);","push162(cpu.p);","lni;"} }, + { mnem="psh q" , opcode=0x46, {"pushReg","alurQH","instrSub1"}, {"pushReg","alurQL","instrSub2"}, {"instrNext"}, desc="*(S++++)=Q", ccode={"push161(cpu.q);","push162(cpu.q);","lni;"} }, + { mnem="pop a" , opcode=0x42, {"popReg","memSaveA","instrSub1"}, {"instrNext"}, desc="A=*(--S)", ccode={"cpu.a=popbyte;","lni;"} }, + { mnem="pop b" , opcode=0x47, {"popReg","memSaveB","instrSub1"}, {"instrNext"}, desc="B=*(--S)", ccode={"cpu.b=popbyte;","lni;"} }, + { mnem="pop c" , opcode=0x48, {"popReg","memSaveC","instrSub1"}, {"instrNext"}, desc="C=*(--S)", ccode={"cpu.c=popbyte;","lni;"} }, + { mnem="pop f" , opcode=0xEA, {"popReg","memSaveF","instrSub1"}, {"instrNext"}, desc="F=*(--S)", ccode={"int f=popbyte; cpu.nz = f&1; cpu.cf = (f>>1)&1;","lni;"} }, + { mnem="pop p" , opcode=0x43, {"pop161","instrSub1"}, {"pop162","instrSub2"}, {"adwrUT","adwSaveP","instrNext"}, desc="P=*(----S)", ccode={"pop161","pop162","cpu.p=wordut; lni;"} }, + { mnem="pop q" , opcode=0x49, {"pop161","instrSub1"}, {"pop162","instrSub2"}, {"adwrUT","adwSaveQ","instrNext"}, desc="Q=*(----S)", ccode={"pop161","pop162","cpu.q=wordut; lni;"} }, + { mnem="psh imm8" , opcode=0x3B, {"loadImmedT","instrSub1"}, {"pushReg","alurT","instrSub2"}, {"instrNext"}, desc="*(S++)=imm8", ccode={"loadimmedt;","pushbyte(cpu.t);","lni;"} }, + { mnem="phw imm16" , opcode=0x3C, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"pushReg","alurU","instrSub3"}, {"pushReg","alurT","instrSub4"}, {"instrNext"}, desc="*(S++++)=imm16", ccode={"loadimm161","loadimm162","pushbyte(cpu.u);","pushbyte(cpu.t);","lni;"} }, -- 0x3D { category = "8-bit Load/Store", catlet="B" }, - { mnem="lda imm8" , opcode=0x20, {"loadImmed", "memSaveA","memSaveFlags","instrSub1"}, {"instrNext"}, desc="A=imm8, update zero flag" }, - { mnem="ldb imm8" , opcode=0x26, {"loadImmed", "memSaveB","memSaveFlags","instrSub1"}, {"instrNext"}, desc="B=imm8, update zero flag" }, - { mnem="ldc imm8" , opcode=0x27, {"loadImmed", "memSaveC","memSaveFlags","instrSub1"}, {"instrNext"}, desc="C=imm8, update zero flag" }, - { mnem="lda *s+imm8", opcode=0x28, {"loadImmedT","instrSub1"}, {"loadStackRel","memSaveA","memSaveFlags","instrSub2"}, {"instrNext"}, desc="A=*s+imm8, update zero flag" }, - { mnem="ldb *s+imm8", opcode=0x29, {"loadImmedT","instrSub1"}, {"loadStackRel","memSaveB","memSaveFlags","instrSub2"}, {"instrNext"}, desc="B=*s+imm8, update zero flag" }, - { mnem="ldc *s+imm8", opcode=0x2A, {"loadImmedT","instrSub1"}, {"loadStackRel","memSaveC","memSaveFlags","instrSub2"}, {"instrNext"}, desc="C=*s+imm8, update zero flag" }, - { mnem="sta *s+imm8", opcode=0x96, {"loadImmedT","instrSub1"}, {"storeStackRel","alurA","instrSub2"}, {"instrNext"}, desc="*s+imm8=A" }, - { mnem="stb *s+imm8", opcode=0x97, {"loadImmedT","instrSub1"}, {"storeStackRel","alurB","instrSub2"}, {"instrNext"}, desc="*s+imm8=B" }, - { mnem="stc *s+imm8", opcode=0x98, {"loadImmedT","instrSub1"}, {"storeStackRel","alurC","instrSub2"}, {"instrNext"}, desc="*s+imm8=C" }, - { mnem="lda *imm16" , opcode=0x51, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2",}, {"adrrUT","loadReg","memSaveA","memSaveFlags","instrSub3"}, {"instrNext"}, desc="A=*imm16, update zero flag" }, - { mnem="ldb *imm16" , opcode=0x56, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2",}, {"adrrUT","loadReg","memSaveB","memSaveFlags","instrSub3"}, {"instrNext"}, desc="B=*imm16, update zero flag" }, - { mnem="ldc *imm16" , opcode=0x57, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2",}, {"adrrUT","loadReg","memSaveC","memSaveFlags","instrSub3"}, {"instrNext"}, desc="C=*imm16, update zero flag" }, - { mnem="sta *imm16" , opcode=0x50, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2",}, {"adrrUT","storeReg","alurA","instrSub3"}, {"instrNext"}, desc="*imm16=A" }, - { mnem="stb *imm16" , opcode=0x58, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2",}, {"adrrUT","storeReg","alurB","instrSub3"}, {"instrNext"}, desc="*imm16=B" }, - { mnem="stc *imm16" , opcode=0x59, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2",}, {"adrrUT","storeReg","alurC","instrSub3"}, {"instrNext"}, desc="*imm16=C" }, - { mnem="sta *p" , opcode=0x52, {"adrlP","storeReg","alurA", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="*P=A" }, - { mnem="stb *p" , opcode=0x5A, {"adrlP","storeReg","alurB", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="*P=B" }, - { mnem="stc *p" , opcode=0x5B, {"adrlP","storeReg","alurC", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="*P=C" }, - { mnem="sta *q" , opcode=0x54, {"adrlQ","storeReg","alurA", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="*Q=A" }, - { mnem="stb *q" , opcode=0x5C, {"adrlQ","storeReg","alurB", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="*Q=B" }, - { mnem="stc *q" , opcode=0x5D, {"adrlQ","storeReg","alurC", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="*Q=C" }, - { mnem="lda *p" , opcode=0x53, {"adrlP","loadReg","memSaveA", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="A=*P, update zero flag" }, - { mnem="ldb *p" , opcode=0x5E, {"adrlP","loadReg","memSaveB", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="B=*P, update zero flag" }, - { mnem="ldc *p" , opcode=0x5F, {"adrlP","loadReg","memSaveC", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="C=*P, update zero flag" }, - { mnem="lda *q" , opcode=0x55, {"adrlQ","loadReg","memSaveA", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="A=*Q, update zero flag" }, - { mnem="ldb *q" , opcode=0x61, {"adrlQ","loadReg","memSaveB", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="B=*Q, update zero flag" }, - { mnem="ldc *q" , opcode=0x62, {"adrlQ","loadReg","memSaveC", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="C=*Q, update zero flag" }, - { mnem="sta *p++" , opcode=0xC0, {"adrlP","storeReg","alurA", "incP","memSaveFlags","instrSub1"}, {"instrNext"}, desc="*P++=A" }, - { mnem="stb *p++" , opcode=0xC1, {"adrlP","storeReg","alurB", "incP","memSaveFlags","instrSub1"}, {"instrNext"}, desc="*P++=B" }, - { mnem="stc *p++" , opcode=0xC2, {"adrlP","storeReg","alurC", "incP","memSaveFlags","instrSub1"}, {"instrNext"}, desc="*P++=C" }, - { mnem="sta *q++" , opcode=0xC3, {"adrlQ","storeReg","alurA", "incQ","memSaveFlags","instrSub1"}, {"instrNext"}, desc="*Q++=A" }, - { mnem="stb *q++" , opcode=0xC4, {"adrlQ","storeReg","alurB", "incQ","memSaveFlags","instrSub1"}, {"instrNext"}, desc="*Q++=B" }, - { mnem="stc *q++" , opcode=0xC5, {"adrlQ","storeReg","alurC", "incQ","memSaveFlags","instrSub1"}, {"instrNext"}, desc="*Q++=C" }, - { mnem="lda *p++" , opcode=0xC6, {"adrlP","loadReg","memSaveA","incP","memSaveFlags","instrSub1"}, {"instrNext"}, desc="A=*P++, update zero flag" }, - { mnem="ldb *p++" , opcode=0xC7, {"adrlP","loadReg","memSaveB","incP","memSaveFlags","instrSub1"}, {"instrNext"}, desc="B=*P++, update zero flag" }, - { mnem="ldc *p++" , opcode=0xC8, {"adrlP","loadReg","memSaveC","incP","memSaveFlags","instrSub1"}, {"instrNext"}, desc="C=*P++, update zero flag" }, - { mnem="lda *q++" , opcode=0xC9, {"adrlQ","loadReg","memSaveA","incQ","memSaveFlags","instrSub1"}, {"instrNext"}, desc="A=*Q++, update zero flag" }, - { mnem="ldb *q++" , opcode=0xCA, {"adrlQ","loadReg","memSaveB","incQ","memSaveFlags","instrSub1"}, {"instrNext"}, desc="B=*Q++, update zero flag" }, - { mnem="ldc *q++" , opcode=0xCB, {"adrlQ","loadReg","memSaveC","incQ","memSaveFlags","instrSub1"}, {"instrNext"}, desc="C=*Q++, update zero flag" }, + { mnem="lda imm8" , opcode=0x20, {"loadImmed", "memSaveA","memSaveFlags","instrSub1"}, {"instrNext"}, desc="A=imm8, update zero flag", ccode={"cpu.a=loadimmed; setzf(cpu.a);","lni;"} }, + { mnem="ldb imm8" , opcode=0x26, {"loadImmed", "memSaveB","memSaveFlags","instrSub1"}, {"instrNext"}, desc="B=imm8, update zero flag", ccode={"cpu.b=loadimmed; setzf(cpu.b);","lni;"} }, + { mnem="ldc imm8" , opcode=0x27, {"loadImmed", "memSaveC","memSaveFlags","instrSub1"}, {"instrNext"}, desc="C=imm8, update zero flag", ccode={"cpu.c=loadimmed; setzf(cpu.c);","lni;"} }, + { mnem="lda *s+imm8", opcode=0x28, {"loadImmedT","instrSub1"}, {"loadStackRel","memSaveA","memSaveFlags","instrSub2"}, {"instrNext"}, desc="A=*s+imm8, update zero flag", ccode={"loadimmedt;","cpu.a=loadstackrel; setzf(cpu.a);","lni;"} }, + { mnem="ldb *s+imm8", opcode=0x29, {"loadImmedT","instrSub1"}, {"loadStackRel","memSaveB","memSaveFlags","instrSub2"}, {"instrNext"}, desc="B=*s+imm8, update zero flag", ccode={"loadimmedt;","cpu.b=loadstackrel; setzf(cpu.b);","lni;"} }, + { mnem="ldc *s+imm8", opcode=0x2A, {"loadImmedT","instrSub1"}, {"loadStackRel","memSaveC","memSaveFlags","instrSub2"}, {"instrNext"}, desc="C=*s+imm8, update zero flag", ccode={"loadimmedt;","cpu.c=loadstackrel; setzf(cpu.c);","lni;"} }, + { mnem="sta *s+imm8", opcode=0x96, {"loadImmedT","instrSub1"}, {"storeStackRel","alurA","instrSub2"}, {"instrNext"}, desc="*s+imm8=A", ccode={"loadimmedt;","storestackrel(cpu.a);","lni;"} }, + { mnem="stb *s+imm8", opcode=0x97, {"loadImmedT","instrSub1"}, {"storeStackRel","alurB","instrSub2"}, {"instrNext"}, desc="*s+imm8=B", ccode={"loadimmedt;","storestackrel(cpu.a);","lni;"} }, + { mnem="stc *s+imm8", opcode=0x98, {"loadImmedT","instrSub1"}, {"storeStackRel","alurC","instrSub2"}, {"instrNext"}, desc="*s+imm8=C", ccode={"loadimmedt;","storestackrel(cpu.a);","lni;"} }, + { mnem="lda *imm16" , opcode=0x51, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2",}, {"adrrUT","loadReg","memSaveA","memSaveFlags","instrSub3"}, {"instrNext"}, desc="A=*imm16, update zero flag", ccode={"loadimm161","loadimm162","cpu.a=loadut; setzf(cpu.a);","lni;"} }, + { mnem="ldb *imm16" , opcode=0x56, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2",}, {"adrrUT","loadReg","memSaveB","memSaveFlags","instrSub3"}, {"instrNext"}, desc="B=*imm16, update zero flag", ccode={"loadimm161","loadimm162","cpu.b=loadut; setzf(cpu.b);","lni;"} }, + { mnem="ldc *imm16" , opcode=0x57, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2",}, {"adrrUT","loadReg","memSaveC","memSaveFlags","instrSub3"}, {"instrNext"}, desc="C=*imm16, update zero flag", ccode={"loadimm161","loadimm162","cpu.c=loadut; setzf(cpu.c);","lni;"} }, + { mnem="sta *imm16" , opcode=0x50, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2",}, {"adrrUT","storeReg","alurA","instrSub3"}, {"instrNext"}, desc="*imm16=A", ccode={"loadimm161","loadimm162","storeut(cpu.a);","lni;"} }, + { mnem="stb *imm16" , opcode=0x58, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2",}, {"adrrUT","storeReg","alurB","instrSub3"}, {"instrNext"}, desc="*imm16=B", ccode={"loadimm161","loadimm162","storeut(cpu.b);","lni;"} }, + { mnem="stc *imm16" , opcode=0x59, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2",}, {"adrrUT","storeReg","alurC","instrSub3"}, {"instrNext"}, desc="*imm16=C", ccode={"loadimm161","loadimm162","storeut(cpu.c);","lni;"} }, + { mnem="sta *p" , opcode=0x52, {"adrlP","storeReg","alurA", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="*P=A", ccode={"storep(cpu.a);","lni;"} }, + { mnem="stb *p" , opcode=0x5A, {"adrlP","storeReg","alurB", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="*P=B", ccode={"storep(cpu.b);","lni;"} }, + { mnem="stc *p" , opcode=0x5B, {"adrlP","storeReg","alurC", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="*P=C", ccode={"storep(cpu.c);","lni;"} }, + { mnem="sta *q" , opcode=0x54, {"adrlQ","storeReg","alurA", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="*Q=A", ccode={"storeq(cpu.a);","lni;"} }, + { mnem="stb *q" , opcode=0x5C, {"adrlQ","storeReg","alurB", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="*Q=B", ccode={"storeq(cpu.b);","lni;"} }, + { mnem="stc *q" , opcode=0x5D, {"adrlQ","storeReg","alurC", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="*Q=C", ccode={"storeq(cpu.c);","lni;"} }, + { mnem="lda *p" , opcode=0x53, {"adrlP","loadReg","memSaveA", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="A=*P, update zero flag", ccode={"cpu.a=loadp; setzf(cpu.a);","lni;"} }, + { mnem="ldb *p" , opcode=0x5E, {"adrlP","loadReg","memSaveB", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="B=*P, update zero flag", ccode={"cpu.b=loadp; setzf(cpu.b);","lni;"} }, + { mnem="ldc *p" , opcode=0x5F, {"adrlP","loadReg","memSaveC", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="C=*P, update zero flag", ccode={"cpu.c=loadp; setzf(cpu.c);","lni;"} }, + { mnem="lda *q" , opcode=0x55, {"adrlQ","loadReg","memSaveA", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="A=*Q, update zero flag", ccode={"cpu.a=loadq; setzf(cpu.a);","lni;"} }, + { mnem="ldb *q" , opcode=0x61, {"adrlQ","loadReg","memSaveB", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="B=*Q, update zero flag", ccode={"cpu.b=loadq; setzf(cpu.b);","lni;"} }, + { mnem="ldc *q" , opcode=0x62, {"adrlQ","loadReg","memSaveC", "memSaveFlags","instrSub1"}, {"instrNext"}, desc="C=*Q, update zero flag", ccode={"cpu.c=loadq; setzf(cpu.c);","lni;"} }, + { mnem="sta *p++" , opcode=0xC0, {"adrlP","storeReg","alurA", "incP","memSaveFlags","instrSub1"}, {"instrNext"}, desc="*P++=A", ccode={"storepinc(cpu.a);","lni;"} }, + { mnem="stb *p++" , opcode=0xC1, {"adrlP","storeReg","alurB", "incP","memSaveFlags","instrSub1"}, {"instrNext"}, desc="*P++=B", ccode={"storepinc(cpu.b);","lni;"} }, + { mnem="stc *p++" , opcode=0xC2, {"adrlP","storeReg","alurC", "incP","memSaveFlags","instrSub1"}, {"instrNext"}, desc="*P++=C", ccode={"storepinc(cpu.c);","lni;"} }, + { mnem="sta *q++" , opcode=0xC3, {"adrlQ","storeReg","alurA", "incQ","memSaveFlags","instrSub1"}, {"instrNext"}, desc="*Q++=A", ccode={"storeqinc(cpu.a);","lni;"} }, + { mnem="stb *q++" , opcode=0xC4, {"adrlQ","storeReg","alurB", "incQ","memSaveFlags","instrSub1"}, {"instrNext"}, desc="*Q++=B", ccode={"storeqinc(cpu.b);","lni;"} }, + { mnem="stc *q++" , opcode=0xC5, {"adrlQ","storeReg","alurC", "incQ","memSaveFlags","instrSub1"}, {"instrNext"}, desc="*Q++=C", ccode={"storeqinc(cpu.c);","lni;"} }, + { mnem="lda *p++" , opcode=0xC6, {"adrlP","loadReg","memSaveA","incP","memSaveFlags","instrSub1"}, {"instrNext"}, desc="A=*P++, update zero flag", ccode={"cpu.a=loadpinc; setzf(cpu.a);","lni;"} }, + { mnem="ldb *p++" , opcode=0xC7, {"adrlP","loadReg","memSaveB","incP","memSaveFlags","instrSub1"}, {"instrNext"}, desc="B=*P++, update zero flag", ccode={"cpu.b=loadpinc; setzf(cpu.b);","lni;"} }, + { mnem="ldc *p++" , opcode=0xC8, {"adrlP","loadReg","memSaveC","incP","memSaveFlags","instrSub1"}, {"instrNext"}, desc="C=*P++, update zero flag", ccode={"cpu.c=loadpinc; setzf(cpu.c);","lni;"} }, + { mnem="lda *q++" , opcode=0xC9, {"adrlQ","loadReg","memSaveA","incQ","memSaveFlags","instrSub1"}, {"instrNext"}, desc="A=*Q++, update zero flag", ccode={"cpu.a=loadqinc; setzf(cpu.a);","lni;"} }, + { mnem="ldb *q++" , opcode=0xCA, {"adrlQ","loadReg","memSaveB","incQ","memSaveFlags","instrSub1"}, {"instrNext"}, desc="B=*Q++, update zero flag", ccode={"cpu.b=loadqinc; setzf(cpu.b);","lni;"} }, + { mnem="ldc *q++" , opcode=0xCB, {"adrlQ","loadReg","memSaveC","incQ","memSaveFlags","instrSub1"}, {"instrNext"}, desc="C=*Q++, update zero flag", ccode={"cpu.c=loadqinc; setzf(cpu.c);","lni;"} }, { category = "16-bit Load/Store", catlet="W" }, - { mnem="ldp imm16" , opcode=0x21, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"adwrUT","adwSaveP","instrNext"}, desc="P=imm16" }, - { mnem="ldq imm16" , opcode=0x23, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"adwrUT","adwSaveQ","instrNext"}, desc="Q=imm16" }, - { mnem="lds imm16" , opcode=0x25, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"adwrUT","adwSaveS","instrNext"}, desc="S=imm16" }, - { mnem="ldv imm16" , opcode=0x22, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"adwrUT","adwSaveV","instrNext"}, desc="V=imm16" }, - { mnem="ldp *s+imm8", opcode=0x7A, {"loadImmedT","instrSub1"}, {"loadStackRel161","instrSub2"}, {"loadStackRel162","instrSub3"}, {"adwrUT","adwSaveP","instrNext"}, desc="P=*S+imm8" }, - { mnem="ldq *s+imm8", opcode=0x7B, {"loadImmedT","instrSub1"}, {"loadStackRel161","instrSub2"}, {"loadStackRel162","instrSub3"}, {"adwrUT","adwSaveQ","instrNext"}, desc="Q=*S+imm8" }, - { mnem="stp *s+imm8", opcode=0x7E, {"loadImmedT","instrSub1"}, {"storeStackRel161","alurPH","instrSub2"}, {"storeStackRel162","alurPL","instrSub3"}, {"instrNext"}, desc="*S+imm8=P" }, - { mnem="stq *s+imm8", opcode=0x7F, {"loadImmedT","instrSub1"}, {"storeStackRel161","alurQH","instrSub2"}, {"storeStackRel162","alurQL","instrSub3"}, {"instrNext"}, desc="*S+imm8=Q" }, - { mnem="ldp *imm16" , opcode=0x68, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"loadUTU","adwIncUT","adwSaveP","instrSub3"}, {"adrlP","loadRegT","instrSub4"}, {"adwrUT","adwSaveP","instrNext"}, desc="P=*imm16" }, -- 0x69 - { mnem="ldq *imm16" , opcode=0x6A, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"loadUTU","adwIncUT","adwSaveQ","instrSub3"}, {"adrlQ","loadRegT","instrSub4"}, {"adwrUT","adwSaveQ","instrNext"}, desc="Q=*imm16" }, -- 0x6B - { mnem="stp *imm16" , opcode=0x6C, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"storeUT","alurPH","instrSub3"}, {"storeUT","adrInc","alurPL","instrSub4"}, {"instrNext"}, desc="*imm16=P" }, -- 0x6D - { mnem="stq *imm16" , opcode=0x6E, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"storeUT","alurQH","instrSub3"}, {"storeUT","adrInc","alurQL","instrSub4"}, {"instrNext"}, desc="*imm16=Q" }, -- 0x6F - { mnem="ldp *p" , opcode=0x92, {"adrlP","load161","instrSub1"}, {"adrlP","load162","instrSub2"}, {"adwrUT","adwSaveP","instrNext"}, desc="P=*P" }, - { mnem="ldq *p" , opcode=0x93, {"adrlP","load161","instrSub1"}, {"adrlP","load162","instrSub2"}, {"adwrUT","adwSaveQ","instrNext"}, desc="Q=*P" }, - { mnem="ldp *q" , opcode=0x94, {"adrlQ","load161","instrSub1"}, {"adrlQ","load162","instrSub2"}, {"adwrUT","adwSaveP","instrNext"}, desc="P=*Q" }, - { mnem="ldq *q" , opcode=0x95, {"adrlQ","load161","instrSub1"}, {"adrlQ","load162","instrSub2"}, {"adwrUT","adwSaveQ","instrNext"}, desc="Q=*Q" }, - { mnem="stp *q" , opcode=0x7C, {"adrlQ","store161","alurPH","instrSub1"}, {"adrlQ","store162","alurPL","instrSub2"}, {"instrNext"}, desc="*Q=P" }, - { mnem="stq *p" , opcode=0x7D, {"adrlP","store161","alurQH","instrSub1"}, {"adrlP","store162","alurQL","instrSub2"}, {"instrNext"}, desc="*P=Q" }, - { mnem="ldq *p++" , opcode=0xCC, {"adrlP","load161","instrSub1"}, {"adrlP","load162","instrSub2","incP2"}, {"adwrUT","adwSaveQ","instrNext"}, desc="Q=*P++++" }, - { mnem="ldp *q++" , opcode=0xCD, {"adrlQ","load161","instrSub1"}, {"adrlQ","load162","instrSub2","incQ2"}, {"adwrUT","adwSaveP","instrNext"}, desc="P=*Q++++" }, - { mnem="stp *q++" , opcode=0xCE, {"adrlQ","store161","alurPH","instrSub1"}, {"adrlQ","store162","alurPL","instrSub2","incQ2"}, {"instrNext"}, desc="*Q++++=P" }, - { mnem="stq *p++" , opcode=0xCF, {"adrlP","store161","alurQH","instrSub1"}, {"adrlP","store162","alurQL","instrSub2","incP2"}, {"instrNext"}, desc="*P++++=Q" }, + { mnem="ldp imm16" , opcode=0x21, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"adwrUT","adwSaveP","instrNext"}, desc="P=imm16", ccode={"loadimm161","loadimm162","cpu.p=wordut; lni;"} }, + { mnem="ldq imm16" , opcode=0x23, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"adwrUT","adwSaveQ","instrNext"}, desc="Q=imm16", ccode={"loadimm161","loadimm162","cpu.q=wordut; lni;"} }, + { mnem="lds imm16" , opcode=0x25, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"adwrUT","adwSaveS","instrNext"}, desc="S=imm16", ccode={"loadimm161","loadimm162","cpu.s=wordut; lni;"} }, + { mnem="ldv imm16" , opcode=0x22, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"adwrUT","adwSaveV","instrNext"}, desc="V=imm16", ccode={"loadimm161","loadimm162","cpu.v=wordut; lni;"} }, + { mnem="ldp *s+imm8", opcode=0x7A, {"loadImmedT","instrSub1"}, {"loadStackRel161","instrSub2"}, {"loadStackRel162","instrSub3"}, {"adwrUT","adwSaveP","instrNext"}, desc="P=*S+imm8", ccode={"loadimmedt","loadstackrel161","loadstackrel162","cpu.p=wordut; lni;"} }, + { mnem="ldq *s+imm8", opcode=0x7B, {"loadImmedT","instrSub1"}, {"loadStackRel161","instrSub2"}, {"loadStackRel162","instrSub3"}, {"adwrUT","adwSaveQ","instrNext"}, desc="Q=*S+imm8", ccode={"loadimmedt","loadstackrel161","loadstackrel162","cpu.p=wordut; lni;"} }, + { mnem="stp *s+imm8", opcode=0x7E, {"loadImmedT","instrSub1"}, {"storeStackRel161","alurPH","instrSub2"}, {"storeStackRel162","alurPL","instrSub3"}, {"instrNext"}, desc="*S+imm8=P", ccode={"loadimmedt","storestackrel161(cpu.p);","storestackrel162(cpu.p);","lni;"} }, + { mnem="stq *s+imm8", opcode=0x7F, {"loadImmedT","instrSub1"}, {"storeStackRel161","alurQH","instrSub2"}, {"storeStackRel162","alurQL","instrSub3"}, {"instrNext"}, desc="*S+imm8=Q", ccode={"loadimmedt","storestackrel161(cpu.q);","storestackrel162(cpu.q);","lni;"} }, + { mnem="ldp *imm16" , opcode=0x68, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"loadUTU","adwIncUT","adwSaveP","instrSub3"}, {"adrlP","loadRegT","instrSub4"}, {"adwrUT","adwSaveP","instrNext"}, desc="P=*imm16", ccode={"loadimm161","loadimm162","cpu.p=wordut; cpu.u=loadut;","cpu.t=loadpp1;","cpu.p=wordut; lni;"} }, -- 0x69 + { mnem="ldq *imm16" , opcode=0x6A, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"loadUTU","adwIncUT","adwSaveQ","instrSub3"}, {"adrlQ","loadRegT","instrSub4"}, {"adwrUT","adwSaveQ","instrNext"}, desc="Q=*imm16", ccode={"loadimm161","loadimm162","cpu.q=wordut; cpu.u=loadut;","cpu.t=loadqp1;","cpu.q=wordut; lni;"} }, -- 0x6B + { mnem="stp *imm16" , opcode=0x6C, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"storeUT","alurPH","instrSub3"}, {"storeUT","adrInc","alurPL","instrSub4"}, {"instrNext"}, desc="*imm16=P", ccode={"loadimm161","loadimm162","storeut(hibyte(cpu.p));","storeutp1(lobyte(cpu.p));","lni;"} }, -- 0x6D + { mnem="stq *imm16" , opcode=0x6E, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"storeUT","alurQH","instrSub3"}, {"storeUT","adrInc","alurQL","instrSub4"}, {"instrNext"}, desc="*imm16=Q", ccode={"loadimm161","loadimm162","storeut(hibyte(cpu.p));","storeutp1(lobyte(cpu.p));","lni;"} }, -- 0x6F + { mnem="ldp *p" , opcode=0x92, {"adrlP","load161","instrSub1"}, {"adrlP","load162","instrSub2"}, {"adwrUT","adwSaveP","instrNext"}, desc="P=*P", ccode={"cpu.u=loadp;","cpu.t=loadpp1;","cpu.p=wordut; lni;"} }, + { mnem="ldq *p" , opcode=0x93, {"adrlP","load161","instrSub1"}, {"adrlP","load162","instrSub2"}, {"adwrUT","adwSaveQ","instrNext"}, desc="Q=*P", ccode={"cpu.u=loadp;","cpu.t=loadpp1;","cpu.q=wordut; lni;"} }, + { mnem="ldp *q" , opcode=0x94, {"adrlQ","load161","instrSub1"}, {"adrlQ","load162","instrSub2"}, {"adwrUT","adwSaveP","instrNext"}, desc="P=*Q", ccode={"cpu.u=loadq;","cpu.t=loadqp1;","cpu.p=wordut; lni;"} }, + { mnem="ldq *q" , opcode=0x95, {"adrlQ","load161","instrSub1"}, {"adrlQ","load162","instrSub2"}, {"adwrUT","adwSaveQ","instrNext"}, desc="Q=*Q", ccode={"cpu.u=loadq;","cpu.t=loadqp1;","cpu.q=wordut; lni;"} }, + { mnem="stp *q" , opcode=0x7C, {"adrlQ","store161","alurPH","instrSub1"}, {"adrlQ","store162","alurPL","instrSub2"}, {"instrNext"}, desc="*Q=P", ccode={"storeq(hibyte(cpu.p));","storeqp1(lobyte(cpu.p));","lni;"} }, + { mnem="stq *p" , opcode=0x7D, {"adrlP","store161","alurQH","instrSub1"}, {"adrlP","store162","alurQL","instrSub2"}, {"instrNext"}, desc="*P=Q", ccode={"storep(hibyte(cpu.q));","storepp1(lobyte(cpu.q));","lni;"} }, + { mnem="ldq *p++" , opcode=0xCC, {"adrlP","load161","instrSub1"}, {"adrlP","load162","instrSub2","incP2"}, {"adwrUT","adwSaveQ","instrNext"}, desc="Q=*P++++", ccode={"cpu.u=loadpinc;","cpu.t=loadpinc;","cpu.q=wordut; lni;"} }, + { mnem="ldp *q++" , opcode=0xCD, {"adrlQ","load161","instrSub1"}, {"adrlQ","load162","instrSub2","incQ2"}, {"adwrUT","adwSaveP","instrNext"}, desc="P=*Q++++", ccode={"cpu.u=loadqinc;","cpu.t=loadqinc;","cpu.p=wordut; lni;"} }, + { mnem="stp *q++" , opcode=0xCE, {"adrlQ","store161","alurPH","instrSub1"}, {"adrlQ","store162","alurPL","instrSub2","incQ2"}, {"instrNext"}, desc="*Q++++=P", ccode={"storeqinc(hibyte(cpu.p));","storeqinc(lobyte(cpu.p));","lni;"} }, + { mnem="stq *p++" , opcode=0xCF, {"adrlP","store161","alurQH","instrSub1"}, {"adrlP","store162","alurQL","instrSub2","incP2"}, {"instrNext"}, desc="*P++++=Q", ccode={"storepinc(hibyte(cpu.q));","storepinc(lobyte(cpu.q));","lni;"} }, { category = "Moves", catlet="M" }, - { mnem="lda b" , opcode=0x80, {"alurB" ,"aluOpMov","aluSaveA","instrNext"}, desc="A=B" }, - { mnem="lda c" , opcode=0x81, {"alurC" ,"aluOpMov","aluSaveA","instrNext"}, desc="A=C" }, - { mnem="ldb a" , opcode=0x82, {"alurA" ,"aluOpMov","aluSaveB","instrNext"}, desc="B=A" }, - { mnem="ldb c" , opcode=0x83, {"alurC" ,"aluOpMov","aluSaveB","instrNext"}, desc="B=C" }, - { mnem="ldc a" , opcode=0x84, {"alurA" ,"aluOpMov","aluSaveC","instrNext"}, desc="C=A" }, - { mnem="ldc b" , opcode=0x85, {"alurB" ,"aluOpMov","aluSaveC","instrNext"}, desc="C=B" }, - { mnem="lda pl" , opcode=0x86, {"alurPL","aluOpMov","aluSaveA","instrNext"}, desc="A=P&FF" }, - { mnem="lda ph" , opcode=0x87, {"alurPH","aluOpMov","aluSaveA","instrNext"}, desc="A=P>>8" }, - { mnem="lda ql" , opcode=0x88, {"alurQL","aluOpMov","aluSaveA","instrNext"}, desc="A=Q&FF" }, - { mnem="lda qh" , opcode=0x89, {"alurQH","aluOpMov","aluSaveA","instrNext"}, desc="A=Q>>8" }, - { mnem="ldb pl" , opcode=0x37, {"alurPL","aluOpMov","aluSaveB","instrNext"}, desc="B=P&FF" }, - { mnem="ldc ph" , opcode=0x38, {"alurPH","aluOpMov","aluSaveC","instrNext"}, desc="C=P>>8" }, - { mnem="ldb ql" , opcode=0x39, {"alurQL","aluOpMov","aluSaveB","instrNext"}, desc="B=Q&FF" }, - { mnem="ldc qh" , opcode=0x3A, {"alurQH","aluOpMov","aluSaveC","instrNext"}, desc="C=Q>>8" }, - { mnem="ldp q" , opcode=0x8A, {"adwlQ" , "adwSaveP","instrNext"}, desc="P=Q" }, - { mnem="ldp s" , opcode=0x8B, {"adwlS" , "adwSaveP","instrNext"}, desc="P=S" }, - { mnem="ldp v" , opcode=0x8C, {"adwlV" , "adwSaveP","instrNext"}, desc="P=V" }, - { mnem="ldp i" , opcode=0x8D, {"adwlI" , "adwSaveP","instrNext"}, desc="P=I" }, - { mnem="ldp cb" , opcode=0x91, {"adwrCB", "adwSaveP","instrNext"}, desc="P=(C<<8)+B" }, - { mnem="ldq cb" , opcode=0xE0, {"adwrCB", "adwSaveQ","instrNext"}, desc="Q=(C<<8)+B" }, - { mnem="ldq p" , opcode=0x8E, {"adwlP" , "adwSaveQ","instrNext"}, desc="Q=P" }, - { mnem="lds p" , opcode=0x8F, {"adwlP" , "adwSaveS","instrNext"}, desc="S=P" }, - { mnem="ldv p" , opcode=0x90, {"adwlP" , "adwSaveV","instrNext"}, desc="V=P" }, + { mnem="lda b" , opcode=0x80, {"alurB" ,"aluOpMov","aluSaveA","instrNext"}, desc="A=B", ccode={"cpu.a=cpu.b; lni;"} }, + { mnem="lda c" , opcode=0x81, {"alurC" ,"aluOpMov","aluSaveA","instrNext"}, desc="A=C", ccode={"cpu.a=cpu.c; lni;"} }, + { mnem="ldb a" , opcode=0x82, {"alurA" ,"aluOpMov","aluSaveB","instrNext"}, desc="B=A", ccode={"cpu.b=cpu.a; lni;"} }, + { mnem="ldb c" , opcode=0x83, {"alurC" ,"aluOpMov","aluSaveB","instrNext"}, desc="B=C", ccode={"cpu.b=cpu.c; lni;"} }, + { mnem="ldc a" , opcode=0x84, {"alurA" ,"aluOpMov","aluSaveC","instrNext"}, desc="C=A", ccode={"cpu.c=cpu.a; lni;"} }, + { mnem="ldc b" , opcode=0x85, {"alurB" ,"aluOpMov","aluSaveC","instrNext"}, desc="C=B", ccode={"cpu.c=cpu.b; lni;"} }, + { mnem="lda pl" , opcode=0x86, {"alurPL","aluOpMov","aluSaveA","instrNext"}, desc="A=P&FF", ccode={"cpu.a=lobyte(cpu.p); lni;"} }, + { mnem="lda ph" , opcode=0x87, {"alurPH","aluOpMov","aluSaveA","instrNext"}, desc="A=P>>8", ccode={"cpu.a=hibyte(cpu.p); lni;"} }, + { mnem="lda ql" , opcode=0x88, {"alurQL","aluOpMov","aluSaveA","instrNext"}, desc="A=Q&FF", ccode={"cpu.a=lobyte(cpu.q); lni;"} }, + { mnem="lda qh" , opcode=0x89, {"alurQH","aluOpMov","aluSaveA","instrNext"}, desc="A=Q>>8", ccode={"cpu.a=hibyte(cpu.q); lni;"} }, + { mnem="ldb pl" , opcode=0x37, {"alurPL","aluOpMov","aluSaveB","instrNext"}, desc="B=P&FF", ccode={"cpu.b=lobyte(cpu.p); lni;"} }, + { mnem="ldc ph" , opcode=0x38, {"alurPH","aluOpMov","aluSaveC","instrNext"}, desc="C=P>>8", ccode={"cpu.c=hibyte(cpu.p); lni;"} }, + { mnem="ldb ql" , opcode=0x39, {"alurQL","aluOpMov","aluSaveB","instrNext"}, desc="B=Q&FF", ccode={"cpu.b=lobyte(cpu.q); lni;"} }, + { mnem="ldc qh" , opcode=0x3A, {"alurQH","aluOpMov","aluSaveC","instrNext"}, desc="C=Q>>8", ccode={"cpu.c=hibyte(cpu.q); lni;"} }, + { mnem="ldp q" , opcode=0x8A, {"adwlQ" , "adwSaveP","instrNext"}, desc="P=Q", ccode={"cpu.p=cpu.q; lni;"} }, + { mnem="ldp s" , opcode=0x8B, {"adwlS" , "adwSaveP","instrNext"}, desc="P=S", ccode={"cpu.p=cpu.s; lni;"} }, + { mnem="ldp v" , opcode=0x8C, {"adwlV" , "adwSaveP","instrNext"}, desc="P=V", ccode={"cpu.p=cpu.v; lni;"} }, + { mnem="ldp i" , opcode=0x8D, {"adwlI" , "adwSaveP","instrNext"}, desc="P=I", ccode={"cpu.p=cpu.i; lni;"} }, + { mnem="ldp cb" , opcode=0x91, {"adwrCB", "adwSaveP","instrNext"}, desc="P=(C<<8)+B", ccode={"cpu.p=wordcb; lni;"} }, + { mnem="ldq cb" , opcode=0xE0, {"adwrCB", "adwSaveQ","instrNext"}, desc="Q=(C<<8)+B", ccode={"cpu.q=wordcb; lni;"} }, + { mnem="ldq p" , opcode=0x8E, {"adwlP" , "adwSaveQ","instrNext"}, desc="Q=P", ccode={"cpu.q=cpu.p; lni;"} }, + { mnem="lds p" , opcode=0x8F, {"adwlP" , "adwSaveS","instrNext"}, desc="S=P", ccode={"cpu.s=cpu.p; lni;"} }, + { mnem="ldv p" , opcode=0x90, {"adwlP" , "adwSaveV","instrNext"}, desc="V=P", ccode={"cpu.v=cpu.p; lni;"} }, }, aliases = {