From c1fc5d6399aee157ee2627c7dc5dedc907f3792e Mon Sep 17 00:00:00 2001 From: Redo Date: Thu, 10 Nov 2022 21:09:03 -0600 Subject: [PATCH] add labels to dasm --- assembler-8608.lua | 73 +++++++++++++++++++++++++++++++++++++++++----- rom-8608-defs.lua | 28 +++++++++--------- 2 files changed, 80 insertions(+), 21 deletions(-) diff --git a/assembler-8608.lua b/assembler-8608.lua index bcf11ad..d582c50 100644 --- a/assembler-8608.lua +++ b/assembler-8608.lua @@ -449,29 +449,85 @@ local function mnemsFromArch(arch) local mnems = {} for _, instr in ipairs(arch.instructions) do if instr.mnem then - mnems[instr.opcode] = instr.mnem + local len = 1 + for l in instr.mnem:gmatch("imm([0-9]+)") do len = len + tonumber(l)/8 end + mnems[instr.opcode] = { mnem = instr.mnem, rel = instr.rel, jmp = instr.jmp, len = len, } end end return mnems end +local function toSigned8(x) return x>=128 and x-256 or x end local function disassembleMemory(mem, code, arch) print("Disassembly:") local mnems = mnemsFromArch(arch) local addr = 0 - local function nextByte() local b = mem[addr]; addr = addr+1; return b; end + local function nextByte(d) local b = mem[addr]; addr = addr+1; return b or d; end local lastaddr = 0 + local jmpaddrs = {} + local labelnum = 0 + local subnum = 0 while addr<=0xFFFF do + local startaddr = addr local opcode = nextByte() - if opcode and ((not code) or code[addr-1]) then + if opcode and ((not code) or code[startaddr]) then + local mnem = mnems[opcode] + if mnem then + if mnem.jmp then + local jmpdest + if mnem.rel then jmpdest = toSigned8(nextByte(0)) + addr + else jmpdest = nextByte(0)*256 + nextByte(0) + end + if jmpdest then + if not jmpaddrs[jmpdest] then + jmpaddrs[jmpdest] = { + name = (mnem.rel and "label_"..labelnum or "subroutine_"..subnum), + from = {}, + } + if mnem.rel then labelnum = labelnum+1 else subnum = subnum+1 end + end + table.insert(jmpaddrs[jmpdest].from, startaddr) + end + else + addr = addr + mnem.len - 1 + end + end + end + end + addr = 0 + while addr<=0xFFFF do + local startaddr = addr + local opcode = nextByte() + if opcode and ((not code) or code[startaddr]) then local line = {} - local mnem = mnems[opcode] or "???" + local mnem = mnems[opcode].mnem or "???" table.insert(line, trim(mnem:gsub("imm[0-9]+", ""))) local tlen = 1 for lens in mnem:gmatch("imm([0-9]+)") do local len = tonumber(lens)/8 if len==1 then - table.insert(line, "$"..string.format("%02X", nextByte() or 0)) + local data = nextByte(0) + local jmp + if mnems[opcode].rel then + local jmpdest = (addr + toSigned8(data))%65536 + jmp = jmpaddrs[jmpdest] + if jmp then + table.insert(line, jmp.name) + --table.insert(line, ";") + --table.insert(line, "$"..string.format("%04X", jmpdest)..",") + end + end + if not jmp then table.insert(line, "$"..string.format("%02X", data)) end elseif len==2 then - table.insert(line, "$"..string.format("%04X", (nextByte() or 0)*256 + (nextByte() or 0))) + local data = nextByte(0)*256 + nextByte(0) + local jmp + if mnems[opcode].jmp then + local jmpdest = data + jmp = jmpaddrs[jmpdest] + if jmp then + table.insert(line, jmp.name) + --table.insert(line, ";") + end + end + if not jmp then table.insert(line, "$"..string.format("%04X", data)) end else error("invalid imm len") end tlen = tlen + len end @@ -479,9 +535,12 @@ local function disassembleMemory(mem, code, arch) for i = addr-tlen, addr-1 do table.insert(lineb, string.format("%02X", mem[i] or 0)) end + local label = "" + local jmp = jmpaddrs[startaddr] + if jmp then label = jmp.name..":" end local lb = table.concat(lineb, " ") if lastaddr~=addr-tlen then print("...") end - print(string.format("%04X", addr-tlen).." | "..(" "):rep(8-#lb)..lb.." | "..table.concat(line, " ")) + print(string.format("%04X", addr-tlen).." | "..(" "):rep(8-#lb)..lb.." | "..(" "):rep(13-#label)..label.." "..table.concat(line, " ")) lastaddr = addr end end diff --git a/rom-8608-defs.lua b/rom-8608-defs.lua index cfcf6ef..881967d 100644 --- a/rom-8608-defs.lua +++ b/rom-8608-defs.lua @@ -233,19 +233,19 @@ instructions = { { mnem="sbc a" , opcode=0x4F, {"aluC", "alurA","aluOpSub" ,"instrNext"}, desc="C-=A, set flags" }, { category = "Jumps", catlet="J" }, - { mnem="jmp imm16" , opcode=0x60, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"jmpAbsUT" }, desc="I=imm16" }, - { mnem="jsr imm16" , opcode=0x63, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"jmpAbsUT","saveRetAddr"}, desc="I=imm16, Q=I" }, - { mnem="jmp p" , opcode=0x64, {"jmpAbsP" }, desc="I=P" }, - { mnem="jsr p" , opcode=0x65, {"jmpAbsP","saveRetAddr"}, desc="I=P, Q=I" }, - { mnem="jmp q" , opcode=0x66, {"jmpAbsQ" }, desc="I=Q" }, - { mnem="jsr q" , opcode=0x67, {"jmpAbsQ","saveRetAddr"}, desc="I=Q, Q=I" }, - { mnem="jpr imm8" , opcode=0x31, ncycles=2, {"loadImmed","memSaveT","instrSub1"}, {"jmpRelT"}, desc="I+=imm8" }, - { mnem="jnz imm8" , opcode=0x30, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NZ" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if !Zero" }, - { mnem="jpz imm8" , opcode=0x32, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0Z" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if Zero" }, - { mnem="jlt imm8" , opcode=0x33, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NC" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if !Carry" }, - { mnem="jge imm8" , opcode=0x34, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0C" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if Carry" }, - { mnem="jgt imm8" , opcode=0x35, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NC","instrNext0Z"}, {}, {"jmpRelT"}, {"instrNext"}, desc="I+=imm8 if !Zero & Carry" }, - { mnem="jle imm8" , opcode=0x36, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NC","instrNext0Z"}, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if Zero | !Carry" }, + { mnem="jmp imm16" , opcode=0x60, jmp=true, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"jmpAbsUT" }, desc="I=imm16" }, + { mnem="jsr imm16" , opcode=0x63, jmp=true, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"jmpAbsUT","saveRetAddr"}, desc="I=imm16, Q=I" }, + { mnem="jmp p" , opcode=0x64, jmp=true, {"jmpAbsP" }, desc="I=P" }, + { mnem="jsr p" , opcode=0x65, jmp=true, {"jmpAbsP","saveRetAddr"}, desc="I=P, Q=I" }, + { mnem="jmp q" , opcode=0x66, jmp=true, {"jmpAbsQ" }, desc="I=Q" }, + { mnem="jsr q" , opcode=0x67, jmp=true, {"jmpAbsQ","saveRetAddr"}, desc="I=Q, Q=I" }, + { mnem="jpr imm8" , opcode=0x31, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub1"}, {"jmpRelT"}, desc="I+=imm8" }, + { mnem="jnz imm8" , opcode=0x30, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NZ" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if !Zero" }, + { mnem="jpz imm8" , opcode=0x32, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0Z" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if Zero" }, + { mnem="jlt imm8" , opcode=0x33, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NC" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if !Carry" }, + { mnem="jge imm8" , opcode=0x34, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0C" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if Carry" }, + { mnem="jgt imm8" , opcode=0x35, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NC","instrNext0Z"}, {}, {"jmpRelT"}, {"instrNext"}, desc="I+=imm8 if !Zero & Carry"}, + { mnem="jle imm8" , opcode=0x36, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NC","instrNext0Z"}, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if Zero | !Carry"}, { category = "Stack", catlet="S" }, { mnem="psh a" , opcode=0x40, {"pushReg","alurA","instrSub1"}, {"instrNext"}, desc="*(S++)=A" }, @@ -259,7 +259,7 @@ instructions = { { mnem="pop p" , opcode=0x43, {"pop161","instrSub1"}, {"pop162","instrSub2"}, {"adwrUT","adwSaveP","instrNext"}, desc="P=*(----S)" }, { mnem="pop q" , opcode=0x49, {"pop161","instrSub1"}, {"pop162","instrSub2"}, {"adwrUT","adwSaveQ","instrNext"}, desc="Q=*(----S)" }, { mnem="psh imm8" , opcode=0x3B, {"loadImmedT","instrSub1"}, {"pushReg","alurT","instrSub2"}, {"instrNext"}, desc="*(S++)=imm8" }, - { mnem="psh imm16" , opcode=0x3C, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"pushReg","alurU","instrSub3"}, {"pushReg","alurT","instrSub4"}, {"instrNext"}, desc="*(S++++)=imm16" }, -- 0x3D + { mnem="phw imm16" , opcode=0x3C, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"pushReg","alurU","instrSub3"}, {"pushReg","alurT","instrSub4"}, {"instrNext"}, desc="*(S++++)=imm16" }, -- 0x3D { category = "8-bit Load/Store", catlet="B" }, { mnem="lda imm8" , opcode=0x20, {"loadImmed", "memSaveA","memSaveFlags","instrSub1"}, {"instrNext"}, desc="A=imm8, update zero flag" },