update readme, add 16-bit arith and pointer increments
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7ec5152d72
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c1fd3d1d30
@ -36,8 +36,8 @@ local function mnemFromLine(line, instrs, validWords)
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local function addNum(n)
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n = trim(n)
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local val, len = decodeNumber(n)
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local linei8 = line:gsub(n, "imm8", 1, true)
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local linei16 = line:gsub(n, "imm16", 1, true)
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local linei8 = line:gsub(n, "imm8", 1, true):lower()
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local linei16 = line:gsub(n, "imm16", 1, true):lower()
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if len==1 and (not instrs[linei8]) and instrs[linei16] then len = 2 end
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table.insert(imms, { val = val, len = len } )
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return " imm"..(len*8).." "
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@ -45,7 +45,7 @@ local function mnemFromLine(line, instrs, validWords)
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local function addLabel(n)
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n = trim(n)
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local len = 2
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local linei8 = line:gsub(n, "imm8", 1, true)
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local linei8 = line:gsub(n, "imm8", 1, true):lower()
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if instrs[linei8] then len = 1 end
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table.insert(imms, { label = n, len = len } )
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return " imm"..(len*8).." "
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@ -59,7 +59,7 @@ local function mnemFromLine(line, instrs, validWords)
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mnem = mnem:gsub(" %-?[0-9a-fA-F]+h " , function(n) if not validWords[trim(n)] then return addNum (n) end end)
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mnem = mnem:gsub(" %-?[0-9]+ " , function(n) if not validWords[trim(n)] then return addNum (n) end end)
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mnem = mnem:gsub(" [a-zA-Z_][a-zA-Z0-9_%.]* ", function(n) if not validWords[trim(n)] then return addLabel(n) end end)
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mnem = trim(mnem):gsub(" +", " ")
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mnem = trim(mnem):gsub(" +", " "):lower()
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if not instrs[mnem] then mnem = mnem:gsub("%+ imm", "imm") end
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@ -30,6 +30,11 @@ dec *s+imm8 2C 4 *(S+imm8)--, set flags
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icc *s+imm8 2D 4 *(S+imm8)+=CF, set flags
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tst *s+imm8 2E 3 Set flags according to *(S+imm8)-0
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16-bit Arithmetic (X):
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adp imm8 4A 2 P+=imm8 signed
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adq imm8 4B 2 Q+=imm8 signed
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ads imm8 4C 2 S+=imm8 signed
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8-bit Arithmetic/Logic (A):
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add imm8 24 2 A+=imm8, set flags
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adb imm8 72 2 B+=imm8, set flags
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@ -90,10 +95,10 @@ jsr q 67 1 I=Q, Q=I
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jpr imm8 31 2 I+=imm8
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jnz imm8 30 2 I+=imm8 if !Zero
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jpz imm8 32 2 I+=imm8 if Zero
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jge imm8 33 2 I+=imm8 if !Carry
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jlt imm8 34 2 I+=imm8 if Carry
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jgt imm8 35 2 I+=imm8 if !Zero&!Carry
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jle imm8 36 2 I+=imm8 if Zero|Carry
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jlt imm8 33 2 I+=imm8 if !Carry
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jge imm8 34 2 I+=imm8 if Carry
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jgt imm8 35 2 I+=imm8 if !Zero & Carry
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jle imm8 36 2 I+=imm8 if Zero | !Carry
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Stack (S):
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pha 40 2 *(S++)=A
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@ -135,6 +140,18 @@ ldc *p 5F 2 C=*P
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lda *q 55 2 A=*Q
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ldb *q 61 2 B=*Q
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ldc *q 62 2 C=*Q
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sta *p++ C0 2 *P++=A
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stb *p++ C1 2 *P++=B
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stc *p++ C2 2 *P++=C
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sta *q++ C3 2 *Q++=A
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stb *q++ C4 2 *Q++=B
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stc *q++ C5 2 *Q++=C
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lda *p++ C6 2 A=*P++
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ldb *p++ C7 2 B=*P++
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ldc *p++ C8 2 C=*P++
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lda *q++ C9 2 A=*Q++
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ldb *q++ CA 2 B=*Q++
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ldc *q++ CB 2 C=*Q++
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16-bit Load/Store (W):
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ldp imm16 21 3 P=imm16
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@ -155,6 +172,10 @@ ldp *q 94 3 P=*Q
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ldq *q 95 3 Q=*Q
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stp *q 7C 3 *Q=P
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stq *p 7D 3 *P=Q
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ldq *p++ CC 3 Q=*P++
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ldp *q++ CD 3 P=*Q++
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stp *q++ CE 3 *Q++=P
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stq *p++ CF 3 *P++=Q
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Moves (M):
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lda b 80 1 A=B
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@ -176,13 +197,13 @@ ldq p 8E 1 Q=P
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lds p 8F 1 S=P
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ldv p 90 1 V=P
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Opcodes used: 164/255
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Opcodes used: 183/255
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0123456789ABCDEF
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00 | C---------------
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10 | UUIIUIIUUUUUUUUU
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20 | BWWWAWBBBBBUUUU-
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30 | JJJJJJJ---------
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40 | SSSSSSSSSS------
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40 | SSSSSSSSSSXXX---
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50 | BBBBBBBBBBBBBBBB
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60 | JBBJJJJJWWWWWWWW
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70 | AAAAAAAAAAWWWWWW
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@ -190,7 +211,7 @@ Opcodes used: 164/255
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90 | MMWWWWBBBAAAAAAA
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A0 | AAAAAAAAAAAAAAAA
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B0 | AAAAAAAAAAAAAA--
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C0 | ----------------
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C0 | BBBBBBBBBBBBWWWW
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D0 | ----------------
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E0 | ----------------
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F0 | CCCCC-----------
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@ -3,10 +3,12 @@
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How to use the assembler:
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1. Install bllua3 from https://notabug.org/redo/bllua3
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2. Clone this repo into the Blockland folder
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2. Download this repo somewhere into the Blockland folder
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3. In BL console,
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luaexec("your_path/assembler-8608.lua");
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4. To assemble a program, place a 1x1f ghost brick on the top-left corner of the ROM, face forward, and in BL console do
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AssembleFile("other_path/filename.asm", "RomX RomY RomZ"); where RomX is the width of the ROM, RomY is the depth front to back, and RomZ is the height in bits.
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AssembleFile("other_path/filename.asm", "RomX RomY RomZ"); where RomX is the width of the ROM, RomY is the depth front to back, and RomZ is the height in bits, i.e. "16 16 8"
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You can also run the assembler from the command line to get a memory dump and disassembly in stdout, if you have lua installed:
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luajit "your_path/assembler-8608.lua" "other_path/filename.asm"
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For a list of instructions, see instructionList.txt
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@ -77,6 +77,13 @@ operations = {
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adrrUT = {"adrrhU","adrrlT"},
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adwrCB = {"adwrhC","adwrlB"},
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adwIncUT = {"adwrUT","adwInc"},
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adwP = {"adwlP","adwSaveP"},
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adwQ = {"adwlQ","adwSaveQ"},
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adwS = {"adwlS","adwSaveS"},
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incP = {"adwP","adwInc"},
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incQ = {"adwQ","adwInc"},
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incP2 = {"adwP","adwr2"},
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incQ2 = {"adwP","adwr2"},
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jmpRelT = {"instrNext","adrrTX"},
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jmpAbs = {"base","loadInstr","adrSaveI"},
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@ -126,6 +133,11 @@ instructions = {
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{ mnem="icc *s+imm8", opcode=0x2D, {"loadImmedT","instrSub1"}, {"loadStackRelU","instrSub2"}, {"aluU", "aluCinC", "aluAdd","aluSaveCarry","aluSaveNZ","instrSub3","instrPreload"}, {"storeStackRelU","instrNextPre"}, desc="*(S+imm8)+=CF, set flags" },
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{ mnem="tst *s+imm8", opcode=0x2E, {"loadImmedT","instrSub1"}, {"loadStackRelU","instrSub2"}, {"alulU","aluRun","aluRInv","aluCinOn","aluAdd","aluSaveCarry","aluSaveNZ","instrNext"}, desc="Set flags according to *(S+imm8)-0" },
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{ category = "16-bit Arithmetic", catlet = "X"},
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{ mnem="adp imm8" , opcode=0x4A, {"loadImmedT","instrSub1"}, {"adwP","adwrTX","instrNext"}, desc="P+=imm8 signed"},
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{ mnem="adq imm8" , opcode=0x4B, {"loadImmedT","instrSub1"}, {"adwQ","adwrTX","instrNext"}, desc="Q+=imm8 signed"},
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{ mnem="ads imm8" , opcode=0x4C, {"loadImmedT","instrSub1"}, {"adwS","adwrTX","instrNext"}, desc="S+=imm8 signed"},
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{ category = "8-bit Arithmetic/Logic", catlet="A" },
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{ mnem="add imm8" , opcode=0x24, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluAdd", "aluSaveCarry","aluSaveNZ","instrNext"}, desc="A+=imm8, set flags" },
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{ mnem="adb imm8" , opcode=0x72, {"loadImmedT","instrSub1"}, {"aluB", "alurT","aluAdd", "aluSaveCarry","aluSaveNZ","instrNext"}, desc="B+=imm8, set flags" },
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@ -219,18 +231,30 @@ instructions = {
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{ mnem="sta *imm16" , opcode=0x50, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2",}, {"adrrUT","storeReg","alurA","instrSub3"}, {"instrNext"}, desc="*imm16=A" },
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{ mnem="stb *imm16" , opcode=0x58, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2",}, {"adrrUT","storeReg","alurB","instrSub3"}, {"instrNext"}, desc="*imm16=B" },
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{ mnem="stc *imm16" , opcode=0x59, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2",}, {"adrrUT","storeReg","alurC","instrSub3"}, {"instrNext"}, desc="*imm16=C" },
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{ mnem="sta *p" , opcode=0x52, {"adrlP","storeReg","alurA","instrSub1"}, {"instrNext"}, desc="*P=A" },
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{ mnem="stb *p" , opcode=0x5A, {"adrlP","storeReg","alurB","instrSub1"}, {"instrNext"}, desc="*P=B" },
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{ mnem="stc *p" , opcode=0x5B, {"adrlP","storeReg","alurC","instrSub1"}, {"instrNext"}, desc="*P=C" },
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{ mnem="sta *q" , opcode=0x54, {"adrlQ","storeReg","alurA","instrSub1"}, {"instrNext"}, desc="*Q=A" },
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{ mnem="stb *q" , opcode=0x5C, {"adrlQ","storeReg","alurB","instrSub1"}, {"instrNext"}, desc="*Q=B" },
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{ mnem="stc *q" , opcode=0x5D, {"adrlQ","storeReg","alurC","instrSub1"}, {"instrNext"}, desc="*Q=C" },
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{ mnem="lda *p" , opcode=0x53, {"adrlP","loadReg","memSaveA","instrSub1"}, {"instrNext"}, desc="A=*P" },
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{ mnem="ldb *p" , opcode=0x5E, {"adrlP","loadReg","memSaveB","instrSub1"}, {"instrNext"}, desc="B=*P" },
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{ mnem="ldc *p" , opcode=0x5F, {"adrlP","loadReg","memSaveC","instrSub1"}, {"instrNext"}, desc="C=*P" },
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{ mnem="lda *q" , opcode=0x55, {"adrlQ","loadReg","memSaveA","instrSub1"}, {"instrNext"}, desc="A=*Q" },
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{ mnem="ldb *q" , opcode=0x61, {"adrlQ","loadReg","memSaveB","instrSub1"}, {"instrNext"}, desc="B=*Q" },
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{ mnem="ldc *q" , opcode=0x62, {"adrlQ","loadReg","memSaveC","instrSub1"}, {"instrNext"}, desc="C=*Q" },
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{ mnem="sta *p" , opcode=0x52, {"adrlP","storeReg","alurA", "instrSub1"}, {"instrNext"}, desc="*P=A" },
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{ mnem="stb *p" , opcode=0x5A, {"adrlP","storeReg","alurB", "instrSub1"}, {"instrNext"}, desc="*P=B" },
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{ mnem="stc *p" , opcode=0x5B, {"adrlP","storeReg","alurC", "instrSub1"}, {"instrNext"}, desc="*P=C" },
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{ mnem="sta *q" , opcode=0x54, {"adrlQ","storeReg","alurA", "instrSub1"}, {"instrNext"}, desc="*Q=A" },
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{ mnem="stb *q" , opcode=0x5C, {"adrlQ","storeReg","alurB", "instrSub1"}, {"instrNext"}, desc="*Q=B" },
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{ mnem="stc *q" , opcode=0x5D, {"adrlQ","storeReg","alurC", "instrSub1"}, {"instrNext"}, desc="*Q=C" },
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{ mnem="lda *p" , opcode=0x53, {"adrlP","loadReg","memSaveA", "instrSub1"}, {"instrNext"}, desc="A=*P" },
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{ mnem="ldb *p" , opcode=0x5E, {"adrlP","loadReg","memSaveB", "instrSub1"}, {"instrNext"}, desc="B=*P" },
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{ mnem="ldc *p" , opcode=0x5F, {"adrlP","loadReg","memSaveC", "instrSub1"}, {"instrNext"}, desc="C=*P" },
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{ mnem="lda *q" , opcode=0x55, {"adrlQ","loadReg","memSaveA", "instrSub1"}, {"instrNext"}, desc="A=*Q" },
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{ mnem="ldb *q" , opcode=0x61, {"adrlQ","loadReg","memSaveB", "instrSub1"}, {"instrNext"}, desc="B=*Q" },
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{ mnem="ldc *q" , opcode=0x62, {"adrlQ","loadReg","memSaveC", "instrSub1"}, {"instrNext"}, desc="C=*Q" },
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{ mnem="sta *p++" , opcode=0xC0, {"adrlP","storeReg","alurA", "incP","instrSub1"}, {"instrNext"}, desc="*P++=A" },
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{ mnem="stb *p++" , opcode=0xC1, {"adrlP","storeReg","alurB", "incP","instrSub1"}, {"instrNext"}, desc="*P++=B" },
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{ mnem="stc *p++" , opcode=0xC2, {"adrlP","storeReg","alurC", "incP","instrSub1"}, {"instrNext"}, desc="*P++=C" },
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{ mnem="sta *q++" , opcode=0xC3, {"adrlQ","storeReg","alurA", "incQ","instrSub1"}, {"instrNext"}, desc="*Q++=A" },
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{ mnem="stb *q++" , opcode=0xC4, {"adrlQ","storeReg","alurB", "incQ","instrSub1"}, {"instrNext"}, desc="*Q++=B" },
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{ mnem="stc *q++" , opcode=0xC5, {"adrlQ","storeReg","alurC", "incQ","instrSub1"}, {"instrNext"}, desc="*Q++=C" },
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{ mnem="lda *p++" , opcode=0xC6, {"adrlP","loadReg","memSaveA","incP","instrSub1"}, {"instrNext"}, desc="A=*P++" },
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{ mnem="ldb *p++" , opcode=0xC7, {"adrlP","loadReg","memSaveB","incP","instrSub1"}, {"instrNext"}, desc="B=*P++" },
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{ mnem="ldc *p++" , opcode=0xC8, {"adrlP","loadReg","memSaveC","incP","instrSub1"}, {"instrNext"}, desc="C=*P++" },
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{ mnem="lda *q++" , opcode=0xC9, {"adrlQ","loadReg","memSaveA","incQ","instrSub1"}, {"instrNext"}, desc="A=*Q++" },
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{ mnem="ldb *q++" , opcode=0xCA, {"adrlQ","loadReg","memSaveB","incQ","instrSub1"}, {"instrNext"}, desc="B=*Q++" },
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{ mnem="ldc *q++" , opcode=0xCB, {"adrlQ","loadReg","memSaveC","incQ","instrSub1"}, {"instrNext"}, desc="C=*Q++" },
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{ category = "16-bit Load/Store", catlet="W" },
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{ mnem="ldp imm16" , opcode=0x21, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"adwrUT","adwSaveP","instrNext"}, desc="P=imm16" },
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@ -251,6 +275,10 @@ instructions = {
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{ mnem="ldq *q" , opcode=0x95, {"adrlQ","load161","instrSub1"}, {"adrlQ","load162","instrSub2"}, {"adwrUT","adwSaveQ","instrNext"}, desc="Q=*Q" },
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{ mnem="stp *q" , opcode=0x7C, {"adrlQ","store161","alurPH","instrSub1"}, {"adrlQ","store162","alurPL","instrSub2"}, {"instrNext"}, desc="*Q=P" },
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{ mnem="stq *p" , opcode=0x7D, {"adrlP","store161","alurQH","instrSub1"}, {"adrlP","store162","alurQL","instrSub2"}, {"instrNext"}, desc="*P=Q" },
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{ mnem="ldq *p++" , opcode=0xCC, {"adrlP","load161","instrSub1"}, {"adrlP","load162","instrSub2","incP2"}, {"adwrUT","adwSaveQ","instrNext"}, desc="Q=*P++++" },
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{ mnem="ldp *q++" , opcode=0xCD, {"adrlQ","load161","instrSub1"}, {"adrlQ","load162","instrSub2","incQ2"}, {"adwrUT","adwSaveP","instrNext"}, desc="P=*Q++++" },
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{ mnem="stp *q++" , opcode=0xCE, {"adrlQ","store161","alurPH","instrSub1"}, {"adrlQ","store162","alurPL","instrSub2","incQ2"}, {"instrNext"}, desc="*Q++++=P" },
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{ mnem="stq *p++" , opcode=0xCF, {"adrlP","store161","alurQH","instrSub1"}, {"adrlP","store162","alurQL","instrSub2","incP2"}, {"instrNext"}, desc="*P++++=Q" },
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{ category = "Moves", catlet="M" },
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{ mnem="lda b" , opcode=0x80, {"alurB" ,"aluAdd","aluSaveA","instrNext"}, desc="A=B" },
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