return {
roms = {
{ pos = {0, 0, 0}, size = {64, 16, 64}, signals = {
"alulU", "alulT", "alulC", "alulB", "alulA", "alurIL", "alurIH", "alurVL",
"alurVH", "alurSL", "alurSH", "alurQL", "alurQH", "alurPL", "alurPH", "alurU",
"alurT", "alurC", "alurB", "alurA", "alur1", "alur2", "alurm1", "alurm2",
"adrrhU", "adrrhC", "adrrlT", "adrrTX", "adrrlB", "adrrBX", "adwrhU", "adwrhC",
"adwrlT", "adwrTX", "adwrlB", "adwrBX", "adwlI", "adwlV", "adwlS", "adwlQ",
"adwlP", "adrlI", "adrlV", "adrlS", "adrlQ", "adrlP", "aluAdd", "adwSaveV",
"aluRun", "aluRInv", "aluCinOn", "aluCinC", "memWriteAlur", "adrInc", "adwInc", "aluXor",
"aluIor", "aluAnd", "memWriteAlur", "adrOut", "adrSaveI", "adwSaveP", "adwSaveQ", "adwSaveS",
} },
{ pos = {-34, 16, 0}, size = {32, 32, 8}, signals = {
"aluSaveU", "aluSaveT", "aluSaveC", "aluSaveB", "aluSaveA", "aluSaveCarry", "aluSaveNZ", "always1",
} },
{ pos = {-34, 16, 17}, size = {32, 32, 32}, signals = {
"_", "_", "_", "_", "_", "_", "_", "_",
"_", "_", "_", "instrPre", "instrLoadPre", "always1", "instrLoad", "adrOut",
"memWriteAlur", "memSave", "instrNext0NZ", "instrNext0Z", "instrNext0NC", "instrNext0C", "instrLoadSub", "instrLoad",
"instrNext2", "instrNext1", "instrNext0", "memSaveU", "memSaveT", "memSaveC", "memSaveB", "memSaveA",
} },
{ pos = {66, 16, 0}, size = {32, 32, 16}, signals = {
"adrr1", "adrrm1", "adrrm2", "adrr2", "adwrm1", "adwrm2", "adwr2", "adwr1",
"memRead", "memWrite", "runFlgVal", "runFlgClk", "intFlgVal", "intFlgClk", "irqFlgClk", "always1",
} },
},
operations = {
base = {"always1"},
instrNext = {"base","adrlI","adrInc","adrSaveI","loadInstr"},
instrSub1 = {"base","instrLoadSub", "instrNext0"},
instrSub2 = {"base","instrLoadSub", "instrNext1", },
instrSub3 = {"base","instrLoadSub", "instrNext1","instrNext0"},
instrSub4 = {"base","instrLoadSub","instrNext2", },
instrSub5 = {"base","instrLoadSub","instrNext2", "instrNext0"},
instrSub6 = {"base","instrLoadSub","instrNext2","instrNext1", },
instrSub7 = {"base","instrLoadSub","instrNext2","instrNext1","instrNext0"},
instrSub23Cond = {"base","instrLoadSub","instrNext1"},
instrSwapIV = {"base","adwlI","adwSaveV","adrlV","adrSaveI","loadInstr"},
instrPreload = {"adrlI","adrInc","adrSaveI","adrOut","memRead","instrLoadPre"},
instrNextPre = {"base","instrPre","instrLoad","instrLoadSub"},
loadInstr = {"adrOut","memRead","instrLoad","instrLoadSub"},
loadReg = {"adrOut","memRead","memSave"},
storeReg = {"adrOut","memWrite","memWriteAlur"},
loadRegT = {"loadReg","memSaveT"},
pushReg = {"storeReg","adrlS","adwlS","adwInc","adwSaveS"},
popReg = {"loadReg","adrlS","adrrm1","adwlS","adwrm1","adwSaveS"},
pop161 = {"popReg","memSaveT"},
pop162 = {"popReg","memSaveU"},
loadImmed = {"adrlI","adrInc","adrSaveI","loadReg"},
loadImmedT = {"loadImmed","memSaveT"},
loadImm161 = {"loadImmed","memSaveU"},
loadImm162 = {"loadImmed","memSaveT"},
loadStackRel = {"adrlS","adrrTX","loadReg"},
loadStackRelT = {"loadStackRel","memSaveT"},
loadStackRelU = {"loadStackRel","memSaveU"},
loadStackRel161 = {"loadStackRel", "memSaveU"},
loadStackRel162 = {"loadStackRel","adrInc","memSaveT"},
storeStackRel = {"adrlS","adrrTX","storeReg"},
storeStackRel161 = {"storeStackRel" },
storeStackRel162 = {"storeStackRel","adrInc"},
storeStackRelU = {"adrlS","adrrTX","storeReg","alurU"},
load161 = { "loadReg","memSaveU"},
load162 = {"adrInc","loadReg","memSaveT"},
store161 = { "storeReg"},
store162 = {"adrInc","storeReg"},
loadUTU = {"adrrUT","loadReg","memSaveU"},
storeUT = {"adrrUT","storeReg"},
adwrUT = {"adwrhU","adwrlT"},
adrrUT = {"adrrhU","adrrlT"},
adwrCB = {"adwrhC","adwrlB"},
adwIncUT = {"adwrUT","adwInc"},
jmpRelT = {"instrNext","adrrTX"},
jmpAbs = {"base","loadInstr","adrSaveI"},
jmpAbsUT = {"jmpAbs","adrrUT"},
jmpAbsP = {"jmpAbs","adrlP"},
jmpAbsQ = {"jmpAbs","adrlQ"},
saveRetAddr = {"adwlI","adwInc","adwSaveQ"},
aluMove = {"aluAdd","aluRun"},
aluA = {"alulA","aluSaveA","aluRun"},
aluB = {"alulB","aluSaveB","aluRun"},
aluC = {"alulC","aluSaveC","aluRun"},
aluT = {"alulT","aluSaveT","aluRun"},
aluU = {"alulU","aluSaveU","aluRun"},
},
instructions = {
{ category = "Control", catlet="C" },
{ mnem="rst" , opcode=0x00, {"base","intFlgClk","irqFlgClk","runFlgClk","runFlgVal","adrSaveI","aluSaveA","aluSaveB","aluSaveC","aluSaveU","aluSaveT","adwSaveP","adwSaveQ","adwSaveS","adwSaveV","loadInstr"}, desc="Clear all registers and set I=0" },
{ mnem="hlt" , opcode=0xF0, {"runFlgClk","instrNext"}, desc="Halt non-interrupt execution" },
{ mnem="run" , opcode=0xF1, {"runFlgClk","runFlgVal","instrNext"}, desc ="Resume non-interrupt execution" },
{ mnem="int" , opcode=0xF2, {"instrSwapIV","intFlgVal","intFlgClk","irqFlgClk"}, },
{ mnem="brk" , opcode=0xF3, {"instrSwapIV","adwInc","intFlgVal","intFlgClk"}, desc="Trigger interrupt" },
{ mnem="irt" , opcode=0xF4, {"instrSwapIV","adwInc","intFlgClk"}, desc="Return from interrupt" },
{ category = "16-bit Inc/Dec", catlet="I" },
{ mnem="icp" , opcode=0x12, {"adwlP","adwInc","adwSaveP","instrNext"}, desc="P++" },
{ mnem="dcp" , opcode=0x15, {"adwlP","adwrm1","adwSaveP","instrNext"}, desc="P--" },
{ mnem="icq" , opcode=0x13, {"adwlQ","adwInc","adwSaveQ","instrNext"}, desc="Q++" },
{ mnem="dcq" , opcode=0x16, {"adwlQ","adwrm1","adwSaveQ","instrNext"}, desc="Q--" },
{ category = "8-bit Unary", catlet="U" },
{ mnem="inc a" , opcode=0x10, {"aluA","alur1", "aluAdd","aluSaveCarry","aluSaveNZ","instrNext"}, desc="A++, set flags" },
{ mnem="dec a" , opcode=0x11, {"aluA","alurm1", "aluAdd","aluSaveCarry","aluSaveNZ","instrNext"}, desc="A--, set flags" },
{ mnem="icc a" , opcode=0x1B, {"aluA", "aluCinC", "aluAdd","aluSaveCarry","aluSaveNZ","instrNext"}, desc="A+=CF, set flags" },
{ mnem="inc b" , opcode=0x19, {"aluB","alur1", "aluAdd","aluSaveCarry","aluSaveNZ","instrNext"}, desc="B++, set flags" },
{ mnem="dec b" , opcode=0x1A, {"aluB","alurm1", "aluAdd","aluSaveCarry","aluSaveNZ","instrNext"}, desc="B--, set flags" },
{ mnem="icc b" , opcode=0x1C, {"aluB", "aluCinC", "aluAdd","aluSaveCarry","aluSaveNZ","instrNext"}, desc="B+=CF, set flags" },
{ mnem="inc c" , opcode=0x17, {"aluC","alur1", "aluAdd","aluSaveCarry","aluSaveNZ","instrNext"}, desc="C++, set flags" },
{ mnem="dec c" , opcode=0x18, {"aluC","alurm1", "aluAdd","aluSaveCarry","aluSaveNZ","instrNext"}, desc="C--, set flags" },
{ mnem="icc c" , opcode=0x1D, {"aluC", "aluCinC", "aluAdd","aluSaveCarry","aluSaveNZ","instrNext"}, desc="C+=CF, set flags" },
{ mnem="tst a" , opcode=0x14, {"alulA","aluRun","aluRInv","aluCinOn","aluAdd","aluSaveCarry","aluSaveNZ","instrNext"}, desc="Set flags according to A-0" },
{ mnem="tst b" , opcode=0x1E, {"alulB","aluRun","aluRInv","aluCinOn","aluAdd","aluSaveCarry","aluSaveNZ","instrNext"}, desc="Set flags according to B-0" },
{ mnem="tst c" , opcode=0x1F, {"alulC","aluRun","aluRInv","aluCinOn","aluAdd","aluSaveCarry","aluSaveNZ","instrNext"}, desc="Set flags according to C-0" },
{ mnem="inc *s+imm8", opcode=0x2B, {"loadImmedT","instrSub1"}, {"loadStackRelU","instrSub2"}, {"aluU","alur1", "aluAdd","aluSaveCarry","aluSaveNZ","instrSub3","instrPreload"}, {"storeStackRelU","instrNextPre"}, desc="*(S+imm8)++, set flags" },
{ mnem="dec *s+imm8", opcode=0x2C, {"loadImmedT","instrSub1"}, {"loadStackRelU","instrSub2"}, {"aluU","alurm1", "aluAdd","aluSaveCarry","aluSaveNZ","instrSub3","instrPreload"}, {"storeStackRelU","instrNextPre"}, desc="*(S+imm8)--, set flags" },
{ mnem="icc *s+imm8", opcode=0x2D, {"loadImmedT","instrSub1"}, {"loadStackRelU","instrSub2"}, {"aluU", "aluCinC", "aluAdd","aluSaveCarry","aluSaveNZ","instrSub3","instrPreload"}, {"storeStackRelU","instrNextPre"}, desc="*(S+imm8)+=CF, set flags" },
{ mnem="tst *s+imm8", opcode=0x2E, {"loadImmedT","instrSub1"}, {"loadStackRelU","instrSub2"}, {"alulU","aluRun","aluRInv","aluCinOn","aluAdd","aluSaveCarry","aluSaveNZ","instrNext"}, desc="Set flags according to *(S+imm8)-0" },
{ category = "8-bit Arithmetic/Logic", catlet="A" },
{ mnem="add imm8" , opcode=0x24, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluAdd", "aluSaveCarry","aluSaveNZ","instrNext"}, desc="A+=imm8, set flags" },
{ mnem="adb imm8" , opcode=0x72, {"loadImmedT","instrSub1"}, {"aluB", "alurT","aluAdd", "aluSaveCarry","aluSaveNZ","instrNext"}, desc="B+=imm8, set flags" },
{ mnem="adc imm8" , opcode=0x73, {"loadImmedT","instrSub1"}, {"aluC", "alurT","aluAdd", "aluSaveCarry","aluSaveNZ","instrNext"}, desc="C+=imm8, set flags" },
{ mnem="sub imm8" , opcode=0x70, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluAdd","aluRInv","aluCinOn","aluSaveCarry","aluSaveNZ","instrNext"}, desc="A-=imm8, set flags" },
{ mnem="sbb imm8" , opcode=0x99, {"loadImmedT","instrSub1"}, {"aluB", "alurT","aluAdd","aluRInv","aluCinOn","aluSaveCarry","aluSaveNZ","instrNext"}, desc="B-=imm8, set flags" },
{ mnem="sbc imm8" , opcode=0x9A, {"loadImmedT","instrSub1"}, {"aluC", "alurT","aluAdd","aluRInv","aluCinOn","aluSaveCarry","aluSaveNZ","instrNext"}, desc="C-=imm8, set flags" },
{ mnem="acc imm8" , opcode=0x78, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluAdd", "aluCinC", "aluSaveCarry","aluSaveNZ","instrNext"}, desc="A+=imm8+CF, set flags" },
{ mnem="scc imm8" , opcode=0x79, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluAdd","aluRInv","aluCinC" ,"aluSaveCarry","aluSaveNZ","instrNext"}, desc="A-=imm8+CF, set flags" },
{ mnem="cmp imm8" , opcode=0x71, {"loadImmedT","instrSub1"}, {"alulA","aluRun","alurT","aluAdd","aluRInv","aluCinOn","aluSaveCarry","aluSaveNZ","instrNext"}, desc="set flags according to A-imm8" },
{ mnem="and imm8" , opcode=0x74, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluAnd", "aluSaveNZ","instrNext"}, desc="A&=imm8, set zero flag" },
{ mnem="ior imm8" , opcode=0x75, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluIor", "aluSaveNZ","instrNext"}, desc="A|=imm8, set zero flag" },
{ mnem="xor imm8" , opcode=0x76, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluXor", "aluSaveNZ","instrNext"}, desc="A^=imm8, set zero flag" },
{ mnem="ann imm8" , opcode=0x77, {"loadImmedT","instrSub1"}, {"aluA", "alurT","aluAnd","aluRInv", "aluSaveNZ","instrNext"}, desc="A&=~imm8, set zero flag" },
{ mnem="add *s+imm8", opcode=0xAE, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluAdd", "aluSaveCarry","aluSaveNZ","instrNext"}, desc="A+=*(S+imm8), set flags" },
{ mnem="adb *s+imm8", opcode=0x9B, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluB", "alurT","aluAdd", "aluSaveCarry","aluSaveNZ","instrNext"}, desc="B+=*(S+imm8), set flags" },
{ mnem="adc *s+imm8", opcode=0x9C, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluC", "alurT","aluAdd", "aluSaveCarry","aluSaveNZ","instrNext"}, desc="C+=*(S+imm8), set flags" },
{ mnem="sub *s+imm8", opcode=0xAF, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluAdd","aluRInv","aluCinOn","aluSaveCarry","aluSaveNZ","instrNext"}, desc="A-=*(S+imm8), set flags" },
{ mnem="sbb *s+imm8", opcode=0x9D, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluB", "alurT","aluAdd","aluRInv","aluCinOn","aluSaveCarry","aluSaveNZ","instrNext"}, desc="B-=*(S+imm8), set flags" },
{ mnem="sbc *s+imm8", opcode=0x9E, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluC", "alurT","aluAdd","aluRInv","aluCinOn","aluSaveCarry","aluSaveNZ","instrNext"}, desc="C-=*(S+imm8), set flags" },
{ mnem="acc *s+imm8", opcode=0xB5, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluAdd", "aluCinC", "aluSaveCarry","aluSaveNZ","instrNext"}, desc="A+=*(S+imm8)+CF, set flags" },
{ mnem="scc *s+imm8", opcode=0xB7, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluAdd","aluRInv","aluCinC", "aluSaveCarry","aluSaveNZ","instrNext"}, desc="A-=*(S+imm8)+CF, set flags" },
{ mnem="cmp *s+imm8", opcode=0xB0, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"alulA","aluRun","alurT","aluAdd","aluRInv","aluCinOn","aluSaveCarry","aluSaveNZ","instrNext"}, desc="set flags according to A-*(S+imm8)" },
{ mnem="and *s+imm8", opcode=0xB1, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluAnd", "aluSaveNZ","instrNext"}, desc="A&=*(S+imm8), set zero flag" },
{ mnem="ior *s+imm8", opcode=0xB2, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluIor", "aluSaveNZ","instrNext"}, desc="A|=*(S+imm8), set zero flag" },
{ mnem="xor *s+imm8", opcode=0xB3, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluXor", "aluSaveNZ","instrNext"}, desc="A^=*(S+imm8), set zero flag" },
{ mnem="ann *s+imm8", opcode=0xB4, {"loadImmedT","instrSub1"}, {"loadStackRelT","instrSub2"}, {"aluA", "alurT","aluAnd","aluRInv", "aluSaveNZ","instrNext"}, desc="A&=~*(S+imm8), set zero flag" },
{ mnem="add b" , opcode=0xA0, {"aluA", "alurB","aluAdd", "aluSaveCarry","aluSaveNZ","instrNext"}, desc="A+=B, set flags" },
{ mnem="adc b" , opcode=0x9F, {"aluC", "alurB","aluAdd", "aluSaveCarry","aluSaveNZ","instrNext"}, desc="C+=B, set flags" },
{ mnem="sub b" , opcode=0xA1, {"aluA", "alurB","aluAdd","aluRInv","aluCinOn","aluSaveCarry","aluSaveNZ","instrNext"}, desc="A-=B, set flags" },
{ mnem="sbc b" , opcode=0xB6, {"aluC", "alurB","aluAdd","aluRInv","aluCinOn","aluSaveCarry","aluSaveNZ","instrNext"}, desc="C-=B, set flags" },
{ mnem="acc b" , opcode=0xB8, {"aluA", "alurB","aluAdd", "aluCinC", "aluSaveCarry","aluSaveNZ","instrNext"}, desc="A+=B+CF, set flags" },
{ mnem="scc b" , opcode=0xB9, {"aluA", "alurB","aluAdd","aluRInv","aluCinC", "aluSaveCarry","aluSaveNZ","instrNext"}, desc="A-=B+CF, set flags" },
{ mnem="cmp b" , opcode=0xA2, {"alulA","aluRun","alurB","aluAdd","aluRInv","aluCinOn","aluSaveCarry","aluSaveNZ","instrNext"}, desc="set flags according to A-B" },
{ mnem="and b" , opcode=0xA3, {"aluA", "alurB","aluAnd", "aluSaveNZ","instrNext"}, desc="A&=B, set zero flag" },
{ mnem="ior b" , opcode=0xA4, {"aluA", "alurB","aluIor", "aluSaveNZ","instrNext"}, desc="A|=B, set zero flag" },
{ mnem="xor b" , opcode=0xA5, {"aluA", "alurB","aluXor", "aluSaveNZ","instrNext"}, desc="A^=B, set zero flag" },
{ mnem="ann b" , opcode=0xA6, {"aluA", "alurB","aluAnd","aluRInv", "aluSaveNZ","instrNext"}, desc="A&=~B, set zero flag" },
{ mnem="add c" , opcode=0xA7, {"aluA", "alurC","aluAdd", "aluSaveCarry","aluSaveNZ","instrNext"}, desc="A+=C, set flags" },
{ mnem="adb c" , opcode=0xBD, {"aluB", "alurC","aluAdd", "aluSaveCarry","aluSaveNZ","instrNext"}, desc="B+=C, set flags" },
{ mnem="sub c" , opcode=0xA8, {"aluA", "alurC","aluAdd","aluRInv","aluCinOn","aluSaveCarry","aluSaveNZ","instrNext"}, desc="A-=C, set flags" },
{ mnem="sbb c" , opcode=0xBC, {"aluB", "alurC","aluAdd","aluRInv","aluCinOn","aluSaveCarry","aluSaveNZ","instrNext"}, desc="B-=C, set flags" },
{ mnem="acc c" , opcode=0xBA, {"aluA", "alurC","aluAdd", "aluCinC", "aluSaveCarry","aluSaveNZ","instrNext"}, desc="A+=C+CF, set flags" },
{ mnem="scc c" , opcode=0xBB, {"aluA", "alurC","aluAdd","aluRInv","aluCinC" ,"aluSaveCarry","aluSaveNZ","instrNext"}, desc="A-=C+CF, set flags" },
{ mnem="cmp c" , opcode=0xA9, {"alulA","aluRun","alurC","aluAdd","aluRInv","aluCinOn","aluSaveCarry","aluSaveNZ","instrNext"}, desc="set flags according to A-C" },
{ mnem="and c" , opcode=0xAA, {"aluA", "alurC","aluAnd", "aluSaveNZ","instrNext"}, desc="A&=C, set zero flag" },
{ mnem="ior c" , opcode=0xAB, {"aluA", "alurC","aluIor", "aluSaveNZ","instrNext"}, desc="A|=C, set zero flag" },
{ mnem="xor c" , opcode=0xAC, {"aluA", "alurC","aluXor", "aluSaveNZ","instrNext"}, desc="A^=C, set zero flag" },
{ mnem="ann c" , opcode=0xAD, {"aluA", "alurC","aluAnd","aluRInv", "aluSaveNZ","instrNext"}, desc="A&=~C, set zero flag" },
{ category = "Jumps", catlet="J" },
{ mnem="jmp imm16" , opcode=0x60, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"jmpAbsUT" }, desc="I=imm16" },
{ mnem="jsr imm16" , opcode=0x63, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"jmpAbsUT","saveRetAddr"}, desc="I=imm16, Q=I" },
{ mnem="jmp p" , opcode=0x64, {"jmpAbsP" }, desc="I=P" },
{ mnem="jsr p" , opcode=0x65, {"jmpAbsP","saveRetAddr"}, desc="I=P, Q=I" },
{ mnem="jmp q" , opcode=0x66, {"jmpAbsQ" }, desc="I=Q" },
{ mnem="jsr q" , opcode=0x67, {"jmpAbsQ","saveRetAddr"}, desc="I=Q, Q=I" },
{ mnem="jpr imm8" , opcode=0x31, ncycles=2, {"loadImmed","memSaveT","instrSub1"}, {"jmpRelT"}, desc="I+=imm8" },
{ mnem="jnz imm8" , opcode=0x30, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NZ" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if !Zero" },
{ mnem="jpz imm8" , opcode=0x32, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0Z" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if Zero" },
{ mnem="jlt imm8" , opcode=0x33, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NC" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if !Carry" },
{ mnem="jge imm8" , opcode=0x34, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0C" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if Carry" },
{ mnem="jgt imm8" , opcode=0x35, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NC","instrNext0Z"}, {}, {"jmpRelT"}, {"instrNext"}, desc="I+=imm8 if !Zero & Carry" },
{ mnem="jle imm8" , opcode=0x36, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NC","instrNext0Z"}, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if Zero | !Carry" },
{ category = "Stack", catlet="S" },
{ mnem="pha" , opcode=0x40, {"pushReg","alurA","instrSub1"}, {"instrNext"}, desc="*(S++)=A" },
{ mnem="phb" , opcode=0x44, {"pushReg","alurB","instrSub1"}, {"instrNext"}, desc="*(S++)=B" },
{ mnem="phc" , opcode=0x45, {"pushReg","alurC","instrSub1"}, {"instrNext"}, desc="*(S++)=C" },
{ mnem="php" , opcode=0x41, {"pushReg","alurPH","instrSub1"}, {"pushReg","alurPL","instrSub2"}, {"instrNext"}, desc="*(S++++)=P" },
{ mnem="phq" , opcode=0x46, {"pushReg","alurQH","instrSub1"}, {"pushReg","alurQL","instrSub2"}, {"instrNext"}, desc="*(S++++)=Q" },
{ mnem="ppa" , opcode=0x42, {"popReg","memSaveA","instrSub1"}, {"instrNext"}, desc="A=*(--S)" },
{ mnem="ppb" , opcode=0x47, {"popReg","memSaveB","instrSub1"}, {"instrNext"}, desc="B=*(--S)" },
{ mnem="ppc" , opcode=0x48, {"popReg","memSaveC","instrSub1"}, {"instrNext"}, desc="C=*(--S)" },
{ mnem="ppp" , opcode=0x43, {"pop161","instrSub1"}, {"pop162","instrSub2"}, {"adwrUT","adwSaveP","instrNext"}, desc="P=*(----S)" },
{ mnem="ppq" , opcode=0x49, {"pop161","instrSub1"}, {"pop162","instrSub2"}, {"adwrUT","adwSaveQ","instrNext"}, desc="Q=*(----S)" },
{ category = "8-bit Load/Store", catlet="B" },
{ mnem="lda imm8" , opcode=0x20, {"loadImmed", "memSaveA","instrSub1"}, {"instrNext"}, desc="A=imm8" },
{ mnem="ldb imm8" , opcode=0x26, {"loadImmed", "memSaveB","instrSub1"}, {"instrNext"}, desc="B=imm8" },
{ mnem="ldc imm8" , opcode=0x27, {"loadImmed", "memSaveC","instrSub1"}, {"instrNext"}, desc="C=imm8" },
{ mnem="lda *s+imm8", opcode=0x28, {"loadImmedT","instrSub1"}, {"loadStackRel","memSaveA","instrSub2"}, {"instrNext"}, desc="A=*s+imm8" },
{ mnem="ldb *s+imm8", opcode=0x29, {"loadImmedT","instrSub1"}, {"loadStackRel","memSaveB","instrSub2"}, {"instrNext"}, desc="B=*s+imm8" },
{ mnem="ldc *s+imm8", opcode=0x2A, {"loadImmedT","instrSub1"}, {"loadStackRel","memSaveC","instrSub2"}, {"instrNext"}, desc="C=*s+imm8" },
{ mnem="sta *s+imm8", opcode=0x96, {"loadImmedT","instrSub1"}, {"storeStackRel","alurA","instrSub2"}, {"instrNext"}, desc="*s+imm8=A" },
{ mnem="stb *s+imm8", opcode=0x97, {"loadImmedT","instrSub1"}, {"storeStackRel","alurB","instrSub2"}, {"instrNext"}, desc="*s+imm8=B" },
{ mnem="stc *s+imm8", opcode=0x98, {"loadImmedT","instrSub1"}, {"storeStackRel","alurC","instrSub2"}, {"instrNext"}, desc="*s+imm8=C" },
{ mnem="lda *imm16" , opcode=0x51, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2",}, {"adrrUT","loadReg","memSaveA","instrSub3"}, {"instrNext"}, desc="A=*imm16" },
{ mnem="ldb *imm16" , opcode=0x56, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2",}, {"adrrUT","loadReg","memSaveB","instrSub3"}, {"instrNext"}, desc="B=*imm16" },
{ mnem="ldc *imm16" , opcode=0x57, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2",}, {"adrrUT","loadReg","memSaveC","instrSub3"}, {"instrNext"}, desc="C=*imm16" },
{ mnem="sta *imm16" , opcode=0x50, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2",}, {"adrrUT","storeReg","alurA","instrSub3"}, {"instrNext"}, desc="*imm16=A" },
{ mnem="stb *imm16" , opcode=0x58, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2",}, {"adrrUT","storeReg","alurB","instrSub3"}, {"instrNext"}, desc="*imm16=B" },
{ mnem="stc *imm16" , opcode=0x59, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2",}, {"adrrUT","storeReg","alurC","instrSub3"}, {"instrNext"}, desc="*imm16=C" },
{ mnem="sta *p" , opcode=0x52, {"adrlP","storeReg","alurA","instrSub1"}, {"instrNext"}, desc="*P=A" },
{ mnem="stb *p" , opcode=0x5A, {"adrlP","storeReg","alurB","instrSub1"}, {"instrNext"}, desc="*P=B" },
{ mnem="stc *p" , opcode=0x5B, {"adrlP","storeReg","alurC","instrSub1"}, {"instrNext"}, desc="*P=C" },
{ mnem="sta *q" , opcode=0x54, {"adrlQ","storeReg","alurA","instrSub1"}, {"instrNext"}, desc="*Q=A" },
{ mnem="stb *q" , opcode=0x5C, {"adrlQ","storeReg","alurB","instrSub1"}, {"instrNext"}, desc="*Q=B" },
{ mnem="stc *q" , opcode=0x5D, {"adrlQ","storeReg","alurC","instrSub1"}, {"instrNext"}, desc="*Q=C" },
{ mnem="lda *p" , opcode=0x53, {"adrlP","loadReg","memSaveA","instrSub1"}, {"instrNext"}, desc="A=*P" },
{ mnem="ldb *p" , opcode=0x5E, {"adrlP","loadReg","memSaveB","instrSub1"}, {"instrNext"}, desc="B=*P" },
{ mnem="ldc *p" , opcode=0x5F, {"adrlP","loadReg","memSaveC","instrSub1"}, {"instrNext"}, desc="C=*P" },
{ mnem="lda *q" , opcode=0x55, {"adrlQ","loadReg","memSaveA","instrSub1"}, {"instrNext"}, desc="A=*Q" },
{ mnem="ldb *q" , opcode=0x61, {"adrlQ","loadReg","memSaveB","instrSub1"}, {"instrNext"}, desc="B=*Q" },
{ mnem="ldc *q" , opcode=0x62, {"adrlQ","loadReg","memSaveC","instrSub1"}, {"instrNext"}, desc="C=*Q" },
{ category = "16-bit Load/Store", catlet="W" },
{ mnem="ldp imm16" , opcode=0x21, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"adwrUT","adwSaveP","instrNext"}, desc="P=imm16" },
{ mnem="ldq imm16" , opcode=0x23, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"adwrUT","adwSaveQ","instrNext"}, desc="Q=imm16" },
{ mnem="lds imm16" , opcode=0x25, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"adwrUT","adwSaveS","instrNext"}, desc="S=imm16" },
{ mnem="ldv imm16" , opcode=0x22, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"adwrUT","adwSaveV","instrNext"}, desc="V=imm16" },
{ mnem="ldp *s+imm8", opcode=0x7A, {"loadImmedT","instrSub1"}, {"loadStackRel161","instrSub2"}, {"loadStackRel162","instrSub3"}, {"adwrUT","adwSaveP","instrNext"}, desc="P=*S+imm8" },
{ mnem="ldq *s+imm8", opcode=0x7B, {"loadImmedT","instrSub1"}, {"loadStackRel161","instrSub2"}, {"loadStackRel162","instrSub3"}, {"adwrUT","adwSaveQ","instrNext"}, desc="Q=*S+imm8" },
{ mnem="stp *s+imm8", opcode=0x7E, {"loadImmedT","instrSub1"}, {"storeStackRel161","alurPH","instrSub2"}, {"storeStackRel162","alurPL","instrSub3"}, {"instrNext"}, desc="*S+imm8=P" },
{ mnem="stq *s+imm8", opcode=0x7F, {"loadImmedT","instrSub1"}, {"storeStackRel161","alurQH","instrSub2"}, {"storeStackRel162","alurQL","instrSub3"}, {"instrNext"}, desc="*S+imm8=Q" },
{ mnem="ldp *imm16" , opcode=0x68, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"loadUTU","adwIncUT","adwSaveP","instrSub3"}, {"adrlP","loadRegT","instrSub4"}, {"adwrUT","adwSaveP","instrNext"}, desc="P=*imm16" }, -- 0x69
{ mnem="ldq *imm16" , opcode=0x6A, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"loadUTU","adwIncUT","adwSaveQ","instrSub3"}, {"adrlQ","loadRegT","instrSub4"}, {"adwrUT","adwSaveQ","instrNext"}, desc="Q=*imm16" }, -- 0x6B
{ mnem="stp *imm16" , opcode=0x6C, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"storeUT","alurPH","instrSub3"}, {"storeUT","adrInc","alurPL","instrSub4"}, {"instrNext"}, desc="*imm16=P" }, -- 0x6D
{ mnem="stq *imm16" , opcode=0x6E, {"loadImm161","instrSub1"}, {"loadImm162","instrSub2"}, {"storeUT","alurQH","instrSub3"}, {"storeUT","adrInc","alurQL","instrSub4"}, {"instrNext"}, desc="*imm16=Q" }, -- 0x6F
{ mnem="ldp *p" , opcode=0x92, {"adrlP","load161","instrSub1"}, {"adrlP","load162","instrSub2"}, {"adwrUT","adwSaveP","instrNext"}, desc="P=*P" },
{ mnem="ldq *p" , opcode=0x93, {"adrlP","load161","instrSub1"}, {"adrlP","load162","instrSub2"}, {"adwrUT","adwSaveQ","instrNext"}, desc="Q=*P" },
{ mnem="ldp *q" , opcode=0x94, {"adrlQ","load161","instrSub1"}, {"adrlQ","load162","instrSub2"}, {"adwrUT","adwSaveP","instrNext"}, desc="P=*Q" },
{ mnem="ldq *q" , opcode=0x95, {"adrlQ","load161","instrSub1"}, {"adrlQ","load162","instrSub2"}, {"adwrUT","adwSaveQ","instrNext"}, desc="Q=*Q" },
{ mnem="stp *q" , opcode=0x7C, {"adrlQ","store161","alurPH","instrSub1"}, {"adrlQ","store162","alurPL","instrSub2"}, {"instrNext"}, desc="*Q=P" },
{ mnem="stq *p" , opcode=0x7D, {"adrlP","store161","alurQH","instrSub1"}, {"adrlP","store162","alurQL","instrSub2"}, {"instrNext"}, desc="*P=Q" },
{ category = "Moves", catlet="M" },
{ mnem="lda b" , opcode=0x80, {"alurB" ,"aluAdd","aluSaveA","instrNext"}, desc="A=B" },
{ mnem="lda c" , opcode=0x81, {"alurC" ,"aluAdd","aluSaveA","instrNext"}, desc="A=C" },
{ mnem="ldb a" , opcode=0x82, {"alurA" ,"aluAdd","aluSaveB","instrNext"}, desc="B=A" },
{ mnem="ldb c" , opcode=0x83, {"alurC" ,"aluAdd","aluSaveB","instrNext"}, desc="B=C" },
{ mnem="ldc a" , opcode=0x84, {"alurA" ,"aluAdd","aluSaveC","instrNext"}, desc="C=A" },
{ mnem="ldc b" , opcode=0x85, {"alurB" ,"aluAdd","aluSaveC","instrNext"}, desc="C=B" },
{ mnem="lda pl" , opcode=0x86, {"alurPL","aluAdd","aluSaveA","instrNext"}, desc="A=P&FF" },
{ mnem="lda ph" , opcode=0x87, {"alurPH","aluAdd","aluSaveA","instrNext"}, desc="A=P>>8" },
{ mnem="lda ql" , opcode=0x88, {"alurQL","aluAdd","aluSaveA","instrNext"}, desc="A=Q&FF" },
{ mnem="lda qh" , opcode=0x89, {"alurQH","aluAdd","aluSaveA","instrNext"}, desc="A=Q>>8" },
{ mnem="ldp q" , opcode=0x8A, {"adwlQ" ,"adwSaveP","instrNext"}, desc="P=Q" },
{ mnem="ldp s" , opcode=0x8B, {"adwlS" ,"adwSaveP","instrNext"}, desc="P=S" },
{ mnem="ldp v" , opcode=0x8C, {"adwlV" ,"adwSaveP","instrNext"}, desc="P=V" },
{ mnem="ldp i" , opcode=0x8D, {"adwlI" ,"adwSaveP","instrNext"}, desc="P=I" },
{ mnem="ldp cb" , opcode=0x91, {"adwrCB","adwSaveP","instrNext"}, desc="P=C<<8+B" },
{ mnem="ldq p" , opcode=0x8E, {"adwlP" ,"adwSaveQ","instrNext"}, desc="Q=P" },
{ mnem="lds p" , opcode=0x8F, {"adwlP" ,"adwSaveS","instrNext"}, desc="S=P" },
{ mnem="ldv p" , opcode=0x90, {"adwlP" ,"adwSaveV","instrNext"}, desc="V=P" },
},
}