From 16c1a9f75fe4d00fa03dc3e46a46fd41e768de91 Mon Sep 17 00:00:00 2001 From: Redo0 Date: Sat, 29 May 2021 13:14:50 -0500 Subject: [PATCH] make states numbers instead of booleans --- bricks/gates/NOT.cs | 2 +- bricks/gates/verticalNOT.cs | 4 +- bricks/gen/newcode/AND 2 Bit Vertical.cs | 8 +- bricks/gen/newcode/AND 2 Bit.cs | 8 +- bricks/gen/newcode/AND 3 Bit Vertical.cs | 10 +- bricks/gen/newcode/AND 3 Bit.cs | 10 +- bricks/gen/newcode/AND 4 Bit Vertical.cs | 12 +- bricks/gen/newcode/AND 4 Bit.cs | 12 +- bricks/gen/newcode/AND 5 Bit Vertical.cs | 14 +- bricks/gen/newcode/AND 5 Bit.cs | 14 +- bricks/gen/newcode/AND 6 Bit Vertical.cs | 16 +-- bricks/gen/newcode/AND 6 Bit.cs | 16 +-- bricks/gen/newcode/AND 7 Bit Vertical.cs | 18 +-- bricks/gen/newcode/AND 7 Bit.cs | 18 +-- bricks/gen/newcode/AND 8 Bit Vertical.cs | 20 +-- bricks/gen/newcode/AND 8 Bit.cs | 20 +-- bricks/gen/newcode/Buffer 1 Bit Down.cs | 4 +- bricks/gen/newcode/Buffer 1 Bit Up.cs | 4 +- bricks/gen/newcode/Buffer 1 Bit.cs | 4 +- bricks/gen/newcode/Buffer 10 Bit Down.cs | 22 ++-- bricks/gen/newcode/Buffer 10 Bit Up.cs | 22 ++-- bricks/gen/newcode/Buffer 10 Bit.cs | 22 ++-- bricks/gen/newcode/Buffer 11 Bit Down.cs | 24 ++-- bricks/gen/newcode/Buffer 11 Bit Up.cs | 24 ++-- bricks/gen/newcode/Buffer 11 Bit.cs | 24 ++-- bricks/gen/newcode/Buffer 12 Bit Down.cs | 26 ++-- bricks/gen/newcode/Buffer 12 Bit Up.cs | 26 ++-- bricks/gen/newcode/Buffer 12 Bit.cs | 26 ++-- bricks/gen/newcode/Buffer 13 Bit Down.cs | 28 ++-- bricks/gen/newcode/Buffer 13 Bit Up.cs | 28 ++-- bricks/gen/newcode/Buffer 13 Bit.cs | 28 ++-- bricks/gen/newcode/Buffer 14 Bit Down.cs | 30 ++--- bricks/gen/newcode/Buffer 14 Bit Up.cs | 30 ++--- bricks/gen/newcode/Buffer 14 Bit.cs | 30 ++--- bricks/gen/newcode/Buffer 15 Bit Down.cs | 32 ++--- bricks/gen/newcode/Buffer 15 Bit Up.cs | 32 ++--- bricks/gen/newcode/Buffer 15 Bit.cs | 32 ++--- bricks/gen/newcode/Buffer 16 Bit Down.cs | 34 ++--- bricks/gen/newcode/Buffer 16 Bit Up.cs | 34 ++--- bricks/gen/newcode/Buffer 16 Bit.cs | 34 ++--- bricks/gen/newcode/Buffer 2 Bit Down.cs | 6 +- bricks/gen/newcode/Buffer 2 Bit Up.cs | 6 +- bricks/gen/newcode/Buffer 2 Bit.cs | 6 +- bricks/gen/newcode/Buffer 24 Bit Down.cs | 50 +++---- bricks/gen/newcode/Buffer 24 Bit Up.cs | 50 +++---- bricks/gen/newcode/Buffer 24 Bit.cs | 50 +++---- bricks/gen/newcode/Buffer 3 Bit Down.cs | 8 +- bricks/gen/newcode/Buffer 3 Bit Up.cs | 8 +- bricks/gen/newcode/Buffer 3 Bit.cs | 8 +- bricks/gen/newcode/Buffer 32 Bit Down.cs | 66 +++++----- bricks/gen/newcode/Buffer 32 Bit Up.cs | 66 +++++----- bricks/gen/newcode/Buffer 32 Bit.cs | 66 +++++----- bricks/gen/newcode/Buffer 4 Bit Down.cs | 10 +- bricks/gen/newcode/Buffer 4 Bit Up.cs | 10 +- bricks/gen/newcode/Buffer 4 Bit.cs | 10 +- bricks/gen/newcode/Buffer 48 Bit Down.cs | 98 +++++++------- bricks/gen/newcode/Buffer 48 Bit Up.cs | 98 +++++++------- bricks/gen/newcode/Buffer 48 Bit.cs | 98 +++++++------- bricks/gen/newcode/Buffer 5 Bit Down.cs | 12 +- bricks/gen/newcode/Buffer 5 Bit Up.cs | 12 +- bricks/gen/newcode/Buffer 5 Bit.cs | 12 +- bricks/gen/newcode/Buffer 6 Bit Down.cs | 14 +- bricks/gen/newcode/Buffer 6 Bit Up.cs | 14 +- bricks/gen/newcode/Buffer 6 Bit.cs | 14 +- bricks/gen/newcode/Buffer 64 Bit Down.cs | 130 +++++++++---------- bricks/gen/newcode/Buffer 64 Bit Up.cs | 130 +++++++++---------- bricks/gen/newcode/Buffer 64 Bit.cs | 130 +++++++++---------- bricks/gen/newcode/Buffer 7 Bit Down.cs | 16 +-- bricks/gen/newcode/Buffer 7 Bit Up.cs | 16 +-- bricks/gen/newcode/Buffer 7 Bit.cs | 16 +-- bricks/gen/newcode/Buffer 8 Bit Down.cs | 18 +-- bricks/gen/newcode/Buffer 8 Bit Up.cs | 18 +-- bricks/gen/newcode/Buffer 8 Bit.cs | 18 +-- bricks/gen/newcode/Buffer 9 Bit Down.cs | 20 +-- bricks/gen/newcode/Buffer 9 Bit Up.cs | 20 +-- bricks/gen/newcode/Buffer 9 Bit.cs | 20 +-- bricks/gen/newcode/D FlipFlop 1 Bit Down.cs | 2 +- bricks/gen/newcode/D FlipFlop 1 Bit Up.cs | 2 +- bricks/gen/newcode/D FlipFlop 1 Bit.cs | 2 +- bricks/gen/newcode/D FlipFlop 10 Bit Down.cs | 2 +- bricks/gen/newcode/D FlipFlop 10 Bit Up.cs | 2 +- bricks/gen/newcode/D FlipFlop 10 Bit.cs | 2 +- bricks/gen/newcode/D FlipFlop 11 Bit Down.cs | 2 +- bricks/gen/newcode/D FlipFlop 11 Bit Up.cs | 2 +- bricks/gen/newcode/D FlipFlop 11 Bit.cs | 2 +- bricks/gen/newcode/D FlipFlop 12 Bit Down.cs | 2 +- bricks/gen/newcode/D FlipFlop 12 Bit Up.cs | 2 +- bricks/gen/newcode/D FlipFlop 12 Bit.cs | 2 +- bricks/gen/newcode/D FlipFlop 13 Bit Down.cs | 2 +- bricks/gen/newcode/D FlipFlop 13 Bit Up.cs | 2 +- bricks/gen/newcode/D FlipFlop 13 Bit.cs | 2 +- bricks/gen/newcode/D FlipFlop 14 Bit Down.cs | 2 +- bricks/gen/newcode/D FlipFlop 14 Bit Up.cs | 2 +- bricks/gen/newcode/D FlipFlop 14 Bit.cs | 2 +- bricks/gen/newcode/D FlipFlop 15 Bit Down.cs | 2 +- bricks/gen/newcode/D FlipFlop 15 Bit Up.cs | 2 +- bricks/gen/newcode/D FlipFlop 15 Bit.cs | 2 +- bricks/gen/newcode/D FlipFlop 16 Bit Down.cs | 2 +- bricks/gen/newcode/D FlipFlop 16 Bit Up.cs | 2 +- bricks/gen/newcode/D FlipFlop 16 Bit.cs | 2 +- bricks/gen/newcode/D FlipFlop 2 Bit Down.cs | 2 +- bricks/gen/newcode/D FlipFlop 2 Bit Up.cs | 2 +- bricks/gen/newcode/D FlipFlop 2 Bit.cs | 2 +- bricks/gen/newcode/D FlipFlop 24 Bit Down.cs | 2 +- bricks/gen/newcode/D FlipFlop 24 Bit Up.cs | 2 +- bricks/gen/newcode/D FlipFlop 24 Bit.cs | 2 +- bricks/gen/newcode/D FlipFlop 3 Bit Down.cs | 2 +- bricks/gen/newcode/D FlipFlop 3 Bit Up.cs | 2 +- bricks/gen/newcode/D FlipFlop 3 Bit.cs | 2 +- bricks/gen/newcode/D FlipFlop 32 Bit Down.cs | 2 +- bricks/gen/newcode/D FlipFlop 32 Bit Up.cs | 2 +- bricks/gen/newcode/D FlipFlop 32 Bit.cs | 2 +- bricks/gen/newcode/D FlipFlop 4 Bit Down.cs | 2 +- bricks/gen/newcode/D FlipFlop 4 Bit Up.cs | 2 +- bricks/gen/newcode/D FlipFlop 4 Bit.cs | 2 +- bricks/gen/newcode/D FlipFlop 48 Bit Down.cs | 2 +- bricks/gen/newcode/D FlipFlop 48 Bit Up.cs | 2 +- bricks/gen/newcode/D FlipFlop 48 Bit.cs | 2 +- bricks/gen/newcode/D FlipFlop 5 Bit Down.cs | 2 +- bricks/gen/newcode/D FlipFlop 5 Bit Up.cs | 2 +- bricks/gen/newcode/D FlipFlop 5 Bit.cs | 2 +- bricks/gen/newcode/D FlipFlop 6 Bit Down.cs | 2 +- bricks/gen/newcode/D FlipFlop 6 Bit Up.cs | 2 +- bricks/gen/newcode/D FlipFlop 6 Bit.cs | 2 +- bricks/gen/newcode/D FlipFlop 64 Bit Down.cs | 2 +- bricks/gen/newcode/D FlipFlop 64 Bit Up.cs | 2 +- bricks/gen/newcode/D FlipFlop 64 Bit.cs | 2 +- bricks/gen/newcode/D FlipFlop 7 Bit Down.cs | 2 +- bricks/gen/newcode/D FlipFlop 7 Bit Up.cs | 2 +- bricks/gen/newcode/D FlipFlop 7 Bit.cs | 2 +- bricks/gen/newcode/D FlipFlop 8 Bit Down.cs | 2 +- bricks/gen/newcode/D FlipFlop 8 Bit Up.cs | 2 +- bricks/gen/newcode/D FlipFlop 8 Bit.cs | 2 +- bricks/gen/newcode/D FlipFlop 9 Bit Down.cs | 2 +- bricks/gen/newcode/D FlipFlop 9 Bit Up.cs | 2 +- bricks/gen/newcode/D FlipFlop 9 Bit.cs | 2 +- bricks/gen/newcode/Demux 1 Bit Vertical.cs | 10 +- bricks/gen/newcode/Demux 1 Bit.cs | 10 +- bricks/gen/newcode/Demux 2 Bit Vertical.cs | 12 +- bricks/gen/newcode/Demux 2 Bit.cs | 12 +- bricks/gen/newcode/Demux 3 Bit Vertical.cs | 14 +- bricks/gen/newcode/Demux 3 Bit.cs | 14 +- bricks/gen/newcode/Demux 4 Bit Vertical.cs | 16 +-- bricks/gen/newcode/Demux 4 Bit.cs | 16 +-- bricks/gen/newcode/Demux 5 Bit Vertical.cs | 18 +-- bricks/gen/newcode/Demux 5 Bit.cs | 18 +-- bricks/gen/newcode/Demux 6 Bit Vertical.cs | 20 +-- bricks/gen/newcode/Demux 6 Bit.cs | 20 +-- bricks/gen/newcode/Enabler 1 Bit Down.cs | 4 +- bricks/gen/newcode/Enabler 1 Bit Up.cs | 4 +- bricks/gen/newcode/Enabler 1 Bit.cs | 4 +- bricks/gen/newcode/Enabler 10 Bit Down.cs | 22 ++-- bricks/gen/newcode/Enabler 10 Bit Up.cs | 22 ++-- bricks/gen/newcode/Enabler 10 Bit.cs | 22 ++-- bricks/gen/newcode/Enabler 11 Bit Down.cs | 24 ++-- bricks/gen/newcode/Enabler 11 Bit Up.cs | 24 ++-- bricks/gen/newcode/Enabler 11 Bit.cs | 24 ++-- bricks/gen/newcode/Enabler 12 Bit Down.cs | 26 ++-- bricks/gen/newcode/Enabler 12 Bit Up.cs | 26 ++-- bricks/gen/newcode/Enabler 12 Bit.cs | 26 ++-- bricks/gen/newcode/Enabler 13 Bit Down.cs | 28 ++-- bricks/gen/newcode/Enabler 13 Bit Up.cs | 28 ++-- bricks/gen/newcode/Enabler 13 Bit.cs | 28 ++-- bricks/gen/newcode/Enabler 14 Bit Down.cs | 30 ++--- bricks/gen/newcode/Enabler 14 Bit Up.cs | 30 ++--- bricks/gen/newcode/Enabler 14 Bit.cs | 30 ++--- bricks/gen/newcode/Enabler 15 Bit Down.cs | 32 ++--- bricks/gen/newcode/Enabler 15 Bit Up.cs | 32 ++--- bricks/gen/newcode/Enabler 15 Bit.cs | 32 ++--- bricks/gen/newcode/Enabler 16 Bit Down.cs | 34 ++--- bricks/gen/newcode/Enabler 16 Bit Up.cs | 34 ++--- bricks/gen/newcode/Enabler 16 Bit.cs | 34 ++--- bricks/gen/newcode/Enabler 2 Bit Down.cs | 6 +- bricks/gen/newcode/Enabler 2 Bit Up.cs | 6 +- bricks/gen/newcode/Enabler 2 Bit.cs | 6 +- bricks/gen/newcode/Enabler 24 Bit Down.cs | 50 +++---- bricks/gen/newcode/Enabler 24 Bit Up.cs | 50 +++---- bricks/gen/newcode/Enabler 24 Bit.cs | 50 +++---- bricks/gen/newcode/Enabler 3 Bit Down.cs | 8 +- bricks/gen/newcode/Enabler 3 Bit Up.cs | 8 +- bricks/gen/newcode/Enabler 3 Bit.cs | 8 +- bricks/gen/newcode/Enabler 32 Bit Down.cs | 66 +++++----- bricks/gen/newcode/Enabler 32 Bit Up.cs | 66 +++++----- bricks/gen/newcode/Enabler 32 Bit.cs | 66 +++++----- bricks/gen/newcode/Enabler 4 Bit Down.cs | 10 +- bricks/gen/newcode/Enabler 4 Bit Up.cs | 10 +- bricks/gen/newcode/Enabler 4 Bit.cs | 10 +- bricks/gen/newcode/Enabler 48 Bit Down.cs | 98 +++++++------- bricks/gen/newcode/Enabler 48 Bit Up.cs | 98 +++++++------- bricks/gen/newcode/Enabler 48 Bit.cs | 98 +++++++------- bricks/gen/newcode/Enabler 5 Bit Down.cs | 12 +- bricks/gen/newcode/Enabler 5 Bit Up.cs | 12 +- bricks/gen/newcode/Enabler 5 Bit.cs | 12 +- bricks/gen/newcode/Enabler 6 Bit Down.cs | 14 +- bricks/gen/newcode/Enabler 6 Bit Up.cs | 14 +- bricks/gen/newcode/Enabler 6 Bit.cs | 14 +- bricks/gen/newcode/Enabler 64 Bit Down.cs | 130 +++++++++---------- bricks/gen/newcode/Enabler 64 Bit Up.cs | 130 +++++++++---------- bricks/gen/newcode/Enabler 64 Bit.cs | 130 +++++++++---------- bricks/gen/newcode/Enabler 7 Bit Down.cs | 16 +-- bricks/gen/newcode/Enabler 7 Bit Up.cs | 16 +-- bricks/gen/newcode/Enabler 7 Bit.cs | 16 +-- bricks/gen/newcode/Enabler 8 Bit Down.cs | 18 +-- bricks/gen/newcode/Enabler 8 Bit Up.cs | 18 +-- bricks/gen/newcode/Enabler 8 Bit.cs | 18 +-- bricks/gen/newcode/Enabler 9 Bit Down.cs | 20 +-- bricks/gen/newcode/Enabler 9 Bit Up.cs | 20 +-- bricks/gen/newcode/Enabler 9 Bit.cs | 20 +-- bricks/gen/newcode/Mux 1 Bit Vertical.cs | 4 +- bricks/gen/newcode/Mux 1 Bit.cs | 4 +- bricks/gen/newcode/Mux 2 Bit Vertical.cs | 6 +- bricks/gen/newcode/Mux 2 Bit.cs | 6 +- bricks/gen/newcode/Mux 3 Bit Vertical.cs | 8 +- bricks/gen/newcode/Mux 3 Bit.cs | 8 +- bricks/gen/newcode/Mux 4 Bit Vertical.cs | 10 +- bricks/gen/newcode/Mux 4 Bit.cs | 10 +- bricks/gen/newcode/Mux 5 Bit Vertical.cs | 12 +- bricks/gen/newcode/Mux 5 Bit.cs | 12 +- bricks/gen/newcode/Mux 6 Bit Vertical.cs | 14 +- bricks/gen/newcode/Mux 6 Bit.cs | 14 +- bricks/gen/newcode/NAND 2 Bit Vertical.cs | 8 +- bricks/gen/newcode/NAND 2 Bit.cs | 8 +- bricks/gen/newcode/NAND 3 Bit Vertical.cs | 10 +- bricks/gen/newcode/NAND 3 Bit.cs | 10 +- bricks/gen/newcode/NAND 4 Bit Vertical.cs | 12 +- bricks/gen/newcode/NAND 4 Bit.cs | 12 +- bricks/gen/newcode/NAND 5 Bit Vertical.cs | 14 +- bricks/gen/newcode/NAND 5 Bit.cs | 14 +- bricks/gen/newcode/NAND 6 Bit Vertical.cs | 16 +-- bricks/gen/newcode/NAND 6 Bit.cs | 16 +-- bricks/gen/newcode/NAND 7 Bit Vertical.cs | 18 +-- bricks/gen/newcode/NAND 7 Bit.cs | 18 +-- bricks/gen/newcode/NAND 8 Bit Vertical.cs | 20 +-- bricks/gen/newcode/NAND 8 Bit.cs | 20 +-- bricks/gen/newcode/NOR 2 Bit Vertical.cs | 8 +- bricks/gen/newcode/NOR 2 Bit.cs | 8 +- bricks/gen/newcode/NOR 3 Bit Vertical.cs | 10 +- bricks/gen/newcode/NOR 3 Bit.cs | 10 +- bricks/gen/newcode/NOR 4 Bit Vertical.cs | 12 +- bricks/gen/newcode/NOR 4 Bit.cs | 12 +- bricks/gen/newcode/NOR 5 Bit Vertical.cs | 14 +- bricks/gen/newcode/NOR 5 Bit.cs | 14 +- bricks/gen/newcode/NOR 6 Bit Vertical.cs | 16 +-- bricks/gen/newcode/NOR 6 Bit.cs | 16 +-- bricks/gen/newcode/NOR 7 Bit Vertical.cs | 18 +-- bricks/gen/newcode/NOR 7 Bit.cs | 18 +-- bricks/gen/newcode/NOR 8 Bit Vertical.cs | 20 +-- bricks/gen/newcode/NOR 8 Bit.cs | 20 +-- bricks/gen/newcode/OR 2 Bit Vertical.cs | 8 +- bricks/gen/newcode/OR 2 Bit.cs | 8 +- bricks/gen/newcode/OR 3 Bit Vertical.cs | 10 +- bricks/gen/newcode/OR 3 Bit.cs | 10 +- bricks/gen/newcode/OR 4 Bit Vertical.cs | 12 +- bricks/gen/newcode/OR 4 Bit.cs | 12 +- bricks/gen/newcode/OR 5 Bit Vertical.cs | 14 +- bricks/gen/newcode/OR 5 Bit.cs | 14 +- bricks/gen/newcode/OR 6 Bit Vertical.cs | 16 +-- bricks/gen/newcode/OR 6 Bit.cs | 16 +-- bricks/gen/newcode/OR 7 Bit Vertical.cs | 18 +-- bricks/gen/newcode/OR 7 Bit.cs | 18 +-- bricks/gen/newcode/OR 8 Bit Vertical.cs | 20 +-- bricks/gen/newcode/OR 8 Bit.cs | 20 +-- bricks/gen/newcode/ROM 16x16.cs | 22 ++-- bricks/gen/newcode/ROM 16x8.cs | 20 +-- bricks/gen/newcode/ROM 32x16.cs | 24 ++-- bricks/gen/newcode/ROM 32x32.cs | 26 ++-- bricks/gen/newcode/ROM 4x4.cs | 14 +- bricks/gen/newcode/ROM 8x4.cs | 16 +-- bricks/gen/newcode/ROM 8x8.cs | 18 +-- bricks/gen/newcode/XNOR 2 Bit Vertical.cs | 6 +- bricks/gen/newcode/XNOR 2 Bit.cs | 6 +- bricks/gen/newcode/XNOR 3 Bit Vertical.cs | 8 +- bricks/gen/newcode/XNOR 3 Bit.cs | 8 +- bricks/gen/newcode/XNOR 4 Bit Vertical.cs | 10 +- bricks/gen/newcode/XNOR 4 Bit.cs | 10 +- bricks/gen/newcode/XNOR 5 Bit Vertical.cs | 12 +- bricks/gen/newcode/XNOR 5 Bit.cs | 12 +- bricks/gen/newcode/XNOR 6 Bit Vertical.cs | 14 +- bricks/gen/newcode/XNOR 6 Bit.cs | 14 +- bricks/gen/newcode/XNOR 7 Bit Vertical.cs | 16 +-- bricks/gen/newcode/XNOR 7 Bit.cs | 16 +-- bricks/gen/newcode/XNOR 8 Bit Vertical.cs | 18 +-- bricks/gen/newcode/XNOR 8 Bit.cs | 18 +-- bricks/gen/newcode/XOR 2 Bit Vertical.cs | 6 +- bricks/gen/newcode/XOR 2 Bit.cs | 6 +- bricks/gen/newcode/XOR 3 Bit Vertical.cs | 8 +- bricks/gen/newcode/XOR 3 Bit.cs | 8 +- bricks/gen/newcode/XOR 4 Bit Vertical.cs | 10 +- bricks/gen/newcode/XOR 4 Bit.cs | 10 +- bricks/gen/newcode/XOR 5 Bit Vertical.cs | 12 +- bricks/gen/newcode/XOR 5 Bit.cs | 12 +- bricks/gen/newcode/XOR 6 Bit Vertical.cs | 14 +- bricks/gen/newcode/XOR 6 Bit.cs | 14 +- bricks/gen/newcode/XOR 7 Bit Vertical.cs | 16 +-- bricks/gen/newcode/XOR 7 Bit.cs | 16 +-- bricks/gen/newcode/XOR 8 Bit Vertical.cs | 18 +-- bricks/gen/newcode/XOR 8 Bit.cs | 18 +-- bricks/inputs/keyboard-input.lua | 16 +-- bricks/inputs/keyboard-update.lua | 2 +- bricks/inputs/switch-input.lua | 4 +- bricks/math/8bitAdder.cs | 10 +- bricks/math/8bitDivider.cs | 12 +- bricks/math/8bitMultiplier.cs | 6 +- bricks/math/8bitSubtractor.cs | 10 +- bricks/math/FullAdder.cs | 6 +- bricks/math/HalfAdder.cs | 4 +- bricks/outputs/pixel3-update.lua | 2 +- bricks/special/EventGate-input.lua | 2 +- bricks/special/EventGate-update.lua | 2 +- 309 files changed, 2819 insertions(+), 2819 deletions(-) diff --git a/bricks/gates/NOT.cs b/bricks/gates/NOT.cs index 7c5189b..78a524b 100644 --- a/bricks/gates/NOT.cs +++ b/bricks/gates/NOT.cs @@ -12,7 +12,7 @@ datablock fxDTSBrickData(LogicGate_NOT_Data : LogicGate_Diode_Data) logicForceColor = "RED"; logicForcePrint = "ARROW"; - logicUpdate = "return function(gate) Gate.setportstate(gate, 2, not Gate.getportstate(gate, 1)) end"; + logicUpdate = "return function(gate) Gate.setportstate(gate, 2, 1-Gate.getportstate(gate, 1)) end"; numLogicPorts = 2; }; diff --git a/bricks/gates/verticalNOT.cs b/bricks/gates/verticalNOT.cs index 0821558..7d7cf33 100644 --- a/bricks/gates/verticalNOT.cs +++ b/bricks/gates/verticalNOT.cs @@ -12,7 +12,7 @@ datablock fxDTSBrickData(LogicGate_NotUp_Data : LogicGate_DiodeUp_Data) logicForceColor = "RED"; logicForcePrint = "UPARROW"; - logicUpdate = "return function(gate) Gate.setportstate(gate, 2, not Gate.getportstate(gate, 1)) end"; + logicUpdate = "return function(gate) Gate.setportstate(gate, 2, 1-Gate.getportstate(gate, 1)) end"; }; lualogic_registergatedefinition("LogicGate_NotUp_Data"); @@ -27,7 +27,7 @@ datablock fxDTSBrickData(LogicGate_NotDown_Data : LogicGate_DiodeDown_Data) logicForceColor = "RED"; logicForcePrint = "DOWNARROW"; - logicUpdate = "return function(gate) Gate.setportstate(gate, 2, not Gate.getportstate(gate, 1)) end"; + logicUpdate = "return function(gate) Gate.setportstate(gate, 2, 1-Gate.getportstate(gate, 1)) end"; }; lualogic_registergatedefinition("LogicGate_NotDown_Data"); diff --git a/bricks/gen/newcode/AND 2 Bit Vertical.cs b/bricks/gen/newcode/AND 2 Bit Vertical.cs index a445fd1..a7bb2e9 100644 --- a/bricks/gen/newcode/AND 2 Bit Vertical.cs +++ b/bricks/gen/newcode/AND 2 Bit Vertical.cs @@ -23,10 +23,10 @@ datablock fxDtsBrickData(LogicGate_GateAnd2Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 3, ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) " @ - " )) " @ + " Gate.setportstate(gate, 3, (( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/AND 2 Bit.cs b/bricks/gen/newcode/AND 2 Bit.cs index 50d1ab0..35f34fe 100644 --- a/bricks/gen/newcode/AND 2 Bit.cs +++ b/bricks/gen/newcode/AND 2 Bit.cs @@ -23,10 +23,10 @@ datablock fxDtsBrickData(LogicGate_GateAnd2_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 3, ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) " @ - " )) " @ + " Gate.setportstate(gate, 3, (( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/AND 3 Bit Vertical.cs b/bricks/gen/newcode/AND 3 Bit Vertical.cs index 3521382..91b1646 100644 --- a/bricks/gen/newcode/AND 3 Bit Vertical.cs +++ b/bricks/gen/newcode/AND 3 Bit Vertical.cs @@ -23,11 +23,11 @@ datablock fxDtsBrickData(LogicGate_GateAnd3Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 4, ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) " @ - " )) " @ + " Gate.setportstate(gate, 4, (( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/AND 3 Bit.cs b/bricks/gen/newcode/AND 3 Bit.cs index 71003d2..9acd38e 100644 --- a/bricks/gen/newcode/AND 3 Bit.cs +++ b/bricks/gen/newcode/AND 3 Bit.cs @@ -23,11 +23,11 @@ datablock fxDtsBrickData(LogicGate_GateAnd3_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 4, ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) " @ - " )) " @ + " Gate.setportstate(gate, 4, (( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/AND 4 Bit Vertical.cs b/bricks/gen/newcode/AND 4 Bit Vertical.cs index 88249e9..c2a7e86 100644 --- a/bricks/gen/newcode/AND 4 Bit Vertical.cs +++ b/bricks/gen/newcode/AND 4 Bit Vertical.cs @@ -23,12 +23,12 @@ datablock fxDtsBrickData(LogicGate_GateAnd4Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 5, ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) and " @ - " Gate.getportstate(gate, 4) " @ - " )) " @ + " Gate.setportstate(gate, 5, (( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) and " @ + " (Gate.getportstate(gate, 4)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/AND 4 Bit.cs b/bricks/gen/newcode/AND 4 Bit.cs index 98a6f0b..fda97c8 100644 --- a/bricks/gen/newcode/AND 4 Bit.cs +++ b/bricks/gen/newcode/AND 4 Bit.cs @@ -23,12 +23,12 @@ datablock fxDtsBrickData(LogicGate_GateAnd4_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 5, ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) and " @ - " Gate.getportstate(gate, 4) " @ - " )) " @ + " Gate.setportstate(gate, 5, (( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) and " @ + " (Gate.getportstate(gate, 4)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/AND 5 Bit Vertical.cs b/bricks/gen/newcode/AND 5 Bit Vertical.cs index 27860f2..c861ac7 100644 --- a/bricks/gen/newcode/AND 5 Bit Vertical.cs +++ b/bricks/gen/newcode/AND 5 Bit Vertical.cs @@ -23,13 +23,13 @@ datablock fxDtsBrickData(LogicGate_GateAnd5Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 6, ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) and " @ - " Gate.getportstate(gate, 4) and " @ - " Gate.getportstate(gate, 5) " @ - " )) " @ + " Gate.setportstate(gate, 6, (( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) and " @ + " (Gate.getportstate(gate, 4)~=0) and " @ + " (Gate.getportstate(gate, 5)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/AND 5 Bit.cs b/bricks/gen/newcode/AND 5 Bit.cs index 5da3435..7468080 100644 --- a/bricks/gen/newcode/AND 5 Bit.cs +++ b/bricks/gen/newcode/AND 5 Bit.cs @@ -23,13 +23,13 @@ datablock fxDtsBrickData(LogicGate_GateAnd5_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 6, ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) and " @ - " Gate.getportstate(gate, 4) and " @ - " Gate.getportstate(gate, 5) " @ - " )) " @ + " Gate.setportstate(gate, 6, (( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) and " @ + " (Gate.getportstate(gate, 4)~=0) and " @ + " (Gate.getportstate(gate, 5)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/AND 6 Bit Vertical.cs b/bricks/gen/newcode/AND 6 Bit Vertical.cs index 2a7a5ed..95e3c03 100644 --- a/bricks/gen/newcode/AND 6 Bit Vertical.cs +++ b/bricks/gen/newcode/AND 6 Bit Vertical.cs @@ -23,14 +23,14 @@ datablock fxDtsBrickData(LogicGate_GateAnd6Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 7, ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) and " @ - " Gate.getportstate(gate, 4) and " @ - " Gate.getportstate(gate, 5) and " @ - " Gate.getportstate(gate, 6) " @ - " )) " @ + " Gate.setportstate(gate, 7, (( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) and " @ + " (Gate.getportstate(gate, 4)~=0) and " @ + " (Gate.getportstate(gate, 5)~=0) and " @ + " (Gate.getportstate(gate, 6)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/AND 6 Bit.cs b/bricks/gen/newcode/AND 6 Bit.cs index a830b16..4fdf64e 100644 --- a/bricks/gen/newcode/AND 6 Bit.cs +++ b/bricks/gen/newcode/AND 6 Bit.cs @@ -23,14 +23,14 @@ datablock fxDtsBrickData(LogicGate_GateAnd6_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 7, ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) and " @ - " Gate.getportstate(gate, 4) and " @ - " Gate.getportstate(gate, 5) and " @ - " Gate.getportstate(gate, 6) " @ - " )) " @ + " Gate.setportstate(gate, 7, (( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) and " @ + " (Gate.getportstate(gate, 4)~=0) and " @ + " (Gate.getportstate(gate, 5)~=0) and " @ + " (Gate.getportstate(gate, 6)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/AND 7 Bit Vertical.cs b/bricks/gen/newcode/AND 7 Bit Vertical.cs index bae6499..7b762a9 100644 --- a/bricks/gen/newcode/AND 7 Bit Vertical.cs +++ b/bricks/gen/newcode/AND 7 Bit Vertical.cs @@ -23,15 +23,15 @@ datablock fxDtsBrickData(LogicGate_GateAnd7Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 8, ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) and " @ - " Gate.getportstate(gate, 4) and " @ - " Gate.getportstate(gate, 5) and " @ - " Gate.getportstate(gate, 6) and " @ - " Gate.getportstate(gate, 7) " @ - " )) " @ + " Gate.setportstate(gate, 8, (( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) and " @ + " (Gate.getportstate(gate, 4)~=0) and " @ + " (Gate.getportstate(gate, 5)~=0) and " @ + " (Gate.getportstate(gate, 6)~=0) and " @ + " (Gate.getportstate(gate, 7)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/AND 7 Bit.cs b/bricks/gen/newcode/AND 7 Bit.cs index 1970afe..50ddc87 100644 --- a/bricks/gen/newcode/AND 7 Bit.cs +++ b/bricks/gen/newcode/AND 7 Bit.cs @@ -23,15 +23,15 @@ datablock fxDtsBrickData(LogicGate_GateAnd7_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 8, ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) and " @ - " Gate.getportstate(gate, 4) and " @ - " Gate.getportstate(gate, 5) and " @ - " Gate.getportstate(gate, 6) and " @ - " Gate.getportstate(gate, 7) " @ - " )) " @ + " Gate.setportstate(gate, 8, (( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) and " @ + " (Gate.getportstate(gate, 4)~=0) and " @ + " (Gate.getportstate(gate, 5)~=0) and " @ + " (Gate.getportstate(gate, 6)~=0) and " @ + " (Gate.getportstate(gate, 7)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/AND 8 Bit Vertical.cs b/bricks/gen/newcode/AND 8 Bit Vertical.cs index 45a4519..43d20b6 100644 --- a/bricks/gen/newcode/AND 8 Bit Vertical.cs +++ b/bricks/gen/newcode/AND 8 Bit Vertical.cs @@ -23,16 +23,16 @@ datablock fxDtsBrickData(LogicGate_GateAnd8Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 9, ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) and " @ - " Gate.getportstate(gate, 4) and " @ - " Gate.getportstate(gate, 5) and " @ - " Gate.getportstate(gate, 6) and " @ - " Gate.getportstate(gate, 7) and " @ - " Gate.getportstate(gate, 8) " @ - " )) " @ + " Gate.setportstate(gate, 9, (( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) and " @ + " (Gate.getportstate(gate, 4)~=0) and " @ + " (Gate.getportstate(gate, 5)~=0) and " @ + " (Gate.getportstate(gate, 6)~=0) and " @ + " (Gate.getportstate(gate, 7)~=0) and " @ + " (Gate.getportstate(gate, 8)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/AND 8 Bit.cs b/bricks/gen/newcode/AND 8 Bit.cs index cb9e9e0..282a998 100644 --- a/bricks/gen/newcode/AND 8 Bit.cs +++ b/bricks/gen/newcode/AND 8 Bit.cs @@ -23,16 +23,16 @@ datablock fxDtsBrickData(LogicGate_GateAnd8_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 9, ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) and " @ - " Gate.getportstate(gate, 4) and " @ - " Gate.getportstate(gate, 5) and " @ - " Gate.getportstate(gate, 6) and " @ - " Gate.getportstate(gate, 7) and " @ - " Gate.getportstate(gate, 8) " @ - " )) " @ + " Gate.setportstate(gate, 9, (( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) and " @ + " (Gate.getportstate(gate, 4)~=0) and " @ + " (Gate.getportstate(gate, 5)~=0) and " @ + " (Gate.getportstate(gate, 6)~=0) and " @ + " (Gate.getportstate(gate, 7)~=0) and " @ + " (Gate.getportstate(gate, 8)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/Buffer 1 Bit Down.cs b/bricks/gen/newcode/Buffer 1 Bit Down.cs index 2732cf2..a39d13f 100644 --- a/bricks/gen/newcode/Buffer 1 Bit Down.cs +++ b/bricks/gen/newcode/Buffer 1 Bit Down.cs @@ -23,10 +23,10 @@ datablock fxDtsBrickData(LogicGate_Buffer1BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 3) then " @ + " if Gate.getportstate(gate, 3)~=0 then " @ " Gate.setportstate(gate, 2, Gate.getportstate(gate, 1)) " @ " else " @ - " Gate.setportstate(gate, 2, false) " @ + " Gate.setportstate(gate, 2, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 1 Bit Up.cs b/bricks/gen/newcode/Buffer 1 Bit Up.cs index eb0e3cb..342b900 100644 --- a/bricks/gen/newcode/Buffer 1 Bit Up.cs +++ b/bricks/gen/newcode/Buffer 1 Bit Up.cs @@ -23,10 +23,10 @@ datablock fxDtsBrickData(LogicGate_Buffer1BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 3) then " @ + " if Gate.getportstate(gate, 3)~=0 then " @ " Gate.setportstate(gate, 2, Gate.getportstate(gate, 1)) " @ " else " @ - " Gate.setportstate(gate, 2, false) " @ + " Gate.setportstate(gate, 2, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 1 Bit.cs b/bricks/gen/newcode/Buffer 1 Bit.cs index f3f68b5..d39250e 100644 --- a/bricks/gen/newcode/Buffer 1 Bit.cs +++ b/bricks/gen/newcode/Buffer 1 Bit.cs @@ -23,10 +23,10 @@ datablock fxDtsBrickData(LogicGate_Buffer1Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 3) then " @ + " if Gate.getportstate(gate, 3)~=0 then " @ " Gate.setportstate(gate, 2, Gate.getportstate(gate, 1)) " @ " else " @ - " Gate.setportstate(gate, 2, false) " @ + " Gate.setportstate(gate, 2, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 10 Bit Down.cs b/bricks/gen/newcode/Buffer 10 Bit Down.cs index 06c9b31..5135f5f 100644 --- a/bricks/gen/newcode/Buffer 10 Bit Down.cs +++ b/bricks/gen/newcode/Buffer 10 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer10BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 21) then " @ + " if Gate.getportstate(gate, 21)~=0 then " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 3)) " @ @@ -35,16 +35,16 @@ datablock fxDtsBrickData(LogicGate_Buffer10BitDown_Data){ " Gate.setportstate(gate, 19, Gate.getportstate(gate, 9)) " @ " Gate.setportstate(gate, 20, Gate.getportstate(gate, 10)) " @ " else " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 10 Bit Up.cs b/bricks/gen/newcode/Buffer 10 Bit Up.cs index 5b803f5..7401589 100644 --- a/bricks/gen/newcode/Buffer 10 Bit Up.cs +++ b/bricks/gen/newcode/Buffer 10 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer10BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 21) then " @ + " if Gate.getportstate(gate, 21)~=0 then " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 3)) " @ @@ -35,16 +35,16 @@ datablock fxDtsBrickData(LogicGate_Buffer10BitUp_Data){ " Gate.setportstate(gate, 19, Gate.getportstate(gate, 9)) " @ " Gate.setportstate(gate, 20, Gate.getportstate(gate, 10)) " @ " else " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 10 Bit.cs b/bricks/gen/newcode/Buffer 10 Bit.cs index cb7246c..e5e747a 100644 --- a/bricks/gen/newcode/Buffer 10 Bit.cs +++ b/bricks/gen/newcode/Buffer 10 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer10Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 21) then " @ + " if Gate.getportstate(gate, 21)~=0 then " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 3)) " @ @@ -35,16 +35,16 @@ datablock fxDtsBrickData(LogicGate_Buffer10Bit_Data){ " Gate.setportstate(gate, 19, Gate.getportstate(gate, 9)) " @ " Gate.setportstate(gate, 20, Gate.getportstate(gate, 10)) " @ " else " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 11 Bit Down.cs b/bricks/gen/newcode/Buffer 11 Bit Down.cs index 18ebf7d..d604636 100644 --- a/bricks/gen/newcode/Buffer 11 Bit Down.cs +++ b/bricks/gen/newcode/Buffer 11 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer11BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 23) then " @ + " if Gate.getportstate(gate, 23)~=0 then " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 3)) " @ @@ -36,17 +36,17 @@ datablock fxDtsBrickData(LogicGate_Buffer11BitDown_Data){ " Gate.setportstate(gate, 21, Gate.getportstate(gate, 10)) " @ " Gate.setportstate(gate, 22, Gate.getportstate(gate, 11)) " @ " else " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 11 Bit Up.cs b/bricks/gen/newcode/Buffer 11 Bit Up.cs index 4a3702c..161d604 100644 --- a/bricks/gen/newcode/Buffer 11 Bit Up.cs +++ b/bricks/gen/newcode/Buffer 11 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer11BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 23) then " @ + " if Gate.getportstate(gate, 23)~=0 then " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 3)) " @ @@ -36,17 +36,17 @@ datablock fxDtsBrickData(LogicGate_Buffer11BitUp_Data){ " Gate.setportstate(gate, 21, Gate.getportstate(gate, 10)) " @ " Gate.setportstate(gate, 22, Gate.getportstate(gate, 11)) " @ " else " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 11 Bit.cs b/bricks/gen/newcode/Buffer 11 Bit.cs index 57b873e..6773eee 100644 --- a/bricks/gen/newcode/Buffer 11 Bit.cs +++ b/bricks/gen/newcode/Buffer 11 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer11Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 23) then " @ + " if Gate.getportstate(gate, 23)~=0 then " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 3)) " @ @@ -36,17 +36,17 @@ datablock fxDtsBrickData(LogicGate_Buffer11Bit_Data){ " Gate.setportstate(gate, 21, Gate.getportstate(gate, 10)) " @ " Gate.setportstate(gate, 22, Gate.getportstate(gate, 11)) " @ " else " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 12 Bit Down.cs b/bricks/gen/newcode/Buffer 12 Bit Down.cs index b9002e6..597e6f5 100644 --- a/bricks/gen/newcode/Buffer 12 Bit Down.cs +++ b/bricks/gen/newcode/Buffer 12 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer12BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 25) then " @ + " if Gate.getportstate(gate, 25)~=0 then " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 3)) " @ @@ -37,18 +37,18 @@ datablock fxDtsBrickData(LogicGate_Buffer12BitDown_Data){ " Gate.setportstate(gate, 23, Gate.getportstate(gate, 11)) " @ " Gate.setportstate(gate, 24, Gate.getportstate(gate, 12)) " @ " else " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 12 Bit Up.cs b/bricks/gen/newcode/Buffer 12 Bit Up.cs index 81546f6..27300dc 100644 --- a/bricks/gen/newcode/Buffer 12 Bit Up.cs +++ b/bricks/gen/newcode/Buffer 12 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer12BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 25) then " @ + " if Gate.getportstate(gate, 25)~=0 then " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 3)) " @ @@ -37,18 +37,18 @@ datablock fxDtsBrickData(LogicGate_Buffer12BitUp_Data){ " Gate.setportstate(gate, 23, Gate.getportstate(gate, 11)) " @ " Gate.setportstate(gate, 24, Gate.getportstate(gate, 12)) " @ " else " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 12 Bit.cs b/bricks/gen/newcode/Buffer 12 Bit.cs index f9af060..7f6505d 100644 --- a/bricks/gen/newcode/Buffer 12 Bit.cs +++ b/bricks/gen/newcode/Buffer 12 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer12Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 25) then " @ + " if Gate.getportstate(gate, 25)~=0 then " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 3)) " @ @@ -37,18 +37,18 @@ datablock fxDtsBrickData(LogicGate_Buffer12Bit_Data){ " Gate.setportstate(gate, 23, Gate.getportstate(gate, 11)) " @ " Gate.setportstate(gate, 24, Gate.getportstate(gate, 12)) " @ " else " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 13 Bit Down.cs b/bricks/gen/newcode/Buffer 13 Bit Down.cs index 5a371ba..216c009 100644 --- a/bricks/gen/newcode/Buffer 13 Bit Down.cs +++ b/bricks/gen/newcode/Buffer 13 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer13BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 27) then " @ + " if Gate.getportstate(gate, 27)~=0 then " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 3)) " @ @@ -38,19 +38,19 @@ datablock fxDtsBrickData(LogicGate_Buffer13BitDown_Data){ " Gate.setportstate(gate, 25, Gate.getportstate(gate, 12)) " @ " Gate.setportstate(gate, 26, Gate.getportstate(gate, 13)) " @ " else " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 13 Bit Up.cs b/bricks/gen/newcode/Buffer 13 Bit Up.cs index dc36bbf..1e0467a 100644 --- a/bricks/gen/newcode/Buffer 13 Bit Up.cs +++ b/bricks/gen/newcode/Buffer 13 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer13BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 27) then " @ + " if Gate.getportstate(gate, 27)~=0 then " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 3)) " @ @@ -38,19 +38,19 @@ datablock fxDtsBrickData(LogicGate_Buffer13BitUp_Data){ " Gate.setportstate(gate, 25, Gate.getportstate(gate, 12)) " @ " Gate.setportstate(gate, 26, Gate.getportstate(gate, 13)) " @ " else " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 13 Bit.cs b/bricks/gen/newcode/Buffer 13 Bit.cs index 44b037a..e7870bb 100644 --- a/bricks/gen/newcode/Buffer 13 Bit.cs +++ b/bricks/gen/newcode/Buffer 13 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer13Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 27) then " @ + " if Gate.getportstate(gate, 27)~=0 then " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 3)) " @ @@ -38,19 +38,19 @@ datablock fxDtsBrickData(LogicGate_Buffer13Bit_Data){ " Gate.setportstate(gate, 25, Gate.getportstate(gate, 12)) " @ " Gate.setportstate(gate, 26, Gate.getportstate(gate, 13)) " @ " else " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 14 Bit Down.cs b/bricks/gen/newcode/Buffer 14 Bit Down.cs index d55daba..f9941f8 100644 --- a/bricks/gen/newcode/Buffer 14 Bit Down.cs +++ b/bricks/gen/newcode/Buffer 14 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer14BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 29) then " @ + " if Gate.getportstate(gate, 29)~=0 then " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 3)) " @ @@ -39,20 +39,20 @@ datablock fxDtsBrickData(LogicGate_Buffer14BitDown_Data){ " Gate.setportstate(gate, 27, Gate.getportstate(gate, 13)) " @ " Gate.setportstate(gate, 28, Gate.getportstate(gate, 14)) " @ " else " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 14 Bit Up.cs b/bricks/gen/newcode/Buffer 14 Bit Up.cs index 485ce75..2a66f0e 100644 --- a/bricks/gen/newcode/Buffer 14 Bit Up.cs +++ b/bricks/gen/newcode/Buffer 14 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer14BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 29) then " @ + " if Gate.getportstate(gate, 29)~=0 then " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 3)) " @ @@ -39,20 +39,20 @@ datablock fxDtsBrickData(LogicGate_Buffer14BitUp_Data){ " Gate.setportstate(gate, 27, Gate.getportstate(gate, 13)) " @ " Gate.setportstate(gate, 28, Gate.getportstate(gate, 14)) " @ " else " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 14 Bit.cs b/bricks/gen/newcode/Buffer 14 Bit.cs index c5ac092..301a006 100644 --- a/bricks/gen/newcode/Buffer 14 Bit.cs +++ b/bricks/gen/newcode/Buffer 14 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer14Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 29) then " @ + " if Gate.getportstate(gate, 29)~=0 then " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 3)) " @ @@ -39,20 +39,20 @@ datablock fxDtsBrickData(LogicGate_Buffer14Bit_Data){ " Gate.setportstate(gate, 27, Gate.getportstate(gate, 13)) " @ " Gate.setportstate(gate, 28, Gate.getportstate(gate, 14)) " @ " else " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 15 Bit Down.cs b/bricks/gen/newcode/Buffer 15 Bit Down.cs index 3914bcc..46887ef 100644 --- a/bricks/gen/newcode/Buffer 15 Bit Down.cs +++ b/bricks/gen/newcode/Buffer 15 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer15BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 31) then " @ + " if Gate.getportstate(gate, 31)~=0 then " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 3)) " @ @@ -40,21 +40,21 @@ datablock fxDtsBrickData(LogicGate_Buffer15BitDown_Data){ " Gate.setportstate(gate, 29, Gate.getportstate(gate, 14)) " @ " Gate.setportstate(gate, 30, Gate.getportstate(gate, 15)) " @ " else " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ - " Gate.setportstate(gate, 29, false) " @ - " Gate.setportstate(gate, 30, false) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ + " Gate.setportstate(gate, 29, 0) " @ + " Gate.setportstate(gate, 30, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 15 Bit Up.cs b/bricks/gen/newcode/Buffer 15 Bit Up.cs index 2bca8fb..9a8e9fd 100644 --- a/bricks/gen/newcode/Buffer 15 Bit Up.cs +++ b/bricks/gen/newcode/Buffer 15 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer15BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 31) then " @ + " if Gate.getportstate(gate, 31)~=0 then " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 3)) " @ @@ -40,21 +40,21 @@ datablock fxDtsBrickData(LogicGate_Buffer15BitUp_Data){ " Gate.setportstate(gate, 29, Gate.getportstate(gate, 14)) " @ " Gate.setportstate(gate, 30, Gate.getportstate(gate, 15)) " @ " else " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ - " Gate.setportstate(gate, 29, false) " @ - " Gate.setportstate(gate, 30, false) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ + " Gate.setportstate(gate, 29, 0) " @ + " Gate.setportstate(gate, 30, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 15 Bit.cs b/bricks/gen/newcode/Buffer 15 Bit.cs index 88ced71..011d619 100644 --- a/bricks/gen/newcode/Buffer 15 Bit.cs +++ b/bricks/gen/newcode/Buffer 15 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer15Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 31) then " @ + " if Gate.getportstate(gate, 31)~=0 then " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 3)) " @ @@ -40,21 +40,21 @@ datablock fxDtsBrickData(LogicGate_Buffer15Bit_Data){ " Gate.setportstate(gate, 29, Gate.getportstate(gate, 14)) " @ " Gate.setportstate(gate, 30, Gate.getportstate(gate, 15)) " @ " else " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ - " Gate.setportstate(gate, 29, false) " @ - " Gate.setportstate(gate, 30, false) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ + " Gate.setportstate(gate, 29, 0) " @ + " Gate.setportstate(gate, 30, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 16 Bit Down.cs b/bricks/gen/newcode/Buffer 16 Bit Down.cs index cc68ed3..f2998e7 100644 --- a/bricks/gen/newcode/Buffer 16 Bit Down.cs +++ b/bricks/gen/newcode/Buffer 16 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer16BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 33) then " @ + " if Gate.getportstate(gate, 33)~=0 then " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 19, Gate.getportstate(gate, 3)) " @ @@ -41,22 +41,22 @@ datablock fxDtsBrickData(LogicGate_Buffer16BitDown_Data){ " Gate.setportstate(gate, 31, Gate.getportstate(gate, 15)) " @ " Gate.setportstate(gate, 32, Gate.getportstate(gate, 16)) " @ " else " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ - " Gate.setportstate(gate, 29, false) " @ - " Gate.setportstate(gate, 30, false) " @ - " Gate.setportstate(gate, 31, false) " @ - " Gate.setportstate(gate, 32, false) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ + " Gate.setportstate(gate, 29, 0) " @ + " Gate.setportstate(gate, 30, 0) " @ + " Gate.setportstate(gate, 31, 0) " @ + " Gate.setportstate(gate, 32, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 16 Bit Up.cs b/bricks/gen/newcode/Buffer 16 Bit Up.cs index 9048a9a..5ba3349 100644 --- a/bricks/gen/newcode/Buffer 16 Bit Up.cs +++ b/bricks/gen/newcode/Buffer 16 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer16BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 33) then " @ + " if Gate.getportstate(gate, 33)~=0 then " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 19, Gate.getportstate(gate, 3)) " @ @@ -41,22 +41,22 @@ datablock fxDtsBrickData(LogicGate_Buffer16BitUp_Data){ " Gate.setportstate(gate, 31, Gate.getportstate(gate, 15)) " @ " Gate.setportstate(gate, 32, Gate.getportstate(gate, 16)) " @ " else " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ - " Gate.setportstate(gate, 29, false) " @ - " Gate.setportstate(gate, 30, false) " @ - " Gate.setportstate(gate, 31, false) " @ - " Gate.setportstate(gate, 32, false) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ + " Gate.setportstate(gate, 29, 0) " @ + " Gate.setportstate(gate, 30, 0) " @ + " Gate.setportstate(gate, 31, 0) " @ + " Gate.setportstate(gate, 32, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 16 Bit.cs b/bricks/gen/newcode/Buffer 16 Bit.cs index 6d0ff7b..8c36505 100644 --- a/bricks/gen/newcode/Buffer 16 Bit.cs +++ b/bricks/gen/newcode/Buffer 16 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer16Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 33) then " @ + " if Gate.getportstate(gate, 33)~=0 then " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 19, Gate.getportstate(gate, 3)) " @ @@ -41,22 +41,22 @@ datablock fxDtsBrickData(LogicGate_Buffer16Bit_Data){ " Gate.setportstate(gate, 31, Gate.getportstate(gate, 15)) " @ " Gate.setportstate(gate, 32, Gate.getportstate(gate, 16)) " @ " else " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ - " Gate.setportstate(gate, 29, false) " @ - " Gate.setportstate(gate, 30, false) " @ - " Gate.setportstate(gate, 31, false) " @ - " Gate.setportstate(gate, 32, false) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ + " Gate.setportstate(gate, 29, 0) " @ + " Gate.setportstate(gate, 30, 0) " @ + " Gate.setportstate(gate, 31, 0) " @ + " Gate.setportstate(gate, 32, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 2 Bit Down.cs b/bricks/gen/newcode/Buffer 2 Bit Down.cs index a591bdc..75589cb 100644 --- a/bricks/gen/newcode/Buffer 2 Bit Down.cs +++ b/bricks/gen/newcode/Buffer 2 Bit Down.cs @@ -23,12 +23,12 @@ datablock fxDtsBrickData(LogicGate_Buffer2BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 5) then " @ + " if Gate.getportstate(gate, 5)~=0 then " @ " Gate.setportstate(gate, 3, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 4, Gate.getportstate(gate, 2)) " @ " else " @ - " Gate.setportstate(gate, 3, false) " @ - " Gate.setportstate(gate, 4, false) " @ + " Gate.setportstate(gate, 3, 0) " @ + " Gate.setportstate(gate, 4, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 2 Bit Up.cs b/bricks/gen/newcode/Buffer 2 Bit Up.cs index 607dd8a..5469b5c 100644 --- a/bricks/gen/newcode/Buffer 2 Bit Up.cs +++ b/bricks/gen/newcode/Buffer 2 Bit Up.cs @@ -23,12 +23,12 @@ datablock fxDtsBrickData(LogicGate_Buffer2BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 5) then " @ + " if Gate.getportstate(gate, 5)~=0 then " @ " Gate.setportstate(gate, 3, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 4, Gate.getportstate(gate, 2)) " @ " else " @ - " Gate.setportstate(gate, 3, false) " @ - " Gate.setportstate(gate, 4, false) " @ + " Gate.setportstate(gate, 3, 0) " @ + " Gate.setportstate(gate, 4, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 2 Bit.cs b/bricks/gen/newcode/Buffer 2 Bit.cs index c3b43ec..73c4af9 100644 --- a/bricks/gen/newcode/Buffer 2 Bit.cs +++ b/bricks/gen/newcode/Buffer 2 Bit.cs @@ -23,12 +23,12 @@ datablock fxDtsBrickData(LogicGate_Buffer2Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 5) then " @ + " if Gate.getportstate(gate, 5)~=0 then " @ " Gate.setportstate(gate, 3, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 4, Gate.getportstate(gate, 2)) " @ " else " @ - " Gate.setportstate(gate, 3, false) " @ - " Gate.setportstate(gate, 4, false) " @ + " Gate.setportstate(gate, 3, 0) " @ + " Gate.setportstate(gate, 4, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 24 Bit Down.cs b/bricks/gen/newcode/Buffer 24 Bit Down.cs index 547d55d..1ca29c0 100644 --- a/bricks/gen/newcode/Buffer 24 Bit Down.cs +++ b/bricks/gen/newcode/Buffer 24 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer24BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 49) then " @ + " if Gate.getportstate(gate, 49)~=0 then " @ " Gate.setportstate(gate, 25, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 26, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 27, Gate.getportstate(gate, 3)) " @ @@ -49,30 +49,30 @@ datablock fxDtsBrickData(LogicGate_Buffer24BitDown_Data){ " Gate.setportstate(gate, 47, Gate.getportstate(gate, 23)) " @ " Gate.setportstate(gate, 48, Gate.getportstate(gate, 24)) " @ " else " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ - " Gate.setportstate(gate, 29, false) " @ - " Gate.setportstate(gate, 30, false) " @ - " Gate.setportstate(gate, 31, false) " @ - " Gate.setportstate(gate, 32, false) " @ - " Gate.setportstate(gate, 33, false) " @ - " Gate.setportstate(gate, 34, false) " @ - " Gate.setportstate(gate, 35, false) " @ - " Gate.setportstate(gate, 36, false) " @ - " Gate.setportstate(gate, 37, false) " @ - " Gate.setportstate(gate, 38, false) " @ - " Gate.setportstate(gate, 39, false) " @ - " Gate.setportstate(gate, 40, false) " @ - " Gate.setportstate(gate, 41, false) " @ - " Gate.setportstate(gate, 42, false) " @ - " Gate.setportstate(gate, 43, false) " @ - " Gate.setportstate(gate, 44, false) " @ - " Gate.setportstate(gate, 45, false) " @ - " Gate.setportstate(gate, 46, false) " @ - " Gate.setportstate(gate, 47, false) " @ - " Gate.setportstate(gate, 48, false) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ + " Gate.setportstate(gate, 29, 0) " @ + " Gate.setportstate(gate, 30, 0) " @ + " Gate.setportstate(gate, 31, 0) " @ + " Gate.setportstate(gate, 32, 0) " @ + " Gate.setportstate(gate, 33, 0) " @ + " Gate.setportstate(gate, 34, 0) " @ + " Gate.setportstate(gate, 35, 0) " @ + " Gate.setportstate(gate, 36, 0) " @ + " Gate.setportstate(gate, 37, 0) " @ + " Gate.setportstate(gate, 38, 0) " @ + " Gate.setportstate(gate, 39, 0) " @ + " Gate.setportstate(gate, 40, 0) " @ + " Gate.setportstate(gate, 41, 0) " @ + " Gate.setportstate(gate, 42, 0) " @ + " Gate.setportstate(gate, 43, 0) " @ + " Gate.setportstate(gate, 44, 0) " @ + " Gate.setportstate(gate, 45, 0) " @ + " Gate.setportstate(gate, 46, 0) " @ + " Gate.setportstate(gate, 47, 0) " @ + " Gate.setportstate(gate, 48, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 24 Bit Up.cs b/bricks/gen/newcode/Buffer 24 Bit Up.cs index 79e563e..f87ed23 100644 --- a/bricks/gen/newcode/Buffer 24 Bit Up.cs +++ b/bricks/gen/newcode/Buffer 24 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer24BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 49) then " @ + " if Gate.getportstate(gate, 49)~=0 then " @ " Gate.setportstate(gate, 25, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 26, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 27, Gate.getportstate(gate, 3)) " @ @@ -49,30 +49,30 @@ datablock fxDtsBrickData(LogicGate_Buffer24BitUp_Data){ " Gate.setportstate(gate, 47, Gate.getportstate(gate, 23)) " @ " Gate.setportstate(gate, 48, Gate.getportstate(gate, 24)) " @ " else " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ - " Gate.setportstate(gate, 29, false) " @ - " Gate.setportstate(gate, 30, false) " @ - " Gate.setportstate(gate, 31, false) " @ - " Gate.setportstate(gate, 32, false) " @ - " Gate.setportstate(gate, 33, false) " @ - " Gate.setportstate(gate, 34, false) " @ - " Gate.setportstate(gate, 35, false) " @ - " Gate.setportstate(gate, 36, false) " @ - " Gate.setportstate(gate, 37, false) " @ - " Gate.setportstate(gate, 38, false) " @ - " Gate.setportstate(gate, 39, false) " @ - " Gate.setportstate(gate, 40, false) " @ - " Gate.setportstate(gate, 41, false) " @ - " Gate.setportstate(gate, 42, false) " @ - " Gate.setportstate(gate, 43, false) " @ - " Gate.setportstate(gate, 44, false) " @ - " Gate.setportstate(gate, 45, false) " @ - " Gate.setportstate(gate, 46, false) " @ - " Gate.setportstate(gate, 47, false) " @ - " Gate.setportstate(gate, 48, false) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ + " Gate.setportstate(gate, 29, 0) " @ + " Gate.setportstate(gate, 30, 0) " @ + " Gate.setportstate(gate, 31, 0) " @ + " Gate.setportstate(gate, 32, 0) " @ + " Gate.setportstate(gate, 33, 0) " @ + " Gate.setportstate(gate, 34, 0) " @ + " Gate.setportstate(gate, 35, 0) " @ + " Gate.setportstate(gate, 36, 0) " @ + " Gate.setportstate(gate, 37, 0) " @ + " Gate.setportstate(gate, 38, 0) " @ + " Gate.setportstate(gate, 39, 0) " @ + " Gate.setportstate(gate, 40, 0) " @ + " Gate.setportstate(gate, 41, 0) " @ + " Gate.setportstate(gate, 42, 0) " @ + " Gate.setportstate(gate, 43, 0) " @ + " Gate.setportstate(gate, 44, 0) " @ + " Gate.setportstate(gate, 45, 0) " @ + " Gate.setportstate(gate, 46, 0) " @ + " Gate.setportstate(gate, 47, 0) " @ + " Gate.setportstate(gate, 48, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 24 Bit.cs b/bricks/gen/newcode/Buffer 24 Bit.cs index 24ce070..eedd137 100644 --- a/bricks/gen/newcode/Buffer 24 Bit.cs +++ b/bricks/gen/newcode/Buffer 24 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer24Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 49) then " @ + " if Gate.getportstate(gate, 49)~=0 then " @ " Gate.setportstate(gate, 25, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 26, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 27, Gate.getportstate(gate, 3)) " @ @@ -49,30 +49,30 @@ datablock fxDtsBrickData(LogicGate_Buffer24Bit_Data){ " Gate.setportstate(gate, 47, Gate.getportstate(gate, 23)) " @ " Gate.setportstate(gate, 48, Gate.getportstate(gate, 24)) " @ " else " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ - " Gate.setportstate(gate, 29, false) " @ - " Gate.setportstate(gate, 30, false) " @ - " Gate.setportstate(gate, 31, false) " @ - " Gate.setportstate(gate, 32, false) " @ - " Gate.setportstate(gate, 33, false) " @ - " Gate.setportstate(gate, 34, false) " @ - " Gate.setportstate(gate, 35, false) " @ - " Gate.setportstate(gate, 36, false) " @ - " Gate.setportstate(gate, 37, false) " @ - " Gate.setportstate(gate, 38, false) " @ - " Gate.setportstate(gate, 39, false) " @ - " Gate.setportstate(gate, 40, false) " @ - " Gate.setportstate(gate, 41, false) " @ - " Gate.setportstate(gate, 42, false) " @ - " Gate.setportstate(gate, 43, false) " @ - " Gate.setportstate(gate, 44, false) " @ - " Gate.setportstate(gate, 45, false) " @ - " Gate.setportstate(gate, 46, false) " @ - " Gate.setportstate(gate, 47, false) " @ - " Gate.setportstate(gate, 48, false) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ + " Gate.setportstate(gate, 29, 0) " @ + " Gate.setportstate(gate, 30, 0) " @ + " Gate.setportstate(gate, 31, 0) " @ + " Gate.setportstate(gate, 32, 0) " @ + " Gate.setportstate(gate, 33, 0) " @ + " Gate.setportstate(gate, 34, 0) " @ + " Gate.setportstate(gate, 35, 0) " @ + " Gate.setportstate(gate, 36, 0) " @ + " Gate.setportstate(gate, 37, 0) " @ + " Gate.setportstate(gate, 38, 0) " @ + " Gate.setportstate(gate, 39, 0) " @ + " Gate.setportstate(gate, 40, 0) " @ + " Gate.setportstate(gate, 41, 0) " @ + " Gate.setportstate(gate, 42, 0) " @ + " Gate.setportstate(gate, 43, 0) " @ + " Gate.setportstate(gate, 44, 0) " @ + " Gate.setportstate(gate, 45, 0) " @ + " Gate.setportstate(gate, 46, 0) " @ + " Gate.setportstate(gate, 47, 0) " @ + " Gate.setportstate(gate, 48, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 3 Bit Down.cs b/bricks/gen/newcode/Buffer 3 Bit Down.cs index 9a2d347..b984c9d 100644 --- a/bricks/gen/newcode/Buffer 3 Bit Down.cs +++ b/bricks/gen/newcode/Buffer 3 Bit Down.cs @@ -23,14 +23,14 @@ datablock fxDtsBrickData(LogicGate_Buffer3BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 7) then " @ + " if Gate.getportstate(gate, 7)~=0 then " @ " Gate.setportstate(gate, 4, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 5, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 3)) " @ " else " @ - " Gate.setportstate(gate, 4, false) " @ - " Gate.setportstate(gate, 5, false) " @ - " Gate.setportstate(gate, 6, false) " @ + " Gate.setportstate(gate, 4, 0) " @ + " Gate.setportstate(gate, 5, 0) " @ + " Gate.setportstate(gate, 6, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 3 Bit Up.cs b/bricks/gen/newcode/Buffer 3 Bit Up.cs index 2b6d349..bf60943 100644 --- a/bricks/gen/newcode/Buffer 3 Bit Up.cs +++ b/bricks/gen/newcode/Buffer 3 Bit Up.cs @@ -23,14 +23,14 @@ datablock fxDtsBrickData(LogicGate_Buffer3BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 7) then " @ + " if Gate.getportstate(gate, 7)~=0 then " @ " Gate.setportstate(gate, 4, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 5, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 3)) " @ " else " @ - " Gate.setportstate(gate, 4, false) " @ - " Gate.setportstate(gate, 5, false) " @ - " Gate.setportstate(gate, 6, false) " @ + " Gate.setportstate(gate, 4, 0) " @ + " Gate.setportstate(gate, 5, 0) " @ + " Gate.setportstate(gate, 6, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 3 Bit.cs b/bricks/gen/newcode/Buffer 3 Bit.cs index 6dbddaa..799dfb9 100644 --- a/bricks/gen/newcode/Buffer 3 Bit.cs +++ b/bricks/gen/newcode/Buffer 3 Bit.cs @@ -23,14 +23,14 @@ datablock fxDtsBrickData(LogicGate_Buffer3Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 7) then " @ + " if Gate.getportstate(gate, 7)~=0 then " @ " Gate.setportstate(gate, 4, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 5, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 3)) " @ " else " @ - " Gate.setportstate(gate, 4, false) " @ - " Gate.setportstate(gate, 5, false) " @ - " Gate.setportstate(gate, 6, false) " @ + " Gate.setportstate(gate, 4, 0) " @ + " Gate.setportstate(gate, 5, 0) " @ + " Gate.setportstate(gate, 6, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 32 Bit Down.cs b/bricks/gen/newcode/Buffer 32 Bit Down.cs index 09c120f..efec7af 100644 --- a/bricks/gen/newcode/Buffer 32 Bit Down.cs +++ b/bricks/gen/newcode/Buffer 32 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer32BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 65) then " @ + " if Gate.getportstate(gate, 65)~=0 then " @ " Gate.setportstate(gate, 33, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 34, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 35, Gate.getportstate(gate, 3)) " @ @@ -57,38 +57,38 @@ datablock fxDtsBrickData(LogicGate_Buffer32BitDown_Data){ " Gate.setportstate(gate, 63, Gate.getportstate(gate, 31)) " @ " Gate.setportstate(gate, 64, Gate.getportstate(gate, 32)) " @ " else " @ - " Gate.setportstate(gate, 33, false) " @ - " Gate.setportstate(gate, 34, false) " @ - " Gate.setportstate(gate, 35, false) " @ - " Gate.setportstate(gate, 36, false) " @ - " Gate.setportstate(gate, 37, false) " @ - " Gate.setportstate(gate, 38, false) " @ - " Gate.setportstate(gate, 39, false) " @ - " Gate.setportstate(gate, 40, false) " @ - " Gate.setportstate(gate, 41, false) " @ - " Gate.setportstate(gate, 42, false) " @ - " Gate.setportstate(gate, 43, false) " @ - " Gate.setportstate(gate, 44, false) " @ - " Gate.setportstate(gate, 45, false) " @ - " Gate.setportstate(gate, 46, false) " @ - " Gate.setportstate(gate, 47, false) " @ - " Gate.setportstate(gate, 48, false) " @ - " Gate.setportstate(gate, 49, false) " @ - " Gate.setportstate(gate, 50, false) " @ - " Gate.setportstate(gate, 51, false) " @ - " Gate.setportstate(gate, 52, false) " @ - " Gate.setportstate(gate, 53, false) " @ - " Gate.setportstate(gate, 54, false) " @ - " Gate.setportstate(gate, 55, false) " @ - " Gate.setportstate(gate, 56, false) " @ - " Gate.setportstate(gate, 57, false) " @ - " Gate.setportstate(gate, 58, false) " @ - " Gate.setportstate(gate, 59, false) " @ - " Gate.setportstate(gate, 60, false) " @ - " Gate.setportstate(gate, 61, false) " @ - " Gate.setportstate(gate, 62, false) " @ - " Gate.setportstate(gate, 63, false) " @ - " Gate.setportstate(gate, 64, false) " @ + " Gate.setportstate(gate, 33, 0) " @ + " Gate.setportstate(gate, 34, 0) " @ + " Gate.setportstate(gate, 35, 0) " @ + " Gate.setportstate(gate, 36, 0) " @ + " Gate.setportstate(gate, 37, 0) " @ + " Gate.setportstate(gate, 38, 0) " @ + " Gate.setportstate(gate, 39, 0) " @ + " Gate.setportstate(gate, 40, 0) " @ + " Gate.setportstate(gate, 41, 0) " @ + " Gate.setportstate(gate, 42, 0) " @ + " Gate.setportstate(gate, 43, 0) " @ + " Gate.setportstate(gate, 44, 0) " @ + " Gate.setportstate(gate, 45, 0) " @ + " Gate.setportstate(gate, 46, 0) " @ + " Gate.setportstate(gate, 47, 0) " @ + " Gate.setportstate(gate, 48, 0) " @ + " Gate.setportstate(gate, 49, 0) " @ + " Gate.setportstate(gate, 50, 0) " @ + " Gate.setportstate(gate, 51, 0) " @ + " Gate.setportstate(gate, 52, 0) " @ + " Gate.setportstate(gate, 53, 0) " @ + " Gate.setportstate(gate, 54, 0) " @ + " Gate.setportstate(gate, 55, 0) " @ + " Gate.setportstate(gate, 56, 0) " @ + " Gate.setportstate(gate, 57, 0) " @ + " Gate.setportstate(gate, 58, 0) " @ + " Gate.setportstate(gate, 59, 0) " @ + " Gate.setportstate(gate, 60, 0) " @ + " Gate.setportstate(gate, 61, 0) " @ + " Gate.setportstate(gate, 62, 0) " @ + " Gate.setportstate(gate, 63, 0) " @ + " Gate.setportstate(gate, 64, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 32 Bit Up.cs b/bricks/gen/newcode/Buffer 32 Bit Up.cs index 3ab07fc..6adba1b 100644 --- a/bricks/gen/newcode/Buffer 32 Bit Up.cs +++ b/bricks/gen/newcode/Buffer 32 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer32BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 65) then " @ + " if Gate.getportstate(gate, 65)~=0 then " @ " Gate.setportstate(gate, 33, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 34, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 35, Gate.getportstate(gate, 3)) " @ @@ -57,38 +57,38 @@ datablock fxDtsBrickData(LogicGate_Buffer32BitUp_Data){ " Gate.setportstate(gate, 63, Gate.getportstate(gate, 31)) " @ " Gate.setportstate(gate, 64, Gate.getportstate(gate, 32)) " @ " else " @ - " Gate.setportstate(gate, 33, false) " @ - " Gate.setportstate(gate, 34, false) " @ - " Gate.setportstate(gate, 35, false) " @ - " Gate.setportstate(gate, 36, false) " @ - " Gate.setportstate(gate, 37, false) " @ - " Gate.setportstate(gate, 38, false) " @ - " Gate.setportstate(gate, 39, false) " @ - " Gate.setportstate(gate, 40, false) " @ - " Gate.setportstate(gate, 41, false) " @ - " Gate.setportstate(gate, 42, false) " @ - " Gate.setportstate(gate, 43, false) " @ - " Gate.setportstate(gate, 44, false) " @ - " Gate.setportstate(gate, 45, false) " @ - " Gate.setportstate(gate, 46, false) " @ - " Gate.setportstate(gate, 47, false) " @ - " Gate.setportstate(gate, 48, false) " @ - " Gate.setportstate(gate, 49, false) " @ - " Gate.setportstate(gate, 50, false) " @ - " Gate.setportstate(gate, 51, false) " @ - " Gate.setportstate(gate, 52, false) " @ - " Gate.setportstate(gate, 53, false) " @ - " Gate.setportstate(gate, 54, false) " @ - " Gate.setportstate(gate, 55, false) " @ - " Gate.setportstate(gate, 56, false) " @ - " Gate.setportstate(gate, 57, false) " @ - " Gate.setportstate(gate, 58, false) " @ - " Gate.setportstate(gate, 59, false) " @ - " Gate.setportstate(gate, 60, false) " @ - " Gate.setportstate(gate, 61, false) " @ - " Gate.setportstate(gate, 62, false) " @ - " Gate.setportstate(gate, 63, false) " @ - " Gate.setportstate(gate, 64, false) " @ + " Gate.setportstate(gate, 33, 0) " @ + " Gate.setportstate(gate, 34, 0) " @ + " Gate.setportstate(gate, 35, 0) " @ + " Gate.setportstate(gate, 36, 0) " @ + " Gate.setportstate(gate, 37, 0) " @ + " Gate.setportstate(gate, 38, 0) " @ + " Gate.setportstate(gate, 39, 0) " @ + " Gate.setportstate(gate, 40, 0) " @ + " Gate.setportstate(gate, 41, 0) " @ + " Gate.setportstate(gate, 42, 0) " @ + " Gate.setportstate(gate, 43, 0) " @ + " Gate.setportstate(gate, 44, 0) " @ + " Gate.setportstate(gate, 45, 0) " @ + " Gate.setportstate(gate, 46, 0) " @ + " Gate.setportstate(gate, 47, 0) " @ + " Gate.setportstate(gate, 48, 0) " @ + " Gate.setportstate(gate, 49, 0) " @ + " Gate.setportstate(gate, 50, 0) " @ + " Gate.setportstate(gate, 51, 0) " @ + " Gate.setportstate(gate, 52, 0) " @ + " Gate.setportstate(gate, 53, 0) " @ + " Gate.setportstate(gate, 54, 0) " @ + " Gate.setportstate(gate, 55, 0) " @ + " Gate.setportstate(gate, 56, 0) " @ + " Gate.setportstate(gate, 57, 0) " @ + " Gate.setportstate(gate, 58, 0) " @ + " Gate.setportstate(gate, 59, 0) " @ + " Gate.setportstate(gate, 60, 0) " @ + " Gate.setportstate(gate, 61, 0) " @ + " Gate.setportstate(gate, 62, 0) " @ + " Gate.setportstate(gate, 63, 0) " @ + " Gate.setportstate(gate, 64, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 32 Bit.cs b/bricks/gen/newcode/Buffer 32 Bit.cs index f509cb7..d98fd70 100644 --- a/bricks/gen/newcode/Buffer 32 Bit.cs +++ b/bricks/gen/newcode/Buffer 32 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer32Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 65) then " @ + " if Gate.getportstate(gate, 65)~=0 then " @ " Gate.setportstate(gate, 33, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 34, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 35, Gate.getportstate(gate, 3)) " @ @@ -57,38 +57,38 @@ datablock fxDtsBrickData(LogicGate_Buffer32Bit_Data){ " Gate.setportstate(gate, 63, Gate.getportstate(gate, 31)) " @ " Gate.setportstate(gate, 64, Gate.getportstate(gate, 32)) " @ " else " @ - " Gate.setportstate(gate, 33, false) " @ - " Gate.setportstate(gate, 34, false) " @ - " Gate.setportstate(gate, 35, false) " @ - " Gate.setportstate(gate, 36, false) " @ - " Gate.setportstate(gate, 37, false) " @ - " Gate.setportstate(gate, 38, false) " @ - " Gate.setportstate(gate, 39, false) " @ - " Gate.setportstate(gate, 40, false) " @ - " Gate.setportstate(gate, 41, false) " @ - " Gate.setportstate(gate, 42, false) " @ - " Gate.setportstate(gate, 43, false) " @ - " Gate.setportstate(gate, 44, false) " @ - " Gate.setportstate(gate, 45, false) " @ - " Gate.setportstate(gate, 46, false) " @ - " Gate.setportstate(gate, 47, false) " @ - " Gate.setportstate(gate, 48, false) " @ - " Gate.setportstate(gate, 49, false) " @ - " Gate.setportstate(gate, 50, false) " @ - " Gate.setportstate(gate, 51, false) " @ - " Gate.setportstate(gate, 52, false) " @ - " Gate.setportstate(gate, 53, false) " @ - " Gate.setportstate(gate, 54, false) " @ - " Gate.setportstate(gate, 55, false) " @ - " Gate.setportstate(gate, 56, false) " @ - " Gate.setportstate(gate, 57, false) " @ - " Gate.setportstate(gate, 58, false) " @ - " Gate.setportstate(gate, 59, false) " @ - " Gate.setportstate(gate, 60, false) " @ - " Gate.setportstate(gate, 61, false) " @ - " Gate.setportstate(gate, 62, false) " @ - " Gate.setportstate(gate, 63, false) " @ - " Gate.setportstate(gate, 64, false) " @ + " Gate.setportstate(gate, 33, 0) " @ + " Gate.setportstate(gate, 34, 0) " @ + " Gate.setportstate(gate, 35, 0) " @ + " Gate.setportstate(gate, 36, 0) " @ + " Gate.setportstate(gate, 37, 0) " @ + " Gate.setportstate(gate, 38, 0) " @ + " Gate.setportstate(gate, 39, 0) " @ + " Gate.setportstate(gate, 40, 0) " @ + " Gate.setportstate(gate, 41, 0) " @ + " Gate.setportstate(gate, 42, 0) " @ + " Gate.setportstate(gate, 43, 0) " @ + " Gate.setportstate(gate, 44, 0) " @ + " Gate.setportstate(gate, 45, 0) " @ + " Gate.setportstate(gate, 46, 0) " @ + " Gate.setportstate(gate, 47, 0) " @ + " Gate.setportstate(gate, 48, 0) " @ + " Gate.setportstate(gate, 49, 0) " @ + " Gate.setportstate(gate, 50, 0) " @ + " Gate.setportstate(gate, 51, 0) " @ + " Gate.setportstate(gate, 52, 0) " @ + " Gate.setportstate(gate, 53, 0) " @ + " Gate.setportstate(gate, 54, 0) " @ + " Gate.setportstate(gate, 55, 0) " @ + " Gate.setportstate(gate, 56, 0) " @ + " Gate.setportstate(gate, 57, 0) " @ + " Gate.setportstate(gate, 58, 0) " @ + " Gate.setportstate(gate, 59, 0) " @ + " Gate.setportstate(gate, 60, 0) " @ + " Gate.setportstate(gate, 61, 0) " @ + " Gate.setportstate(gate, 62, 0) " @ + " Gate.setportstate(gate, 63, 0) " @ + " Gate.setportstate(gate, 64, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 4 Bit Down.cs b/bricks/gen/newcode/Buffer 4 Bit Down.cs index da43705..3670d31 100644 --- a/bricks/gen/newcode/Buffer 4 Bit Down.cs +++ b/bricks/gen/newcode/Buffer 4 Bit Down.cs @@ -23,16 +23,16 @@ datablock fxDtsBrickData(LogicGate_Buffer4BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 9) then " @ + " if Gate.getportstate(gate, 9)~=0 then " @ " Gate.setportstate(gate, 5, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 3)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 4)) " @ " else " @ - " Gate.setportstate(gate, 5, false) " @ - " Gate.setportstate(gate, 6, false) " @ - " Gate.setportstate(gate, 7, false) " @ - " Gate.setportstate(gate, 8, false) " @ + " Gate.setportstate(gate, 5, 0) " @ + " Gate.setportstate(gate, 6, 0) " @ + " Gate.setportstate(gate, 7, 0) " @ + " Gate.setportstate(gate, 8, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 4 Bit Up.cs b/bricks/gen/newcode/Buffer 4 Bit Up.cs index 56d8b3e..3236d86 100644 --- a/bricks/gen/newcode/Buffer 4 Bit Up.cs +++ b/bricks/gen/newcode/Buffer 4 Bit Up.cs @@ -23,16 +23,16 @@ datablock fxDtsBrickData(LogicGate_Buffer4BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 9) then " @ + " if Gate.getportstate(gate, 9)~=0 then " @ " Gate.setportstate(gate, 5, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 3)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 4)) " @ " else " @ - " Gate.setportstate(gate, 5, false) " @ - " Gate.setportstate(gate, 6, false) " @ - " Gate.setportstate(gate, 7, false) " @ - " Gate.setportstate(gate, 8, false) " @ + " Gate.setportstate(gate, 5, 0) " @ + " Gate.setportstate(gate, 6, 0) " @ + " Gate.setportstate(gate, 7, 0) " @ + " Gate.setportstate(gate, 8, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 4 Bit.cs b/bricks/gen/newcode/Buffer 4 Bit.cs index aba88a1..7d9489e 100644 --- a/bricks/gen/newcode/Buffer 4 Bit.cs +++ b/bricks/gen/newcode/Buffer 4 Bit.cs @@ -23,16 +23,16 @@ datablock fxDtsBrickData(LogicGate_Buffer4Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 9) then " @ + " if Gate.getportstate(gate, 9)~=0 then " @ " Gate.setportstate(gate, 5, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 3)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 4)) " @ " else " @ - " Gate.setportstate(gate, 5, false) " @ - " Gate.setportstate(gate, 6, false) " @ - " Gate.setportstate(gate, 7, false) " @ - " Gate.setportstate(gate, 8, false) " @ + " Gate.setportstate(gate, 5, 0) " @ + " Gate.setportstate(gate, 6, 0) " @ + " Gate.setportstate(gate, 7, 0) " @ + " Gate.setportstate(gate, 8, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 48 Bit Down.cs b/bricks/gen/newcode/Buffer 48 Bit Down.cs index 490cbcc..31d75c8 100644 --- a/bricks/gen/newcode/Buffer 48 Bit Down.cs +++ b/bricks/gen/newcode/Buffer 48 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer48BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 97) then " @ + " if Gate.getportstate(gate, 97)~=0 then " @ " Gate.setportstate(gate, 49, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 50, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 51, Gate.getportstate(gate, 3)) " @ @@ -73,54 +73,54 @@ datablock fxDtsBrickData(LogicGate_Buffer48BitDown_Data){ " Gate.setportstate(gate, 95, Gate.getportstate(gate, 47)) " @ " Gate.setportstate(gate, 96, Gate.getportstate(gate, 48)) " @ " else " @ - " Gate.setportstate(gate, 49, false) " @ - " Gate.setportstate(gate, 50, false) " @ - " Gate.setportstate(gate, 51, false) " @ - " Gate.setportstate(gate, 52, false) " @ - " Gate.setportstate(gate, 53, false) " @ - " Gate.setportstate(gate, 54, false) " @ - " Gate.setportstate(gate, 55, false) " @ - " Gate.setportstate(gate, 56, false) " @ - " Gate.setportstate(gate, 57, false) " @ - " Gate.setportstate(gate, 58, false) " @ - " Gate.setportstate(gate, 59, false) " @ - " Gate.setportstate(gate, 60, false) " @ - " Gate.setportstate(gate, 61, false) " @ - " Gate.setportstate(gate, 62, false) " @ - " Gate.setportstate(gate, 63, false) " @ - " Gate.setportstate(gate, 64, false) " @ - " Gate.setportstate(gate, 65, false) " @ - " Gate.setportstate(gate, 66, false) " @ - " Gate.setportstate(gate, 67, false) " @ - " Gate.setportstate(gate, 68, false) " @ - " Gate.setportstate(gate, 69, false) " @ - " Gate.setportstate(gate, 70, false) " @ - " Gate.setportstate(gate, 71, false) " @ - " Gate.setportstate(gate, 72, false) " @ - " Gate.setportstate(gate, 73, false) " @ - " Gate.setportstate(gate, 74, false) " @ - " Gate.setportstate(gate, 75, false) " @ - " Gate.setportstate(gate, 76, false) " @ - " Gate.setportstate(gate, 77, false) " @ - " Gate.setportstate(gate, 78, false) " @ - " Gate.setportstate(gate, 79, false) " @ - " Gate.setportstate(gate, 80, false) " @ - " Gate.setportstate(gate, 81, false) " @ - " Gate.setportstate(gate, 82, false) " @ - " Gate.setportstate(gate, 83, false) " @ - " Gate.setportstate(gate, 84, false) " @ - " Gate.setportstate(gate, 85, false) " @ - " Gate.setportstate(gate, 86, false) " @ - " Gate.setportstate(gate, 87, false) " @ - " Gate.setportstate(gate, 88, false) " @ - " Gate.setportstate(gate, 89, false) " @ - " Gate.setportstate(gate, 90, false) " @ - " Gate.setportstate(gate, 91, false) " @ - " Gate.setportstate(gate, 92, false) " @ - " Gate.setportstate(gate, 93, false) " @ - " Gate.setportstate(gate, 94, false) " @ - " Gate.setportstate(gate, 95, false) " @ - " Gate.setportstate(gate, 96, false) " @ + " Gate.setportstate(gate, 49, 0) " @ + " Gate.setportstate(gate, 50, 0) " @ + " Gate.setportstate(gate, 51, 0) " @ + " Gate.setportstate(gate, 52, 0) " @ + " Gate.setportstate(gate, 53, 0) " @ + " Gate.setportstate(gate, 54, 0) " @ + " Gate.setportstate(gate, 55, 0) " @ + " Gate.setportstate(gate, 56, 0) " @ + " Gate.setportstate(gate, 57, 0) " @ + " Gate.setportstate(gate, 58, 0) " @ + " Gate.setportstate(gate, 59, 0) " @ + " Gate.setportstate(gate, 60, 0) " @ + " Gate.setportstate(gate, 61, 0) " @ + " Gate.setportstate(gate, 62, 0) " @ + " Gate.setportstate(gate, 63, 0) " @ + " Gate.setportstate(gate, 64, 0) " @ + " Gate.setportstate(gate, 65, 0) " @ + " Gate.setportstate(gate, 66, 0) " @ + " Gate.setportstate(gate, 67, 0) " @ + " Gate.setportstate(gate, 68, 0) " @ + " Gate.setportstate(gate, 69, 0) " @ + " Gate.setportstate(gate, 70, 0) " @ + " Gate.setportstate(gate, 71, 0) " @ + " Gate.setportstate(gate, 72, 0) " @ + " Gate.setportstate(gate, 73, 0) " @ + " Gate.setportstate(gate, 74, 0) " @ + " Gate.setportstate(gate, 75, 0) " @ + " Gate.setportstate(gate, 76, 0) " @ + " Gate.setportstate(gate, 77, 0) " @ + " Gate.setportstate(gate, 78, 0) " @ + " Gate.setportstate(gate, 79, 0) " @ + " Gate.setportstate(gate, 80, 0) " @ + " Gate.setportstate(gate, 81, 0) " @ + " Gate.setportstate(gate, 82, 0) " @ + " Gate.setportstate(gate, 83, 0) " @ + " Gate.setportstate(gate, 84, 0) " @ + " Gate.setportstate(gate, 85, 0) " @ + " Gate.setportstate(gate, 86, 0) " @ + " Gate.setportstate(gate, 87, 0) " @ + " Gate.setportstate(gate, 88, 0) " @ + " Gate.setportstate(gate, 89, 0) " @ + " Gate.setportstate(gate, 90, 0) " @ + " Gate.setportstate(gate, 91, 0) " @ + " Gate.setportstate(gate, 92, 0) " @ + " Gate.setportstate(gate, 93, 0) " @ + " Gate.setportstate(gate, 94, 0) " @ + " Gate.setportstate(gate, 95, 0) " @ + " Gate.setportstate(gate, 96, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 48 Bit Up.cs b/bricks/gen/newcode/Buffer 48 Bit Up.cs index 2ddbc77..e66a46a 100644 --- a/bricks/gen/newcode/Buffer 48 Bit Up.cs +++ b/bricks/gen/newcode/Buffer 48 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer48BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 97) then " @ + " if Gate.getportstate(gate, 97)~=0 then " @ " Gate.setportstate(gate, 49, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 50, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 51, Gate.getportstate(gate, 3)) " @ @@ -73,54 +73,54 @@ datablock fxDtsBrickData(LogicGate_Buffer48BitUp_Data){ " Gate.setportstate(gate, 95, Gate.getportstate(gate, 47)) " @ " Gate.setportstate(gate, 96, Gate.getportstate(gate, 48)) " @ " else " @ - " Gate.setportstate(gate, 49, false) " @ - " Gate.setportstate(gate, 50, false) " @ - " Gate.setportstate(gate, 51, false) " @ - " Gate.setportstate(gate, 52, false) " @ - " Gate.setportstate(gate, 53, false) " @ - " Gate.setportstate(gate, 54, false) " @ - " Gate.setportstate(gate, 55, false) " @ - " Gate.setportstate(gate, 56, false) " @ - " Gate.setportstate(gate, 57, false) " @ - " Gate.setportstate(gate, 58, false) " @ - " Gate.setportstate(gate, 59, false) " @ - " Gate.setportstate(gate, 60, false) " @ - " Gate.setportstate(gate, 61, false) " @ - " Gate.setportstate(gate, 62, false) " @ - " Gate.setportstate(gate, 63, false) " @ - " Gate.setportstate(gate, 64, false) " @ - " Gate.setportstate(gate, 65, false) " @ - " Gate.setportstate(gate, 66, false) " @ - " Gate.setportstate(gate, 67, false) " @ - " Gate.setportstate(gate, 68, false) " @ - " Gate.setportstate(gate, 69, false) " @ - " Gate.setportstate(gate, 70, false) " @ - " Gate.setportstate(gate, 71, false) " @ - " Gate.setportstate(gate, 72, false) " @ - " Gate.setportstate(gate, 73, false) " @ - " Gate.setportstate(gate, 74, false) " @ - " Gate.setportstate(gate, 75, false) " @ - " Gate.setportstate(gate, 76, false) " @ - " Gate.setportstate(gate, 77, false) " @ - " Gate.setportstate(gate, 78, false) " @ - " Gate.setportstate(gate, 79, false) " @ - " Gate.setportstate(gate, 80, false) " @ - " Gate.setportstate(gate, 81, false) " @ - " Gate.setportstate(gate, 82, false) " @ - " Gate.setportstate(gate, 83, false) " @ - " Gate.setportstate(gate, 84, false) " @ - " Gate.setportstate(gate, 85, false) " @ - " Gate.setportstate(gate, 86, false) " @ - " Gate.setportstate(gate, 87, false) " @ - " Gate.setportstate(gate, 88, false) " @ - " Gate.setportstate(gate, 89, false) " @ - " Gate.setportstate(gate, 90, false) " @ - " Gate.setportstate(gate, 91, false) " @ - " Gate.setportstate(gate, 92, false) " @ - " Gate.setportstate(gate, 93, false) " @ - " Gate.setportstate(gate, 94, false) " @ - " Gate.setportstate(gate, 95, false) " @ - " Gate.setportstate(gate, 96, false) " @ + " Gate.setportstate(gate, 49, 0) " @ + " Gate.setportstate(gate, 50, 0) " @ + " Gate.setportstate(gate, 51, 0) " @ + " Gate.setportstate(gate, 52, 0) " @ + " Gate.setportstate(gate, 53, 0) " @ + " Gate.setportstate(gate, 54, 0) " @ + " Gate.setportstate(gate, 55, 0) " @ + " Gate.setportstate(gate, 56, 0) " @ + " Gate.setportstate(gate, 57, 0) " @ + " Gate.setportstate(gate, 58, 0) " @ + " Gate.setportstate(gate, 59, 0) " @ + " Gate.setportstate(gate, 60, 0) " @ + " Gate.setportstate(gate, 61, 0) " @ + " Gate.setportstate(gate, 62, 0) " @ + " Gate.setportstate(gate, 63, 0) " @ + " Gate.setportstate(gate, 64, 0) " @ + " Gate.setportstate(gate, 65, 0) " @ + " Gate.setportstate(gate, 66, 0) " @ + " Gate.setportstate(gate, 67, 0) " @ + " Gate.setportstate(gate, 68, 0) " @ + " Gate.setportstate(gate, 69, 0) " @ + " Gate.setportstate(gate, 70, 0) " @ + " Gate.setportstate(gate, 71, 0) " @ + " Gate.setportstate(gate, 72, 0) " @ + " Gate.setportstate(gate, 73, 0) " @ + " Gate.setportstate(gate, 74, 0) " @ + " Gate.setportstate(gate, 75, 0) " @ + " Gate.setportstate(gate, 76, 0) " @ + " Gate.setportstate(gate, 77, 0) " @ + " Gate.setportstate(gate, 78, 0) " @ + " Gate.setportstate(gate, 79, 0) " @ + " Gate.setportstate(gate, 80, 0) " @ + " Gate.setportstate(gate, 81, 0) " @ + " Gate.setportstate(gate, 82, 0) " @ + " Gate.setportstate(gate, 83, 0) " @ + " Gate.setportstate(gate, 84, 0) " @ + " Gate.setportstate(gate, 85, 0) " @ + " Gate.setportstate(gate, 86, 0) " @ + " Gate.setportstate(gate, 87, 0) " @ + " Gate.setportstate(gate, 88, 0) " @ + " Gate.setportstate(gate, 89, 0) " @ + " Gate.setportstate(gate, 90, 0) " @ + " Gate.setportstate(gate, 91, 0) " @ + " Gate.setportstate(gate, 92, 0) " @ + " Gate.setportstate(gate, 93, 0) " @ + " Gate.setportstate(gate, 94, 0) " @ + " Gate.setportstate(gate, 95, 0) " @ + " Gate.setportstate(gate, 96, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 48 Bit.cs b/bricks/gen/newcode/Buffer 48 Bit.cs index eea6878..1c3ee24 100644 --- a/bricks/gen/newcode/Buffer 48 Bit.cs +++ b/bricks/gen/newcode/Buffer 48 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer48Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 97) then " @ + " if Gate.getportstate(gate, 97)~=0 then " @ " Gate.setportstate(gate, 49, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 50, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 51, Gate.getportstate(gate, 3)) " @ @@ -73,54 +73,54 @@ datablock fxDtsBrickData(LogicGate_Buffer48Bit_Data){ " Gate.setportstate(gate, 95, Gate.getportstate(gate, 47)) " @ " Gate.setportstate(gate, 96, Gate.getportstate(gate, 48)) " @ " else " @ - " Gate.setportstate(gate, 49, false) " @ - " Gate.setportstate(gate, 50, false) " @ - " Gate.setportstate(gate, 51, false) " @ - " Gate.setportstate(gate, 52, false) " @ - " Gate.setportstate(gate, 53, false) " @ - " Gate.setportstate(gate, 54, false) " @ - " Gate.setportstate(gate, 55, false) " @ - " Gate.setportstate(gate, 56, false) " @ - " Gate.setportstate(gate, 57, false) " @ - " Gate.setportstate(gate, 58, false) " @ - " Gate.setportstate(gate, 59, false) " @ - " Gate.setportstate(gate, 60, false) " @ - " Gate.setportstate(gate, 61, false) " @ - " Gate.setportstate(gate, 62, false) " @ - " Gate.setportstate(gate, 63, false) " @ - " Gate.setportstate(gate, 64, false) " @ - " Gate.setportstate(gate, 65, false) " @ - " Gate.setportstate(gate, 66, false) " @ - " Gate.setportstate(gate, 67, false) " @ - " Gate.setportstate(gate, 68, false) " @ - " Gate.setportstate(gate, 69, false) " @ - " Gate.setportstate(gate, 70, false) " @ - " Gate.setportstate(gate, 71, false) " @ - " Gate.setportstate(gate, 72, false) " @ - " Gate.setportstate(gate, 73, false) " @ - " Gate.setportstate(gate, 74, false) " @ - " Gate.setportstate(gate, 75, false) " @ - " Gate.setportstate(gate, 76, false) " @ - " Gate.setportstate(gate, 77, false) " @ - " Gate.setportstate(gate, 78, false) " @ - " Gate.setportstate(gate, 79, false) " @ - " Gate.setportstate(gate, 80, false) " @ - " Gate.setportstate(gate, 81, false) " @ - " Gate.setportstate(gate, 82, false) " @ - " Gate.setportstate(gate, 83, false) " @ - " Gate.setportstate(gate, 84, false) " @ - " Gate.setportstate(gate, 85, false) " @ - " Gate.setportstate(gate, 86, false) " @ - " Gate.setportstate(gate, 87, false) " @ - " Gate.setportstate(gate, 88, false) " @ - " Gate.setportstate(gate, 89, false) " @ - " Gate.setportstate(gate, 90, false) " @ - " Gate.setportstate(gate, 91, false) " @ - " Gate.setportstate(gate, 92, false) " @ - " Gate.setportstate(gate, 93, false) " @ - " Gate.setportstate(gate, 94, false) " @ - " Gate.setportstate(gate, 95, false) " @ - " Gate.setportstate(gate, 96, false) " @ + " Gate.setportstate(gate, 49, 0) " @ + " Gate.setportstate(gate, 50, 0) " @ + " Gate.setportstate(gate, 51, 0) " @ + " Gate.setportstate(gate, 52, 0) " @ + " Gate.setportstate(gate, 53, 0) " @ + " Gate.setportstate(gate, 54, 0) " @ + " Gate.setportstate(gate, 55, 0) " @ + " Gate.setportstate(gate, 56, 0) " @ + " Gate.setportstate(gate, 57, 0) " @ + " Gate.setportstate(gate, 58, 0) " @ + " Gate.setportstate(gate, 59, 0) " @ + " Gate.setportstate(gate, 60, 0) " @ + " Gate.setportstate(gate, 61, 0) " @ + " Gate.setportstate(gate, 62, 0) " @ + " Gate.setportstate(gate, 63, 0) " @ + " Gate.setportstate(gate, 64, 0) " @ + " Gate.setportstate(gate, 65, 0) " @ + " Gate.setportstate(gate, 66, 0) " @ + " Gate.setportstate(gate, 67, 0) " @ + " Gate.setportstate(gate, 68, 0) " @ + " Gate.setportstate(gate, 69, 0) " @ + " Gate.setportstate(gate, 70, 0) " @ + " Gate.setportstate(gate, 71, 0) " @ + " Gate.setportstate(gate, 72, 0) " @ + " Gate.setportstate(gate, 73, 0) " @ + " Gate.setportstate(gate, 74, 0) " @ + " Gate.setportstate(gate, 75, 0) " @ + " Gate.setportstate(gate, 76, 0) " @ + " Gate.setportstate(gate, 77, 0) " @ + " Gate.setportstate(gate, 78, 0) " @ + " Gate.setportstate(gate, 79, 0) " @ + " Gate.setportstate(gate, 80, 0) " @ + " Gate.setportstate(gate, 81, 0) " @ + " Gate.setportstate(gate, 82, 0) " @ + " Gate.setportstate(gate, 83, 0) " @ + " Gate.setportstate(gate, 84, 0) " @ + " Gate.setportstate(gate, 85, 0) " @ + " Gate.setportstate(gate, 86, 0) " @ + " Gate.setportstate(gate, 87, 0) " @ + " Gate.setportstate(gate, 88, 0) " @ + " Gate.setportstate(gate, 89, 0) " @ + " Gate.setportstate(gate, 90, 0) " @ + " Gate.setportstate(gate, 91, 0) " @ + " Gate.setportstate(gate, 92, 0) " @ + " Gate.setportstate(gate, 93, 0) " @ + " Gate.setportstate(gate, 94, 0) " @ + " Gate.setportstate(gate, 95, 0) " @ + " Gate.setportstate(gate, 96, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 5 Bit Down.cs b/bricks/gen/newcode/Buffer 5 Bit Down.cs index faf7cb8..bd34ded 100644 --- a/bricks/gen/newcode/Buffer 5 Bit Down.cs +++ b/bricks/gen/newcode/Buffer 5 Bit Down.cs @@ -23,18 +23,18 @@ datablock fxDtsBrickData(LogicGate_Buffer5BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 11) then " @ + " if Gate.getportstate(gate, 11)~=0 then " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 3)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 4)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 5)) " @ " else " @ - " Gate.setportstate(gate, 6, false) " @ - " Gate.setportstate(gate, 7, false) " @ - " Gate.setportstate(gate, 8, false) " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ + " Gate.setportstate(gate, 6, 0) " @ + " Gate.setportstate(gate, 7, 0) " @ + " Gate.setportstate(gate, 8, 0) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 5 Bit Up.cs b/bricks/gen/newcode/Buffer 5 Bit Up.cs index 135814b..4d44949 100644 --- a/bricks/gen/newcode/Buffer 5 Bit Up.cs +++ b/bricks/gen/newcode/Buffer 5 Bit Up.cs @@ -23,18 +23,18 @@ datablock fxDtsBrickData(LogicGate_Buffer5BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 11) then " @ + " if Gate.getportstate(gate, 11)~=0 then " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 3)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 4)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 5)) " @ " else " @ - " Gate.setportstate(gate, 6, false) " @ - " Gate.setportstate(gate, 7, false) " @ - " Gate.setportstate(gate, 8, false) " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ + " Gate.setportstate(gate, 6, 0) " @ + " Gate.setportstate(gate, 7, 0) " @ + " Gate.setportstate(gate, 8, 0) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 5 Bit.cs b/bricks/gen/newcode/Buffer 5 Bit.cs index 9e458f7..951c16c 100644 --- a/bricks/gen/newcode/Buffer 5 Bit.cs +++ b/bricks/gen/newcode/Buffer 5 Bit.cs @@ -23,18 +23,18 @@ datablock fxDtsBrickData(LogicGate_Buffer5Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 11) then " @ + " if Gate.getportstate(gate, 11)~=0 then " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 3)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 4)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 5)) " @ " else " @ - " Gate.setportstate(gate, 6, false) " @ - " Gate.setportstate(gate, 7, false) " @ - " Gate.setportstate(gate, 8, false) " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ + " Gate.setportstate(gate, 6, 0) " @ + " Gate.setportstate(gate, 7, 0) " @ + " Gate.setportstate(gate, 8, 0) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 6 Bit Down.cs b/bricks/gen/newcode/Buffer 6 Bit Down.cs index 2b6086f..d73d3eb 100644 --- a/bricks/gen/newcode/Buffer 6 Bit Down.cs +++ b/bricks/gen/newcode/Buffer 6 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer6BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 13) then " @ + " if Gate.getportstate(gate, 13)~=0 then " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 3)) " @ @@ -31,12 +31,12 @@ datablock fxDtsBrickData(LogicGate_Buffer6BitDown_Data){ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 5)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 6)) " @ " else " @ - " Gate.setportstate(gate, 7, false) " @ - " Gate.setportstate(gate, 8, false) " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ + " Gate.setportstate(gate, 7, 0) " @ + " Gate.setportstate(gate, 8, 0) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 6 Bit Up.cs b/bricks/gen/newcode/Buffer 6 Bit Up.cs index c8f8071..7041f36 100644 --- a/bricks/gen/newcode/Buffer 6 Bit Up.cs +++ b/bricks/gen/newcode/Buffer 6 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer6BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 13) then " @ + " if Gate.getportstate(gate, 13)~=0 then " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 3)) " @ @@ -31,12 +31,12 @@ datablock fxDtsBrickData(LogicGate_Buffer6BitUp_Data){ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 5)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 6)) " @ " else " @ - " Gate.setportstate(gate, 7, false) " @ - " Gate.setportstate(gate, 8, false) " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ + " Gate.setportstate(gate, 7, 0) " @ + " Gate.setportstate(gate, 8, 0) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 6 Bit.cs b/bricks/gen/newcode/Buffer 6 Bit.cs index 0da4987..23e9f43 100644 --- a/bricks/gen/newcode/Buffer 6 Bit.cs +++ b/bricks/gen/newcode/Buffer 6 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer6Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 13) then " @ + " if Gate.getportstate(gate, 13)~=0 then " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 3)) " @ @@ -31,12 +31,12 @@ datablock fxDtsBrickData(LogicGate_Buffer6Bit_Data){ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 5)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 6)) " @ " else " @ - " Gate.setportstate(gate, 7, false) " @ - " Gate.setportstate(gate, 8, false) " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ + " Gate.setportstate(gate, 7, 0) " @ + " Gate.setportstate(gate, 8, 0) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 64 Bit Down.cs b/bricks/gen/newcode/Buffer 64 Bit Down.cs index 71f20f7..cf1e3e3 100644 --- a/bricks/gen/newcode/Buffer 64 Bit Down.cs +++ b/bricks/gen/newcode/Buffer 64 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer64BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 129) then " @ + " if Gate.getportstate(gate, 129)~=0 then " @ " Gate.setportstate(gate, 65, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 66, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 67, Gate.getportstate(gate, 3)) " @ @@ -89,70 +89,70 @@ datablock fxDtsBrickData(LogicGate_Buffer64BitDown_Data){ " Gate.setportstate(gate, 127, Gate.getportstate(gate, 63)) " @ " Gate.setportstate(gate, 128, Gate.getportstate(gate, 64)) " @ " else " @ - " Gate.setportstate(gate, 65, false) " @ - " Gate.setportstate(gate, 66, false) " @ - " Gate.setportstate(gate, 67, false) " @ - " Gate.setportstate(gate, 68, false) " @ - " Gate.setportstate(gate, 69, false) " @ - " Gate.setportstate(gate, 70, false) " @ - " Gate.setportstate(gate, 71, false) " @ - " Gate.setportstate(gate, 72, false) " @ - " Gate.setportstate(gate, 73, false) " @ - " Gate.setportstate(gate, 74, false) " @ - " Gate.setportstate(gate, 75, false) " @ - " Gate.setportstate(gate, 76, false) " @ - " Gate.setportstate(gate, 77, false) " @ - " Gate.setportstate(gate, 78, false) " @ - " Gate.setportstate(gate, 79, false) " @ - " Gate.setportstate(gate, 80, false) " @ - " Gate.setportstate(gate, 81, false) " @ - " Gate.setportstate(gate, 82, false) " @ - " Gate.setportstate(gate, 83, false) " @ - " Gate.setportstate(gate, 84, false) " @ - " Gate.setportstate(gate, 85, false) " @ - " Gate.setportstate(gate, 86, false) " @ - " Gate.setportstate(gate, 87, false) " @ - " Gate.setportstate(gate, 88, false) " @ - " Gate.setportstate(gate, 89, false) " @ - " Gate.setportstate(gate, 90, false) " @ - " Gate.setportstate(gate, 91, false) " @ - " Gate.setportstate(gate, 92, false) " @ - " Gate.setportstate(gate, 93, false) " @ - " Gate.setportstate(gate, 94, false) " @ - " Gate.setportstate(gate, 95, false) " @ - " Gate.setportstate(gate, 96, false) " @ - " Gate.setportstate(gate, 97, false) " @ - " Gate.setportstate(gate, 98, false) " @ - " Gate.setportstate(gate, 99, false) " @ - " Gate.setportstate(gate, 100, false) " @ - " Gate.setportstate(gate, 101, false) " @ - " Gate.setportstate(gate, 102, false) " @ - " Gate.setportstate(gate, 103, false) " @ - " Gate.setportstate(gate, 104, false) " @ - " Gate.setportstate(gate, 105, false) " @ - " Gate.setportstate(gate, 106, false) " @ - " Gate.setportstate(gate, 107, false) " @ - " Gate.setportstate(gate, 108, false) " @ - " Gate.setportstate(gate, 109, false) " @ - " Gate.setportstate(gate, 110, false) " @ - " Gate.setportstate(gate, 111, false) " @ - " Gate.setportstate(gate, 112, false) " @ - " Gate.setportstate(gate, 113, false) " @ - " Gate.setportstate(gate, 114, false) " @ - " Gate.setportstate(gate, 115, false) " @ - " Gate.setportstate(gate, 116, false) " @ - " Gate.setportstate(gate, 117, false) " @ - " Gate.setportstate(gate, 118, false) " @ - " Gate.setportstate(gate, 119, false) " @ - " Gate.setportstate(gate, 120, false) " @ - " Gate.setportstate(gate, 121, false) " @ - " Gate.setportstate(gate, 122, false) " @ - " Gate.setportstate(gate, 123, false) " @ - " Gate.setportstate(gate, 124, false) " @ - " Gate.setportstate(gate, 125, false) " @ - " Gate.setportstate(gate, 126, false) " @ - " Gate.setportstate(gate, 127, false) " @ - " Gate.setportstate(gate, 128, false) " @ + " Gate.setportstate(gate, 65, 0) " @ + " Gate.setportstate(gate, 66, 0) " @ + " Gate.setportstate(gate, 67, 0) " @ + " Gate.setportstate(gate, 68, 0) " @ + " Gate.setportstate(gate, 69, 0) " @ + " Gate.setportstate(gate, 70, 0) " @ + " Gate.setportstate(gate, 71, 0) " @ + " Gate.setportstate(gate, 72, 0) " @ + " Gate.setportstate(gate, 73, 0) " @ + " Gate.setportstate(gate, 74, 0) " @ + " Gate.setportstate(gate, 75, 0) " @ + " Gate.setportstate(gate, 76, 0) " @ + " Gate.setportstate(gate, 77, 0) " @ + " Gate.setportstate(gate, 78, 0) " @ + " Gate.setportstate(gate, 79, 0) " @ + " Gate.setportstate(gate, 80, 0) " @ + " Gate.setportstate(gate, 81, 0) " @ + " Gate.setportstate(gate, 82, 0) " @ + " Gate.setportstate(gate, 83, 0) " @ + " Gate.setportstate(gate, 84, 0) " @ + " Gate.setportstate(gate, 85, 0) " @ + " Gate.setportstate(gate, 86, 0) " @ + " Gate.setportstate(gate, 87, 0) " @ + " Gate.setportstate(gate, 88, 0) " @ + " Gate.setportstate(gate, 89, 0) " @ + " Gate.setportstate(gate, 90, 0) " @ + " Gate.setportstate(gate, 91, 0) " @ + " Gate.setportstate(gate, 92, 0) " @ + " Gate.setportstate(gate, 93, 0) " @ + " Gate.setportstate(gate, 94, 0) " @ + " Gate.setportstate(gate, 95, 0) " @ + " Gate.setportstate(gate, 96, 0) " @ + " Gate.setportstate(gate, 97, 0) " @ + " Gate.setportstate(gate, 98, 0) " @ + " Gate.setportstate(gate, 99, 0) " @ + " Gate.setportstate(gate, 100, 0) " @ + " Gate.setportstate(gate, 101, 0) " @ + " Gate.setportstate(gate, 102, 0) " @ + " Gate.setportstate(gate, 103, 0) " @ + " Gate.setportstate(gate, 104, 0) " @ + " Gate.setportstate(gate, 105, 0) " @ + " Gate.setportstate(gate, 106, 0) " @ + " Gate.setportstate(gate, 107, 0) " @ + " Gate.setportstate(gate, 108, 0) " @ + " Gate.setportstate(gate, 109, 0) " @ + " Gate.setportstate(gate, 110, 0) " @ + " Gate.setportstate(gate, 111, 0) " @ + " Gate.setportstate(gate, 112, 0) " @ + " Gate.setportstate(gate, 113, 0) " @ + " Gate.setportstate(gate, 114, 0) " @ + " Gate.setportstate(gate, 115, 0) " @ + " Gate.setportstate(gate, 116, 0) " @ + " Gate.setportstate(gate, 117, 0) " @ + " Gate.setportstate(gate, 118, 0) " @ + " Gate.setportstate(gate, 119, 0) " @ + " Gate.setportstate(gate, 120, 0) " @ + " Gate.setportstate(gate, 121, 0) " @ + " Gate.setportstate(gate, 122, 0) " @ + " Gate.setportstate(gate, 123, 0) " @ + " Gate.setportstate(gate, 124, 0) " @ + " Gate.setportstate(gate, 125, 0) " @ + " Gate.setportstate(gate, 126, 0) " @ + " Gate.setportstate(gate, 127, 0) " @ + " Gate.setportstate(gate, 128, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 64 Bit Up.cs b/bricks/gen/newcode/Buffer 64 Bit Up.cs index cbadcc1..b7cce11 100644 --- a/bricks/gen/newcode/Buffer 64 Bit Up.cs +++ b/bricks/gen/newcode/Buffer 64 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer64BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 129) then " @ + " if Gate.getportstate(gate, 129)~=0 then " @ " Gate.setportstate(gate, 65, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 66, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 67, Gate.getportstate(gate, 3)) " @ @@ -89,70 +89,70 @@ datablock fxDtsBrickData(LogicGate_Buffer64BitUp_Data){ " Gate.setportstate(gate, 127, Gate.getportstate(gate, 63)) " @ " Gate.setportstate(gate, 128, Gate.getportstate(gate, 64)) " @ " else " @ - " Gate.setportstate(gate, 65, false) " @ - " Gate.setportstate(gate, 66, false) " @ - " Gate.setportstate(gate, 67, false) " @ - " Gate.setportstate(gate, 68, false) " @ - " Gate.setportstate(gate, 69, false) " @ - " Gate.setportstate(gate, 70, false) " @ - " Gate.setportstate(gate, 71, false) " @ - " Gate.setportstate(gate, 72, false) " @ - " Gate.setportstate(gate, 73, false) " @ - " Gate.setportstate(gate, 74, false) " @ - " Gate.setportstate(gate, 75, false) " @ - " Gate.setportstate(gate, 76, false) " @ - " Gate.setportstate(gate, 77, false) " @ - " Gate.setportstate(gate, 78, false) " @ - " Gate.setportstate(gate, 79, false) " @ - " Gate.setportstate(gate, 80, false) " @ - " Gate.setportstate(gate, 81, false) " @ - " Gate.setportstate(gate, 82, false) " @ - " Gate.setportstate(gate, 83, false) " @ - " Gate.setportstate(gate, 84, false) " @ - " Gate.setportstate(gate, 85, false) " @ - " Gate.setportstate(gate, 86, false) " @ - " Gate.setportstate(gate, 87, false) " @ - " Gate.setportstate(gate, 88, false) " @ - " Gate.setportstate(gate, 89, false) " @ - " Gate.setportstate(gate, 90, false) " @ - " Gate.setportstate(gate, 91, false) " @ - " Gate.setportstate(gate, 92, false) " @ - " Gate.setportstate(gate, 93, false) " @ - " Gate.setportstate(gate, 94, false) " @ - " Gate.setportstate(gate, 95, false) " @ - " Gate.setportstate(gate, 96, false) " @ - " Gate.setportstate(gate, 97, false) " @ - " Gate.setportstate(gate, 98, false) " @ - " Gate.setportstate(gate, 99, false) " @ - " Gate.setportstate(gate, 100, false) " @ - " Gate.setportstate(gate, 101, false) " @ - " Gate.setportstate(gate, 102, false) " @ - " Gate.setportstate(gate, 103, false) " @ - " Gate.setportstate(gate, 104, false) " @ - " Gate.setportstate(gate, 105, false) " @ - " Gate.setportstate(gate, 106, false) " @ - " Gate.setportstate(gate, 107, false) " @ - " Gate.setportstate(gate, 108, false) " @ - " Gate.setportstate(gate, 109, false) " @ - " Gate.setportstate(gate, 110, false) " @ - " Gate.setportstate(gate, 111, false) " @ - " Gate.setportstate(gate, 112, false) " @ - " Gate.setportstate(gate, 113, false) " @ - " Gate.setportstate(gate, 114, false) " @ - " Gate.setportstate(gate, 115, false) " @ - " Gate.setportstate(gate, 116, false) " @ - " Gate.setportstate(gate, 117, false) " @ - " Gate.setportstate(gate, 118, false) " @ - " Gate.setportstate(gate, 119, false) " @ - " Gate.setportstate(gate, 120, false) " @ - " Gate.setportstate(gate, 121, false) " @ - " Gate.setportstate(gate, 122, false) " @ - " Gate.setportstate(gate, 123, false) " @ - " Gate.setportstate(gate, 124, false) " @ - " Gate.setportstate(gate, 125, false) " @ - " Gate.setportstate(gate, 126, false) " @ - " Gate.setportstate(gate, 127, false) " @ - " Gate.setportstate(gate, 128, false) " @ + " Gate.setportstate(gate, 65, 0) " @ + " Gate.setportstate(gate, 66, 0) " @ + " Gate.setportstate(gate, 67, 0) " @ + " Gate.setportstate(gate, 68, 0) " @ + " Gate.setportstate(gate, 69, 0) " @ + " Gate.setportstate(gate, 70, 0) " @ + " Gate.setportstate(gate, 71, 0) " @ + " Gate.setportstate(gate, 72, 0) " @ + " Gate.setportstate(gate, 73, 0) " @ + " Gate.setportstate(gate, 74, 0) " @ + " Gate.setportstate(gate, 75, 0) " @ + " Gate.setportstate(gate, 76, 0) " @ + " Gate.setportstate(gate, 77, 0) " @ + " Gate.setportstate(gate, 78, 0) " @ + " Gate.setportstate(gate, 79, 0) " @ + " Gate.setportstate(gate, 80, 0) " @ + " Gate.setportstate(gate, 81, 0) " @ + " Gate.setportstate(gate, 82, 0) " @ + " Gate.setportstate(gate, 83, 0) " @ + " Gate.setportstate(gate, 84, 0) " @ + " Gate.setportstate(gate, 85, 0) " @ + " Gate.setportstate(gate, 86, 0) " @ + " Gate.setportstate(gate, 87, 0) " @ + " Gate.setportstate(gate, 88, 0) " @ + " Gate.setportstate(gate, 89, 0) " @ + " Gate.setportstate(gate, 90, 0) " @ + " Gate.setportstate(gate, 91, 0) " @ + " Gate.setportstate(gate, 92, 0) " @ + " Gate.setportstate(gate, 93, 0) " @ + " Gate.setportstate(gate, 94, 0) " @ + " Gate.setportstate(gate, 95, 0) " @ + " Gate.setportstate(gate, 96, 0) " @ + " Gate.setportstate(gate, 97, 0) " @ + " Gate.setportstate(gate, 98, 0) " @ + " Gate.setportstate(gate, 99, 0) " @ + " Gate.setportstate(gate, 100, 0) " @ + " Gate.setportstate(gate, 101, 0) " @ + " Gate.setportstate(gate, 102, 0) " @ + " Gate.setportstate(gate, 103, 0) " @ + " Gate.setportstate(gate, 104, 0) " @ + " Gate.setportstate(gate, 105, 0) " @ + " Gate.setportstate(gate, 106, 0) " @ + " Gate.setportstate(gate, 107, 0) " @ + " Gate.setportstate(gate, 108, 0) " @ + " Gate.setportstate(gate, 109, 0) " @ + " Gate.setportstate(gate, 110, 0) " @ + " Gate.setportstate(gate, 111, 0) " @ + " Gate.setportstate(gate, 112, 0) " @ + " Gate.setportstate(gate, 113, 0) " @ + " Gate.setportstate(gate, 114, 0) " @ + " Gate.setportstate(gate, 115, 0) " @ + " Gate.setportstate(gate, 116, 0) " @ + " Gate.setportstate(gate, 117, 0) " @ + " Gate.setportstate(gate, 118, 0) " @ + " Gate.setportstate(gate, 119, 0) " @ + " Gate.setportstate(gate, 120, 0) " @ + " Gate.setportstate(gate, 121, 0) " @ + " Gate.setportstate(gate, 122, 0) " @ + " Gate.setportstate(gate, 123, 0) " @ + " Gate.setportstate(gate, 124, 0) " @ + " Gate.setportstate(gate, 125, 0) " @ + " Gate.setportstate(gate, 126, 0) " @ + " Gate.setportstate(gate, 127, 0) " @ + " Gate.setportstate(gate, 128, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 64 Bit.cs b/bricks/gen/newcode/Buffer 64 Bit.cs index 9a89eb9..74909a2 100644 --- a/bricks/gen/newcode/Buffer 64 Bit.cs +++ b/bricks/gen/newcode/Buffer 64 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer64Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 129) then " @ + " if Gate.getportstate(gate, 129)~=0 then " @ " Gate.setportstate(gate, 65, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 66, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 67, Gate.getportstate(gate, 3)) " @ @@ -89,70 +89,70 @@ datablock fxDtsBrickData(LogicGate_Buffer64Bit_Data){ " Gate.setportstate(gate, 127, Gate.getportstate(gate, 63)) " @ " Gate.setportstate(gate, 128, Gate.getportstate(gate, 64)) " @ " else " @ - " Gate.setportstate(gate, 65, false) " @ - " Gate.setportstate(gate, 66, false) " @ - " Gate.setportstate(gate, 67, false) " @ - " Gate.setportstate(gate, 68, false) " @ - " Gate.setportstate(gate, 69, false) " @ - " Gate.setportstate(gate, 70, false) " @ - " Gate.setportstate(gate, 71, false) " @ - " Gate.setportstate(gate, 72, false) " @ - " Gate.setportstate(gate, 73, false) " @ - " Gate.setportstate(gate, 74, false) " @ - " Gate.setportstate(gate, 75, false) " @ - " Gate.setportstate(gate, 76, false) " @ - " Gate.setportstate(gate, 77, false) " @ - " Gate.setportstate(gate, 78, false) " @ - " Gate.setportstate(gate, 79, false) " @ - " Gate.setportstate(gate, 80, false) " @ - " Gate.setportstate(gate, 81, false) " @ - " Gate.setportstate(gate, 82, false) " @ - " Gate.setportstate(gate, 83, false) " @ - " Gate.setportstate(gate, 84, false) " @ - " Gate.setportstate(gate, 85, false) " @ - " Gate.setportstate(gate, 86, false) " @ - " Gate.setportstate(gate, 87, false) " @ - " Gate.setportstate(gate, 88, false) " @ - " Gate.setportstate(gate, 89, false) " @ - " Gate.setportstate(gate, 90, false) " @ - " Gate.setportstate(gate, 91, false) " @ - " Gate.setportstate(gate, 92, false) " @ - " Gate.setportstate(gate, 93, false) " @ - " Gate.setportstate(gate, 94, false) " @ - " Gate.setportstate(gate, 95, false) " @ - " Gate.setportstate(gate, 96, false) " @ - " Gate.setportstate(gate, 97, false) " @ - " Gate.setportstate(gate, 98, false) " @ - " Gate.setportstate(gate, 99, false) " @ - " Gate.setportstate(gate, 100, false) " @ - " Gate.setportstate(gate, 101, false) " @ - " Gate.setportstate(gate, 102, false) " @ - " Gate.setportstate(gate, 103, false) " @ - " Gate.setportstate(gate, 104, false) " @ - " Gate.setportstate(gate, 105, false) " @ - " Gate.setportstate(gate, 106, false) " @ - " Gate.setportstate(gate, 107, false) " @ - " Gate.setportstate(gate, 108, false) " @ - " Gate.setportstate(gate, 109, false) " @ - " Gate.setportstate(gate, 110, false) " @ - " Gate.setportstate(gate, 111, false) " @ - " Gate.setportstate(gate, 112, false) " @ - " Gate.setportstate(gate, 113, false) " @ - " Gate.setportstate(gate, 114, false) " @ - " Gate.setportstate(gate, 115, false) " @ - " Gate.setportstate(gate, 116, false) " @ - " Gate.setportstate(gate, 117, false) " @ - " Gate.setportstate(gate, 118, false) " @ - " Gate.setportstate(gate, 119, false) " @ - " Gate.setportstate(gate, 120, false) " @ - " Gate.setportstate(gate, 121, false) " @ - " Gate.setportstate(gate, 122, false) " @ - " Gate.setportstate(gate, 123, false) " @ - " Gate.setportstate(gate, 124, false) " @ - " Gate.setportstate(gate, 125, false) " @ - " Gate.setportstate(gate, 126, false) " @ - " Gate.setportstate(gate, 127, false) " @ - " Gate.setportstate(gate, 128, false) " @ + " Gate.setportstate(gate, 65, 0) " @ + " Gate.setportstate(gate, 66, 0) " @ + " Gate.setportstate(gate, 67, 0) " @ + " Gate.setportstate(gate, 68, 0) " @ + " Gate.setportstate(gate, 69, 0) " @ + " Gate.setportstate(gate, 70, 0) " @ + " Gate.setportstate(gate, 71, 0) " @ + " Gate.setportstate(gate, 72, 0) " @ + " Gate.setportstate(gate, 73, 0) " @ + " Gate.setportstate(gate, 74, 0) " @ + " Gate.setportstate(gate, 75, 0) " @ + " Gate.setportstate(gate, 76, 0) " @ + " Gate.setportstate(gate, 77, 0) " @ + " Gate.setportstate(gate, 78, 0) " @ + " Gate.setportstate(gate, 79, 0) " @ + " Gate.setportstate(gate, 80, 0) " @ + " Gate.setportstate(gate, 81, 0) " @ + " Gate.setportstate(gate, 82, 0) " @ + " Gate.setportstate(gate, 83, 0) " @ + " Gate.setportstate(gate, 84, 0) " @ + " Gate.setportstate(gate, 85, 0) " @ + " Gate.setportstate(gate, 86, 0) " @ + " Gate.setportstate(gate, 87, 0) " @ + " Gate.setportstate(gate, 88, 0) " @ + " Gate.setportstate(gate, 89, 0) " @ + " Gate.setportstate(gate, 90, 0) " @ + " Gate.setportstate(gate, 91, 0) " @ + " Gate.setportstate(gate, 92, 0) " @ + " Gate.setportstate(gate, 93, 0) " @ + " Gate.setportstate(gate, 94, 0) " @ + " Gate.setportstate(gate, 95, 0) " @ + " Gate.setportstate(gate, 96, 0) " @ + " Gate.setportstate(gate, 97, 0) " @ + " Gate.setportstate(gate, 98, 0) " @ + " Gate.setportstate(gate, 99, 0) " @ + " Gate.setportstate(gate, 100, 0) " @ + " Gate.setportstate(gate, 101, 0) " @ + " Gate.setportstate(gate, 102, 0) " @ + " Gate.setportstate(gate, 103, 0) " @ + " Gate.setportstate(gate, 104, 0) " @ + " Gate.setportstate(gate, 105, 0) " @ + " Gate.setportstate(gate, 106, 0) " @ + " Gate.setportstate(gate, 107, 0) " @ + " Gate.setportstate(gate, 108, 0) " @ + " Gate.setportstate(gate, 109, 0) " @ + " Gate.setportstate(gate, 110, 0) " @ + " Gate.setportstate(gate, 111, 0) " @ + " Gate.setportstate(gate, 112, 0) " @ + " Gate.setportstate(gate, 113, 0) " @ + " Gate.setportstate(gate, 114, 0) " @ + " Gate.setportstate(gate, 115, 0) " @ + " Gate.setportstate(gate, 116, 0) " @ + " Gate.setportstate(gate, 117, 0) " @ + " Gate.setportstate(gate, 118, 0) " @ + " Gate.setportstate(gate, 119, 0) " @ + " Gate.setportstate(gate, 120, 0) " @ + " Gate.setportstate(gate, 121, 0) " @ + " Gate.setportstate(gate, 122, 0) " @ + " Gate.setportstate(gate, 123, 0) " @ + " Gate.setportstate(gate, 124, 0) " @ + " Gate.setportstate(gate, 125, 0) " @ + " Gate.setportstate(gate, 126, 0) " @ + " Gate.setportstate(gate, 127, 0) " @ + " Gate.setportstate(gate, 128, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 7 Bit Down.cs b/bricks/gen/newcode/Buffer 7 Bit Down.cs index 26167cb..7d3d350 100644 --- a/bricks/gen/newcode/Buffer 7 Bit Down.cs +++ b/bricks/gen/newcode/Buffer 7 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer7BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 15) then " @ + " if Gate.getportstate(gate, 15)~=0 then " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 3)) " @ @@ -32,13 +32,13 @@ datablock fxDtsBrickData(LogicGate_Buffer7BitDown_Data){ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 6)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 7)) " @ " else " @ - " Gate.setportstate(gate, 8, false) " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ + " Gate.setportstate(gate, 8, 0) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 7 Bit Up.cs b/bricks/gen/newcode/Buffer 7 Bit Up.cs index 621644e..313a343 100644 --- a/bricks/gen/newcode/Buffer 7 Bit Up.cs +++ b/bricks/gen/newcode/Buffer 7 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer7BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 15) then " @ + " if Gate.getportstate(gate, 15)~=0 then " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 3)) " @ @@ -32,13 +32,13 @@ datablock fxDtsBrickData(LogicGate_Buffer7BitUp_Data){ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 6)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 7)) " @ " else " @ - " Gate.setportstate(gate, 8, false) " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ + " Gate.setportstate(gate, 8, 0) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 7 Bit.cs b/bricks/gen/newcode/Buffer 7 Bit.cs index a5eabb3..fef95d3 100644 --- a/bricks/gen/newcode/Buffer 7 Bit.cs +++ b/bricks/gen/newcode/Buffer 7 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer7Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 15) then " @ + " if Gate.getportstate(gate, 15)~=0 then " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 3)) " @ @@ -32,13 +32,13 @@ datablock fxDtsBrickData(LogicGate_Buffer7Bit_Data){ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 6)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 7)) " @ " else " @ - " Gate.setportstate(gate, 8, false) " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ + " Gate.setportstate(gate, 8, 0) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 8 Bit Down.cs b/bricks/gen/newcode/Buffer 8 Bit Down.cs index 97ebdfd..b5fac3c 100644 --- a/bricks/gen/newcode/Buffer 8 Bit Down.cs +++ b/bricks/gen/newcode/Buffer 8 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer8BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 17) then " @ + " if Gate.getportstate(gate, 17)~=0 then " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 3)) " @ @@ -33,14 +33,14 @@ datablock fxDtsBrickData(LogicGate_Buffer8BitDown_Data){ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 7)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 8)) " @ " else " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 8 Bit Up.cs b/bricks/gen/newcode/Buffer 8 Bit Up.cs index c09fe3e..fb3cfe9 100644 --- a/bricks/gen/newcode/Buffer 8 Bit Up.cs +++ b/bricks/gen/newcode/Buffer 8 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer8BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 17) then " @ + " if Gate.getportstate(gate, 17)~=0 then " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 3)) " @ @@ -33,14 +33,14 @@ datablock fxDtsBrickData(LogicGate_Buffer8BitUp_Data){ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 7)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 8)) " @ " else " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 8 Bit.cs b/bricks/gen/newcode/Buffer 8 Bit.cs index e941cb2..935f110 100644 --- a/bricks/gen/newcode/Buffer 8 Bit.cs +++ b/bricks/gen/newcode/Buffer 8 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer8Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 17) then " @ + " if Gate.getportstate(gate, 17)~=0 then " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 3)) " @ @@ -33,14 +33,14 @@ datablock fxDtsBrickData(LogicGate_Buffer8Bit_Data){ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 7)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 8)) " @ " else " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 9 Bit Down.cs b/bricks/gen/newcode/Buffer 9 Bit Down.cs index ccc6b89..afc53e3 100644 --- a/bricks/gen/newcode/Buffer 9 Bit Down.cs +++ b/bricks/gen/newcode/Buffer 9 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer9BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 19) then " @ + " if Gate.getportstate(gate, 19)~=0 then " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 3)) " @ @@ -34,15 +34,15 @@ datablock fxDtsBrickData(LogicGate_Buffer9BitDown_Data){ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 8)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 9)) " @ " else " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 9 Bit Up.cs b/bricks/gen/newcode/Buffer 9 Bit Up.cs index 13e49d0..f08dce6 100644 --- a/bricks/gen/newcode/Buffer 9 Bit Up.cs +++ b/bricks/gen/newcode/Buffer 9 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer9BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 19) then " @ + " if Gate.getportstate(gate, 19)~=0 then " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 3)) " @ @@ -34,15 +34,15 @@ datablock fxDtsBrickData(LogicGate_Buffer9BitUp_Data){ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 8)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 9)) " @ " else " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Buffer 9 Bit.cs b/bricks/gen/newcode/Buffer 9 Bit.cs index 5d352e1..ebffd92 100644 --- a/bricks/gen/newcode/Buffer 9 Bit.cs +++ b/bricks/gen/newcode/Buffer 9 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Buffer9Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 19) then " @ + " if Gate.getportstate(gate, 19)~=0 then " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 3)) " @ @@ -34,15 +34,15 @@ datablock fxDtsBrickData(LogicGate_Buffer9Bit_Data){ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 8)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 9)) " @ " else " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/D FlipFlop 1 Bit Down.cs b/bricks/gen/newcode/D FlipFlop 1 Bit Down.cs index dcb65d2..3210d98 100644 --- a/bricks/gen/newcode/D FlipFlop 1 Bit Down.cs +++ b/bricks/gen/newcode/D FlipFlop 1 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop1BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 3) then " @ + " if Gate.getportstate(gate, 3)~=0 then " @ " Gate.setportstate(gate, 2, Gate.getportstate(gate, 1)) " @ " end " @ "end" diff --git a/bricks/gen/newcode/D FlipFlop 1 Bit Up.cs b/bricks/gen/newcode/D FlipFlop 1 Bit Up.cs index 2714b23..f948aad 100644 --- a/bricks/gen/newcode/D FlipFlop 1 Bit Up.cs +++ b/bricks/gen/newcode/D FlipFlop 1 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop1BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 3) then " @ + " if Gate.getportstate(gate, 3)~=0 then " @ " Gate.setportstate(gate, 2, Gate.getportstate(gate, 1)) " @ " end " @ "end" diff --git a/bricks/gen/newcode/D FlipFlop 1 Bit.cs b/bricks/gen/newcode/D FlipFlop 1 Bit.cs index 399169d..51abbe1 100644 --- a/bricks/gen/newcode/D FlipFlop 1 Bit.cs +++ b/bricks/gen/newcode/D FlipFlop 1 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop1Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 3) then " @ + " if Gate.getportstate(gate, 3)~=0 then " @ " Gate.setportstate(gate, 2, Gate.getportstate(gate, 1)) " @ " end " @ "end" diff --git a/bricks/gen/newcode/D FlipFlop 10 Bit Down.cs b/bricks/gen/newcode/D FlipFlop 10 Bit Down.cs index d6f9077..6eade9b 100644 --- a/bricks/gen/newcode/D FlipFlop 10 Bit Down.cs +++ b/bricks/gen/newcode/D FlipFlop 10 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop10BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 21) then " @ + " if Gate.getportstate(gate, 21)~=0 then " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 10 Bit Up.cs b/bricks/gen/newcode/D FlipFlop 10 Bit Up.cs index 2c95d41..1b6771f 100644 --- a/bricks/gen/newcode/D FlipFlop 10 Bit Up.cs +++ b/bricks/gen/newcode/D FlipFlop 10 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop10BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 21) then " @ + " if Gate.getportstate(gate, 21)~=0 then " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 10 Bit.cs b/bricks/gen/newcode/D FlipFlop 10 Bit.cs index ecb1621..c1beacb 100644 --- a/bricks/gen/newcode/D FlipFlop 10 Bit.cs +++ b/bricks/gen/newcode/D FlipFlop 10 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop10Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 21) then " @ + " if Gate.getportstate(gate, 21)~=0 then " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 11 Bit Down.cs b/bricks/gen/newcode/D FlipFlop 11 Bit Down.cs index e6f4af6..9825db6 100644 --- a/bricks/gen/newcode/D FlipFlop 11 Bit Down.cs +++ b/bricks/gen/newcode/D FlipFlop 11 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop11BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 23) then " @ + " if Gate.getportstate(gate, 23)~=0 then " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 11 Bit Up.cs b/bricks/gen/newcode/D FlipFlop 11 Bit Up.cs index 98e198c..da65f6b 100644 --- a/bricks/gen/newcode/D FlipFlop 11 Bit Up.cs +++ b/bricks/gen/newcode/D FlipFlop 11 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop11BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 23) then " @ + " if Gate.getportstate(gate, 23)~=0 then " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 11 Bit.cs b/bricks/gen/newcode/D FlipFlop 11 Bit.cs index 93c10df..7d95837 100644 --- a/bricks/gen/newcode/D FlipFlop 11 Bit.cs +++ b/bricks/gen/newcode/D FlipFlop 11 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop11Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 23) then " @ + " if Gate.getportstate(gate, 23)~=0 then " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 12 Bit Down.cs b/bricks/gen/newcode/D FlipFlop 12 Bit Down.cs index 4a1534a..a42a5d5 100644 --- a/bricks/gen/newcode/D FlipFlop 12 Bit Down.cs +++ b/bricks/gen/newcode/D FlipFlop 12 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop12BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 25) then " @ + " if Gate.getportstate(gate, 25)~=0 then " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 12 Bit Up.cs b/bricks/gen/newcode/D FlipFlop 12 Bit Up.cs index 96cbb1b..4129fec 100644 --- a/bricks/gen/newcode/D FlipFlop 12 Bit Up.cs +++ b/bricks/gen/newcode/D FlipFlop 12 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop12BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 25) then " @ + " if Gate.getportstate(gate, 25)~=0 then " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 12 Bit.cs b/bricks/gen/newcode/D FlipFlop 12 Bit.cs index 8d34641..f454d7e 100644 --- a/bricks/gen/newcode/D FlipFlop 12 Bit.cs +++ b/bricks/gen/newcode/D FlipFlop 12 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop12Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 25) then " @ + " if Gate.getportstate(gate, 25)~=0 then " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 13 Bit Down.cs b/bricks/gen/newcode/D FlipFlop 13 Bit Down.cs index 792a04a..8bf0ea3 100644 --- a/bricks/gen/newcode/D FlipFlop 13 Bit Down.cs +++ b/bricks/gen/newcode/D FlipFlop 13 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop13BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 27) then " @ + " if Gate.getportstate(gate, 27)~=0 then " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 13 Bit Up.cs b/bricks/gen/newcode/D FlipFlop 13 Bit Up.cs index e4dff43..133ad30 100644 --- a/bricks/gen/newcode/D FlipFlop 13 Bit Up.cs +++ b/bricks/gen/newcode/D FlipFlop 13 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop13BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 27) then " @ + " if Gate.getportstate(gate, 27)~=0 then " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 13 Bit.cs b/bricks/gen/newcode/D FlipFlop 13 Bit.cs index b25f744..b808e71 100644 --- a/bricks/gen/newcode/D FlipFlop 13 Bit.cs +++ b/bricks/gen/newcode/D FlipFlop 13 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop13Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 27) then " @ + " if Gate.getportstate(gate, 27)~=0 then " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 14 Bit Down.cs b/bricks/gen/newcode/D FlipFlop 14 Bit Down.cs index aa72af5..db8766d 100644 --- a/bricks/gen/newcode/D FlipFlop 14 Bit Down.cs +++ b/bricks/gen/newcode/D FlipFlop 14 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop14BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 29) then " @ + " if Gate.getportstate(gate, 29)~=0 then " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 14 Bit Up.cs b/bricks/gen/newcode/D FlipFlop 14 Bit Up.cs index b784919..455fad1 100644 --- a/bricks/gen/newcode/D FlipFlop 14 Bit Up.cs +++ b/bricks/gen/newcode/D FlipFlop 14 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop14BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 29) then " @ + " if Gate.getportstate(gate, 29)~=0 then " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 14 Bit.cs b/bricks/gen/newcode/D FlipFlop 14 Bit.cs index 2c9e6ef..d22f74d 100644 --- a/bricks/gen/newcode/D FlipFlop 14 Bit.cs +++ b/bricks/gen/newcode/D FlipFlop 14 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop14Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 29) then " @ + " if Gate.getportstate(gate, 29)~=0 then " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 15 Bit Down.cs b/bricks/gen/newcode/D FlipFlop 15 Bit Down.cs index 0415b82..b8004be 100644 --- a/bricks/gen/newcode/D FlipFlop 15 Bit Down.cs +++ b/bricks/gen/newcode/D FlipFlop 15 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop15BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 31) then " @ + " if Gate.getportstate(gate, 31)~=0 then " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 15 Bit Up.cs b/bricks/gen/newcode/D FlipFlop 15 Bit Up.cs index 6acb93d..0f481a2 100644 --- a/bricks/gen/newcode/D FlipFlop 15 Bit Up.cs +++ b/bricks/gen/newcode/D FlipFlop 15 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop15BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 31) then " @ + " if Gate.getportstate(gate, 31)~=0 then " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 15 Bit.cs b/bricks/gen/newcode/D FlipFlop 15 Bit.cs index 068a1b6..92661a9 100644 --- a/bricks/gen/newcode/D FlipFlop 15 Bit.cs +++ b/bricks/gen/newcode/D FlipFlop 15 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop15Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 31) then " @ + " if Gate.getportstate(gate, 31)~=0 then " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 16 Bit Down.cs b/bricks/gen/newcode/D FlipFlop 16 Bit Down.cs index 3b75a2a..7a4fced 100644 --- a/bricks/gen/newcode/D FlipFlop 16 Bit Down.cs +++ b/bricks/gen/newcode/D FlipFlop 16 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop16BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 33) then " @ + " if Gate.getportstate(gate, 33)~=0 then " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 19, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 16 Bit Up.cs b/bricks/gen/newcode/D FlipFlop 16 Bit Up.cs index ea37f0d..346ca51 100644 --- a/bricks/gen/newcode/D FlipFlop 16 Bit Up.cs +++ b/bricks/gen/newcode/D FlipFlop 16 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop16BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 33) then " @ + " if Gate.getportstate(gate, 33)~=0 then " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 19, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 16 Bit.cs b/bricks/gen/newcode/D FlipFlop 16 Bit.cs index 28d3308..2fae322 100644 --- a/bricks/gen/newcode/D FlipFlop 16 Bit.cs +++ b/bricks/gen/newcode/D FlipFlop 16 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop16Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 33) then " @ + " if Gate.getportstate(gate, 33)~=0 then " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 19, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 2 Bit Down.cs b/bricks/gen/newcode/D FlipFlop 2 Bit Down.cs index 1ddcde9..65cc7bb 100644 --- a/bricks/gen/newcode/D FlipFlop 2 Bit Down.cs +++ b/bricks/gen/newcode/D FlipFlop 2 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop2BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 5) then " @ + " if Gate.getportstate(gate, 5)~=0 then " @ " Gate.setportstate(gate, 3, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 4, Gate.getportstate(gate, 2)) " @ " end " @ diff --git a/bricks/gen/newcode/D FlipFlop 2 Bit Up.cs b/bricks/gen/newcode/D FlipFlop 2 Bit Up.cs index d76e494..4db22a5 100644 --- a/bricks/gen/newcode/D FlipFlop 2 Bit Up.cs +++ b/bricks/gen/newcode/D FlipFlop 2 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop2BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 5) then " @ + " if Gate.getportstate(gate, 5)~=0 then " @ " Gate.setportstate(gate, 3, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 4, Gate.getportstate(gate, 2)) " @ " end " @ diff --git a/bricks/gen/newcode/D FlipFlop 2 Bit.cs b/bricks/gen/newcode/D FlipFlop 2 Bit.cs index d3fd6bf..402a837 100644 --- a/bricks/gen/newcode/D FlipFlop 2 Bit.cs +++ b/bricks/gen/newcode/D FlipFlop 2 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop2Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 5) then " @ + " if Gate.getportstate(gate, 5)~=0 then " @ " Gate.setportstate(gate, 3, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 4, Gate.getportstate(gate, 2)) " @ " end " @ diff --git a/bricks/gen/newcode/D FlipFlop 24 Bit Down.cs b/bricks/gen/newcode/D FlipFlop 24 Bit Down.cs index e430c78..6dfad03 100644 --- a/bricks/gen/newcode/D FlipFlop 24 Bit Down.cs +++ b/bricks/gen/newcode/D FlipFlop 24 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop24BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 49) then " @ + " if Gate.getportstate(gate, 49)~=0 then " @ " Gate.setportstate(gate, 25, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 26, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 27, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 24 Bit Up.cs b/bricks/gen/newcode/D FlipFlop 24 Bit Up.cs index 3cb2fd2..f8f90dd 100644 --- a/bricks/gen/newcode/D FlipFlop 24 Bit Up.cs +++ b/bricks/gen/newcode/D FlipFlop 24 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop24BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 49) then " @ + " if Gate.getportstate(gate, 49)~=0 then " @ " Gate.setportstate(gate, 25, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 26, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 27, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 24 Bit.cs b/bricks/gen/newcode/D FlipFlop 24 Bit.cs index caa87f0..3523731 100644 --- a/bricks/gen/newcode/D FlipFlop 24 Bit.cs +++ b/bricks/gen/newcode/D FlipFlop 24 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop24Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 49) then " @ + " if Gate.getportstate(gate, 49)~=0 then " @ " Gate.setportstate(gate, 25, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 26, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 27, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 3 Bit Down.cs b/bricks/gen/newcode/D FlipFlop 3 Bit Down.cs index 3135c9c..bc72140 100644 --- a/bricks/gen/newcode/D FlipFlop 3 Bit Down.cs +++ b/bricks/gen/newcode/D FlipFlop 3 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop3BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 7) then " @ + " if Gate.getportstate(gate, 7)~=0 then " @ " Gate.setportstate(gate, 4, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 5, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 3 Bit Up.cs b/bricks/gen/newcode/D FlipFlop 3 Bit Up.cs index 7b4c99a..ee0b947 100644 --- a/bricks/gen/newcode/D FlipFlop 3 Bit Up.cs +++ b/bricks/gen/newcode/D FlipFlop 3 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop3BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 7) then " @ + " if Gate.getportstate(gate, 7)~=0 then " @ " Gate.setportstate(gate, 4, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 5, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 3 Bit.cs b/bricks/gen/newcode/D FlipFlop 3 Bit.cs index c3ec5ab..f00d5bb 100644 --- a/bricks/gen/newcode/D FlipFlop 3 Bit.cs +++ b/bricks/gen/newcode/D FlipFlop 3 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop3Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 7) then " @ + " if Gate.getportstate(gate, 7)~=0 then " @ " Gate.setportstate(gate, 4, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 5, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 32 Bit Down.cs b/bricks/gen/newcode/D FlipFlop 32 Bit Down.cs index f97ee57..afbf86c 100644 --- a/bricks/gen/newcode/D FlipFlop 32 Bit Down.cs +++ b/bricks/gen/newcode/D FlipFlop 32 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop32BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 65) then " @ + " if Gate.getportstate(gate, 65)~=0 then " @ " Gate.setportstate(gate, 33, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 34, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 35, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 32 Bit Up.cs b/bricks/gen/newcode/D FlipFlop 32 Bit Up.cs index 526fd91..49b8b32 100644 --- a/bricks/gen/newcode/D FlipFlop 32 Bit Up.cs +++ b/bricks/gen/newcode/D FlipFlop 32 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop32BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 65) then " @ + " if Gate.getportstate(gate, 65)~=0 then " @ " Gate.setportstate(gate, 33, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 34, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 35, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 32 Bit.cs b/bricks/gen/newcode/D FlipFlop 32 Bit.cs index a637589..b2289fd 100644 --- a/bricks/gen/newcode/D FlipFlop 32 Bit.cs +++ b/bricks/gen/newcode/D FlipFlop 32 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop32Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 65) then " @ + " if Gate.getportstate(gate, 65)~=0 then " @ " Gate.setportstate(gate, 33, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 34, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 35, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 4 Bit Down.cs b/bricks/gen/newcode/D FlipFlop 4 Bit Down.cs index 7a4e93c..98a8439 100644 --- a/bricks/gen/newcode/D FlipFlop 4 Bit Down.cs +++ b/bricks/gen/newcode/D FlipFlop 4 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop4BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 9) then " @ + " if Gate.getportstate(gate, 9)~=0 then " @ " Gate.setportstate(gate, 5, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 4 Bit Up.cs b/bricks/gen/newcode/D FlipFlop 4 Bit Up.cs index 0e677f3..794f7ad 100644 --- a/bricks/gen/newcode/D FlipFlop 4 Bit Up.cs +++ b/bricks/gen/newcode/D FlipFlop 4 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop4BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 9) then " @ + " if Gate.getportstate(gate, 9)~=0 then " @ " Gate.setportstate(gate, 5, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 4 Bit.cs b/bricks/gen/newcode/D FlipFlop 4 Bit.cs index 0a84b7c..bb9546d 100644 --- a/bricks/gen/newcode/D FlipFlop 4 Bit.cs +++ b/bricks/gen/newcode/D FlipFlop 4 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop4Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 9) then " @ + " if Gate.getportstate(gate, 9)~=0 then " @ " Gate.setportstate(gate, 5, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 48 Bit Down.cs b/bricks/gen/newcode/D FlipFlop 48 Bit Down.cs index 768b8cc..e801793 100644 --- a/bricks/gen/newcode/D FlipFlop 48 Bit Down.cs +++ b/bricks/gen/newcode/D FlipFlop 48 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop48BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 97) then " @ + " if Gate.getportstate(gate, 97)~=0 then " @ " Gate.setportstate(gate, 49, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 50, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 51, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 48 Bit Up.cs b/bricks/gen/newcode/D FlipFlop 48 Bit Up.cs index 2adbedf..56e9a1c 100644 --- a/bricks/gen/newcode/D FlipFlop 48 Bit Up.cs +++ b/bricks/gen/newcode/D FlipFlop 48 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop48BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 97) then " @ + " if Gate.getportstate(gate, 97)~=0 then " @ " Gate.setportstate(gate, 49, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 50, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 51, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 48 Bit.cs b/bricks/gen/newcode/D FlipFlop 48 Bit.cs index 12b0bc3..10d451c 100644 --- a/bricks/gen/newcode/D FlipFlop 48 Bit.cs +++ b/bricks/gen/newcode/D FlipFlop 48 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop48Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 97) then " @ + " if Gate.getportstate(gate, 97)~=0 then " @ " Gate.setportstate(gate, 49, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 50, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 51, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 5 Bit Down.cs b/bricks/gen/newcode/D FlipFlop 5 Bit Down.cs index c562dbc..3f8c6d8 100644 --- a/bricks/gen/newcode/D FlipFlop 5 Bit Down.cs +++ b/bricks/gen/newcode/D FlipFlop 5 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop5BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 11) then " @ + " if Gate.getportstate(gate, 11)~=0 then " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 5 Bit Up.cs b/bricks/gen/newcode/D FlipFlop 5 Bit Up.cs index 98b9a52..cf59685 100644 --- a/bricks/gen/newcode/D FlipFlop 5 Bit Up.cs +++ b/bricks/gen/newcode/D FlipFlop 5 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop5BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 11) then " @ + " if Gate.getportstate(gate, 11)~=0 then " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 5 Bit.cs b/bricks/gen/newcode/D FlipFlop 5 Bit.cs index 3477d74..619e24c 100644 --- a/bricks/gen/newcode/D FlipFlop 5 Bit.cs +++ b/bricks/gen/newcode/D FlipFlop 5 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop5Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 11) then " @ + " if Gate.getportstate(gate, 11)~=0 then " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 6 Bit Down.cs b/bricks/gen/newcode/D FlipFlop 6 Bit Down.cs index 6901419..297969d 100644 --- a/bricks/gen/newcode/D FlipFlop 6 Bit Down.cs +++ b/bricks/gen/newcode/D FlipFlop 6 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop6BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 13) then " @ + " if Gate.getportstate(gate, 13)~=0 then " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 6 Bit Up.cs b/bricks/gen/newcode/D FlipFlop 6 Bit Up.cs index 7ed222e..78c2653 100644 --- a/bricks/gen/newcode/D FlipFlop 6 Bit Up.cs +++ b/bricks/gen/newcode/D FlipFlop 6 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop6BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 13) then " @ + " if Gate.getportstate(gate, 13)~=0 then " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 6 Bit.cs b/bricks/gen/newcode/D FlipFlop 6 Bit.cs index 35a9a3a..c77e52f 100644 --- a/bricks/gen/newcode/D FlipFlop 6 Bit.cs +++ b/bricks/gen/newcode/D FlipFlop 6 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop6Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 13) then " @ + " if Gate.getportstate(gate, 13)~=0 then " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 64 Bit Down.cs b/bricks/gen/newcode/D FlipFlop 64 Bit Down.cs index 235cc4d..84a34a4 100644 --- a/bricks/gen/newcode/D FlipFlop 64 Bit Down.cs +++ b/bricks/gen/newcode/D FlipFlop 64 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop64BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 129) then " @ + " if Gate.getportstate(gate, 129)~=0 then " @ " Gate.setportstate(gate, 65, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 66, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 67, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 64 Bit Up.cs b/bricks/gen/newcode/D FlipFlop 64 Bit Up.cs index 733b45f..8708e0e 100644 --- a/bricks/gen/newcode/D FlipFlop 64 Bit Up.cs +++ b/bricks/gen/newcode/D FlipFlop 64 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop64BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 129) then " @ + " if Gate.getportstate(gate, 129)~=0 then " @ " Gate.setportstate(gate, 65, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 66, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 67, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 64 Bit.cs b/bricks/gen/newcode/D FlipFlop 64 Bit.cs index 24c7272..ec52291 100644 --- a/bricks/gen/newcode/D FlipFlop 64 Bit.cs +++ b/bricks/gen/newcode/D FlipFlop 64 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop64Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 129) then " @ + " if Gate.getportstate(gate, 129)~=0 then " @ " Gate.setportstate(gate, 65, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 66, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 67, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 7 Bit Down.cs b/bricks/gen/newcode/D FlipFlop 7 Bit Down.cs index aa5774b..c0a7bb8 100644 --- a/bricks/gen/newcode/D FlipFlop 7 Bit Down.cs +++ b/bricks/gen/newcode/D FlipFlop 7 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop7BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 15) then " @ + " if Gate.getportstate(gate, 15)~=0 then " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 7 Bit Up.cs b/bricks/gen/newcode/D FlipFlop 7 Bit Up.cs index 76ea35d..624ef7f 100644 --- a/bricks/gen/newcode/D FlipFlop 7 Bit Up.cs +++ b/bricks/gen/newcode/D FlipFlop 7 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop7BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 15) then " @ + " if Gate.getportstate(gate, 15)~=0 then " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 7 Bit.cs b/bricks/gen/newcode/D FlipFlop 7 Bit.cs index 04f0046..b7e9992 100644 --- a/bricks/gen/newcode/D FlipFlop 7 Bit.cs +++ b/bricks/gen/newcode/D FlipFlop 7 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop7Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 15) then " @ + " if Gate.getportstate(gate, 15)~=0 then " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 8 Bit Down.cs b/bricks/gen/newcode/D FlipFlop 8 Bit Down.cs index 496f55b..ff90d16 100644 --- a/bricks/gen/newcode/D FlipFlop 8 Bit Down.cs +++ b/bricks/gen/newcode/D FlipFlop 8 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop8BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 17) then " @ + " if Gate.getportstate(gate, 17)~=0 then " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 8 Bit Up.cs b/bricks/gen/newcode/D FlipFlop 8 Bit Up.cs index 2006e03..724d54c 100644 --- a/bricks/gen/newcode/D FlipFlop 8 Bit Up.cs +++ b/bricks/gen/newcode/D FlipFlop 8 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop8BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 17) then " @ + " if Gate.getportstate(gate, 17)~=0 then " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 8 Bit.cs b/bricks/gen/newcode/D FlipFlop 8 Bit.cs index 11867dc..c241aa7 100644 --- a/bricks/gen/newcode/D FlipFlop 8 Bit.cs +++ b/bricks/gen/newcode/D FlipFlop 8 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop8Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 17) then " @ + " if Gate.getportstate(gate, 17)~=0 then " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 9 Bit Down.cs b/bricks/gen/newcode/D FlipFlop 9 Bit Down.cs index b1b6c14..977fd57 100644 --- a/bricks/gen/newcode/D FlipFlop 9 Bit Down.cs +++ b/bricks/gen/newcode/D FlipFlop 9 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop9BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 19) then " @ + " if Gate.getportstate(gate, 19)~=0 then " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 9 Bit Up.cs b/bricks/gen/newcode/D FlipFlop 9 Bit Up.cs index bbfcaa8..750b1ad 100644 --- a/bricks/gen/newcode/D FlipFlop 9 Bit Up.cs +++ b/bricks/gen/newcode/D FlipFlop 9 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop9BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 19) then " @ + " if Gate.getportstate(gate, 19)~=0 then " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/D FlipFlop 9 Bit.cs b/bricks/gen/newcode/D FlipFlop 9 Bit.cs index 534ccac..ccfca1e 100644 --- a/bricks/gen/newcode/D FlipFlop 9 Bit.cs +++ b/bricks/gen/newcode/D FlipFlop 9 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_DFlipFlop9Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 19) then " @ + " if Gate.getportstate(gate, 19)~=0 then " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 3)) " @ diff --git a/bricks/gen/newcode/Demux 1 Bit Vertical.cs b/bricks/gen/newcode/Demux 1 Bit Vertical.cs index 0be8d29..6e8e325 100644 --- a/bricks/gen/newcode/Demux 1 Bit Vertical.cs +++ b/bricks/gen/newcode/Demux 1 Bit Vertical.cs @@ -27,16 +27,16 @@ datablock fxDtsBrickData(LogicGate_Demux1Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 4) then " @ + " if Gate.getportstate(gate, 4)~=0 then " @ " local idx = 2 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) " @ - " Gate.setportstate(gate, idx, true) " @ + " (Gate.getportstate(gate, 1) * 1) " @ + " Gate.setportstate(gate, idx, 1) " @ " if gate.laston~=idx then " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " gate.laston = idx " @ " end " @ " else " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Demux 1 Bit.cs b/bricks/gen/newcode/Demux 1 Bit.cs index 044ce8a..0190d52 100644 --- a/bricks/gen/newcode/Demux 1 Bit.cs +++ b/bricks/gen/newcode/Demux 1 Bit.cs @@ -27,16 +27,16 @@ datablock fxDtsBrickData(LogicGate_Demux1_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 4) then " @ + " if Gate.getportstate(gate, 4)~=0 then " @ " local idx = 2 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) " @ - " Gate.setportstate(gate, idx, true) " @ + " (Gate.getportstate(gate, 1) * 1) " @ + " Gate.setportstate(gate, idx, 1) " @ " if gate.laston~=idx then " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " gate.laston = idx " @ " end " @ " else " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Demux 2 Bit Vertical.cs b/bricks/gen/newcode/Demux 2 Bit Vertical.cs index 0cb79cf..33c20fa 100644 --- a/bricks/gen/newcode/Demux 2 Bit Vertical.cs +++ b/bricks/gen/newcode/Demux 2 Bit Vertical.cs @@ -27,17 +27,17 @@ datablock fxDtsBrickData(LogicGate_Demux2Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 7) then " @ + " if Gate.getportstate(gate, 7)~=0 then " @ " local idx = 3 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) + " @ - " (bool_to_int[Gate.getportstate(gate, 2)] * 2) " @ - " Gate.setportstate(gate, idx, true) " @ + " (Gate.getportstate(gate, 1) * 1) + " @ + " (Gate.getportstate(gate, 2) * 2) " @ + " Gate.setportstate(gate, idx, 1) " @ " if gate.laston~=idx then " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " gate.laston = idx " @ " end " @ " else " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Demux 2 Bit.cs b/bricks/gen/newcode/Demux 2 Bit.cs index f34031d..1f36cc4 100644 --- a/bricks/gen/newcode/Demux 2 Bit.cs +++ b/bricks/gen/newcode/Demux 2 Bit.cs @@ -27,17 +27,17 @@ datablock fxDtsBrickData(LogicGate_Demux2_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 7) then " @ + " if Gate.getportstate(gate, 7)~=0 then " @ " local idx = 3 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) + " @ - " (bool_to_int[Gate.getportstate(gate, 2)] * 2) " @ - " Gate.setportstate(gate, idx, true) " @ + " (Gate.getportstate(gate, 1) * 1) + " @ + " (Gate.getportstate(gate, 2) * 2) " @ + " Gate.setportstate(gate, idx, 1) " @ " if gate.laston~=idx then " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " gate.laston = idx " @ " end " @ " else " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Demux 3 Bit Vertical.cs b/bricks/gen/newcode/Demux 3 Bit Vertical.cs index a91cf79..41997c7 100644 --- a/bricks/gen/newcode/Demux 3 Bit Vertical.cs +++ b/bricks/gen/newcode/Demux 3 Bit Vertical.cs @@ -27,18 +27,18 @@ datablock fxDtsBrickData(LogicGate_Demux3Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 12) then " @ + " if Gate.getportstate(gate, 12)~=0 then " @ " local idx = 4 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) + " @ - " (bool_to_int[Gate.getportstate(gate, 2)] * 2) + " @ - " (bool_to_int[Gate.getportstate(gate, 3)] * 4) " @ - " Gate.setportstate(gate, idx, true) " @ + " (Gate.getportstate(gate, 1) * 1) + " @ + " (Gate.getportstate(gate, 2) * 2) + " @ + " (Gate.getportstate(gate, 3) * 4) " @ + " Gate.setportstate(gate, idx, 1) " @ " if gate.laston~=idx then " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " gate.laston = idx " @ " end " @ " else " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Demux 3 Bit.cs b/bricks/gen/newcode/Demux 3 Bit.cs index 1140b8e..6969ab0 100644 --- a/bricks/gen/newcode/Demux 3 Bit.cs +++ b/bricks/gen/newcode/Demux 3 Bit.cs @@ -27,18 +27,18 @@ datablock fxDtsBrickData(LogicGate_Demux3_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 12) then " @ + " if Gate.getportstate(gate, 12)~=0 then " @ " local idx = 4 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) + " @ - " (bool_to_int[Gate.getportstate(gate, 2)] * 2) + " @ - " (bool_to_int[Gate.getportstate(gate, 3)] * 4) " @ - " Gate.setportstate(gate, idx, true) " @ + " (Gate.getportstate(gate, 1) * 1) + " @ + " (Gate.getportstate(gate, 2) * 2) + " @ + " (Gate.getportstate(gate, 3) * 4) " @ + " Gate.setportstate(gate, idx, 1) " @ " if gate.laston~=idx then " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " gate.laston = idx " @ " end " @ " else " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Demux 4 Bit Vertical.cs b/bricks/gen/newcode/Demux 4 Bit Vertical.cs index 3db60a3..b4bee6c 100644 --- a/bricks/gen/newcode/Demux 4 Bit Vertical.cs +++ b/bricks/gen/newcode/Demux 4 Bit Vertical.cs @@ -27,19 +27,19 @@ datablock fxDtsBrickData(LogicGate_Demux4Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 21) then " @ + " if Gate.getportstate(gate, 21)~=0 then " @ " local idx = 5 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) + " @ - " (bool_to_int[Gate.getportstate(gate, 2)] * 2) + " @ - " (bool_to_int[Gate.getportstate(gate, 3)] * 4) + " @ - " (bool_to_int[Gate.getportstate(gate, 4)] * 8) " @ - " Gate.setportstate(gate, idx, true) " @ + " (Gate.getportstate(gate, 1) * 1) + " @ + " (Gate.getportstate(gate, 2) * 2) + " @ + " (Gate.getportstate(gate, 3) * 4) + " @ + " (Gate.getportstate(gate, 4) * 8) " @ + " Gate.setportstate(gate, idx, 1) " @ " if gate.laston~=idx then " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " gate.laston = idx " @ " end " @ " else " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Demux 4 Bit.cs b/bricks/gen/newcode/Demux 4 Bit.cs index 5024ca9..b37208a 100644 --- a/bricks/gen/newcode/Demux 4 Bit.cs +++ b/bricks/gen/newcode/Demux 4 Bit.cs @@ -27,19 +27,19 @@ datablock fxDtsBrickData(LogicGate_Demux4_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 21) then " @ + " if Gate.getportstate(gate, 21)~=0 then " @ " local idx = 5 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) + " @ - " (bool_to_int[Gate.getportstate(gate, 2)] * 2) + " @ - " (bool_to_int[Gate.getportstate(gate, 3)] * 4) + " @ - " (bool_to_int[Gate.getportstate(gate, 4)] * 8) " @ - " Gate.setportstate(gate, idx, true) " @ + " (Gate.getportstate(gate, 1) * 1) + " @ + " (Gate.getportstate(gate, 2) * 2) + " @ + " (Gate.getportstate(gate, 3) * 4) + " @ + " (Gate.getportstate(gate, 4) * 8) " @ + " Gate.setportstate(gate, idx, 1) " @ " if gate.laston~=idx then " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " gate.laston = idx " @ " end " @ " else " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Demux 5 Bit Vertical.cs b/bricks/gen/newcode/Demux 5 Bit Vertical.cs index 981ca71..6ea2556 100644 --- a/bricks/gen/newcode/Demux 5 Bit Vertical.cs +++ b/bricks/gen/newcode/Demux 5 Bit Vertical.cs @@ -27,20 +27,20 @@ datablock fxDtsBrickData(LogicGate_Demux5Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 38) then " @ + " if Gate.getportstate(gate, 38)~=0 then " @ " local idx = 6 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) + " @ - " (bool_to_int[Gate.getportstate(gate, 2)] * 2) + " @ - " (bool_to_int[Gate.getportstate(gate, 3)] * 4) + " @ - " (bool_to_int[Gate.getportstate(gate, 4)] * 8) + " @ - " (bool_to_int[Gate.getportstate(gate, 5)] * 16) " @ - " Gate.setportstate(gate, idx, true) " @ + " (Gate.getportstate(gate, 1) * 1) + " @ + " (Gate.getportstate(gate, 2) * 2) + " @ + " (Gate.getportstate(gate, 3) * 4) + " @ + " (Gate.getportstate(gate, 4) * 8) + " @ + " (Gate.getportstate(gate, 5) * 16) " @ + " Gate.setportstate(gate, idx, 1) " @ " if gate.laston~=idx then " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " gate.laston = idx " @ " end " @ " else " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Demux 5 Bit.cs b/bricks/gen/newcode/Demux 5 Bit.cs index 66d80a0..296d7d2 100644 --- a/bricks/gen/newcode/Demux 5 Bit.cs +++ b/bricks/gen/newcode/Demux 5 Bit.cs @@ -27,20 +27,20 @@ datablock fxDtsBrickData(LogicGate_Demux5_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 38) then " @ + " if Gate.getportstate(gate, 38)~=0 then " @ " local idx = 6 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) + " @ - " (bool_to_int[Gate.getportstate(gate, 2)] * 2) + " @ - " (bool_to_int[Gate.getportstate(gate, 3)] * 4) + " @ - " (bool_to_int[Gate.getportstate(gate, 4)] * 8) + " @ - " (bool_to_int[Gate.getportstate(gate, 5)] * 16) " @ - " Gate.setportstate(gate, idx, true) " @ + " (Gate.getportstate(gate, 1) * 1) + " @ + " (Gate.getportstate(gate, 2) * 2) + " @ + " (Gate.getportstate(gate, 3) * 4) + " @ + " (Gate.getportstate(gate, 4) * 8) + " @ + " (Gate.getportstate(gate, 5) * 16) " @ + " Gate.setportstate(gate, idx, 1) " @ " if gate.laston~=idx then " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " gate.laston = idx " @ " end " @ " else " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Demux 6 Bit Vertical.cs b/bricks/gen/newcode/Demux 6 Bit Vertical.cs index 86865a3..3958beb 100644 --- a/bricks/gen/newcode/Demux 6 Bit Vertical.cs +++ b/bricks/gen/newcode/Demux 6 Bit Vertical.cs @@ -27,21 +27,21 @@ datablock fxDtsBrickData(LogicGate_Demux6Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 71) then " @ + " if Gate.getportstate(gate, 71)~=0 then " @ " local idx = 7 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) + " @ - " (bool_to_int[Gate.getportstate(gate, 2)] * 2) + " @ - " (bool_to_int[Gate.getportstate(gate, 3)] * 4) + " @ - " (bool_to_int[Gate.getportstate(gate, 4)] * 8) + " @ - " (bool_to_int[Gate.getportstate(gate, 5)] * 16) + " @ - " (bool_to_int[Gate.getportstate(gate, 6)] * 32) " @ - " Gate.setportstate(gate, idx, true) " @ + " (Gate.getportstate(gate, 1) * 1) + " @ + " (Gate.getportstate(gate, 2) * 2) + " @ + " (Gate.getportstate(gate, 3) * 4) + " @ + " (Gate.getportstate(gate, 4) * 8) + " @ + " (Gate.getportstate(gate, 5) * 16) + " @ + " (Gate.getportstate(gate, 6) * 32) " @ + " Gate.setportstate(gate, idx, 1) " @ " if gate.laston~=idx then " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " gate.laston = idx " @ " end " @ " else " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Demux 6 Bit.cs b/bricks/gen/newcode/Demux 6 Bit.cs index da6b7aa..78793c3 100644 --- a/bricks/gen/newcode/Demux 6 Bit.cs +++ b/bricks/gen/newcode/Demux 6 Bit.cs @@ -27,21 +27,21 @@ datablock fxDtsBrickData(LogicGate_Demux6_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 71) then " @ + " if Gate.getportstate(gate, 71)~=0 then " @ " local idx = 7 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) + " @ - " (bool_to_int[Gate.getportstate(gate, 2)] * 2) + " @ - " (bool_to_int[Gate.getportstate(gate, 3)] * 4) + " @ - " (bool_to_int[Gate.getportstate(gate, 4)] * 8) + " @ - " (bool_to_int[Gate.getportstate(gate, 5)] * 16) + " @ - " (bool_to_int[Gate.getportstate(gate, 6)] * 32) " @ - " Gate.setportstate(gate, idx, true) " @ + " (Gate.getportstate(gate, 1) * 1) + " @ + " (Gate.getportstate(gate, 2) * 2) + " @ + " (Gate.getportstate(gate, 3) * 4) + " @ + " (Gate.getportstate(gate, 4) * 8) + " @ + " (Gate.getportstate(gate, 5) * 16) + " @ + " (Gate.getportstate(gate, 6) * 32) " @ + " Gate.setportstate(gate, idx, 1) " @ " if gate.laston~=idx then " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " gate.laston = idx " @ " end " @ " else " @ - " Gate.setportstate(gate, gate.laston, false) " @ + " Gate.setportstate(gate, gate.laston, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 1 Bit Down.cs b/bricks/gen/newcode/Enabler 1 Bit Down.cs index d70f693..3b90bc9 100644 --- a/bricks/gen/newcode/Enabler 1 Bit Down.cs +++ b/bricks/gen/newcode/Enabler 1 Bit Down.cs @@ -23,10 +23,10 @@ datablock fxDtsBrickData(LogicGate_Enabler1BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 3) then " @ + " if Gate.getportstate(gate, 3)~=0 then " @ " Gate.setportstate(gate, 2, Gate.getportstate(gate, 1)) " @ " else " @ - " Gate.setportstate(gate, 2, false) " @ + " Gate.setportstate(gate, 2, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 1 Bit Up.cs b/bricks/gen/newcode/Enabler 1 Bit Up.cs index 6d2aa1f..c25af57 100644 --- a/bricks/gen/newcode/Enabler 1 Bit Up.cs +++ b/bricks/gen/newcode/Enabler 1 Bit Up.cs @@ -23,10 +23,10 @@ datablock fxDtsBrickData(LogicGate_Enabler1BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 3) then " @ + " if Gate.getportstate(gate, 3)~=0 then " @ " Gate.setportstate(gate, 2, Gate.getportstate(gate, 1)) " @ " else " @ - " Gate.setportstate(gate, 2, false) " @ + " Gate.setportstate(gate, 2, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 1 Bit.cs b/bricks/gen/newcode/Enabler 1 Bit.cs index 45b7fbd..3b9dc37 100644 --- a/bricks/gen/newcode/Enabler 1 Bit.cs +++ b/bricks/gen/newcode/Enabler 1 Bit.cs @@ -23,10 +23,10 @@ datablock fxDtsBrickData(LogicGate_Enabler1Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 3) then " @ + " if Gate.getportstate(gate, 3)~=0 then " @ " Gate.setportstate(gate, 2, Gate.getportstate(gate, 1)) " @ " else " @ - " Gate.setportstate(gate, 2, false) " @ + " Gate.setportstate(gate, 2, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 10 Bit Down.cs b/bricks/gen/newcode/Enabler 10 Bit Down.cs index a3b0401..96ac7ba 100644 --- a/bricks/gen/newcode/Enabler 10 Bit Down.cs +++ b/bricks/gen/newcode/Enabler 10 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler10BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 21) then " @ + " if Gate.getportstate(gate, 21)~=0 then " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 3)) " @ @@ -35,16 +35,16 @@ datablock fxDtsBrickData(LogicGate_Enabler10BitDown_Data){ " Gate.setportstate(gate, 19, Gate.getportstate(gate, 9)) " @ " Gate.setportstate(gate, 20, Gate.getportstate(gate, 10)) " @ " else " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 10 Bit Up.cs b/bricks/gen/newcode/Enabler 10 Bit Up.cs index 3218dc5..e154141 100644 --- a/bricks/gen/newcode/Enabler 10 Bit Up.cs +++ b/bricks/gen/newcode/Enabler 10 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler10BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 21) then " @ + " if Gate.getportstate(gate, 21)~=0 then " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 3)) " @ @@ -35,16 +35,16 @@ datablock fxDtsBrickData(LogicGate_Enabler10BitUp_Data){ " Gate.setportstate(gate, 19, Gate.getportstate(gate, 9)) " @ " Gate.setportstate(gate, 20, Gate.getportstate(gate, 10)) " @ " else " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 10 Bit.cs b/bricks/gen/newcode/Enabler 10 Bit.cs index ca7754a..2e97246 100644 --- a/bricks/gen/newcode/Enabler 10 Bit.cs +++ b/bricks/gen/newcode/Enabler 10 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler10Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 21) then " @ + " if Gate.getportstate(gate, 21)~=0 then " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 3)) " @ @@ -35,16 +35,16 @@ datablock fxDtsBrickData(LogicGate_Enabler10Bit_Data){ " Gate.setportstate(gate, 19, Gate.getportstate(gate, 9)) " @ " Gate.setportstate(gate, 20, Gate.getportstate(gate, 10)) " @ " else " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 11 Bit Down.cs b/bricks/gen/newcode/Enabler 11 Bit Down.cs index 0b46670..f5bfffd 100644 --- a/bricks/gen/newcode/Enabler 11 Bit Down.cs +++ b/bricks/gen/newcode/Enabler 11 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler11BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 23) then " @ + " if Gate.getportstate(gate, 23)~=0 then " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 3)) " @ @@ -36,17 +36,17 @@ datablock fxDtsBrickData(LogicGate_Enabler11BitDown_Data){ " Gate.setportstate(gate, 21, Gate.getportstate(gate, 10)) " @ " Gate.setportstate(gate, 22, Gate.getportstate(gate, 11)) " @ " else " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 11 Bit Up.cs b/bricks/gen/newcode/Enabler 11 Bit Up.cs index 263607f..da0d7ae 100644 --- a/bricks/gen/newcode/Enabler 11 Bit Up.cs +++ b/bricks/gen/newcode/Enabler 11 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler11BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 23) then " @ + " if Gate.getportstate(gate, 23)~=0 then " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 3)) " @ @@ -36,17 +36,17 @@ datablock fxDtsBrickData(LogicGate_Enabler11BitUp_Data){ " Gate.setportstate(gate, 21, Gate.getportstate(gate, 10)) " @ " Gate.setportstate(gate, 22, Gate.getportstate(gate, 11)) " @ " else " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 11 Bit.cs b/bricks/gen/newcode/Enabler 11 Bit.cs index 29b862f..a270f10 100644 --- a/bricks/gen/newcode/Enabler 11 Bit.cs +++ b/bricks/gen/newcode/Enabler 11 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler11Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 23) then " @ + " if Gate.getportstate(gate, 23)~=0 then " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 3)) " @ @@ -36,17 +36,17 @@ datablock fxDtsBrickData(LogicGate_Enabler11Bit_Data){ " Gate.setportstate(gate, 21, Gate.getportstate(gate, 10)) " @ " Gate.setportstate(gate, 22, Gate.getportstate(gate, 11)) " @ " else " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 12 Bit Down.cs b/bricks/gen/newcode/Enabler 12 Bit Down.cs index 95168ef..ac9eefd 100644 --- a/bricks/gen/newcode/Enabler 12 Bit Down.cs +++ b/bricks/gen/newcode/Enabler 12 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler12BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 25) then " @ + " if Gate.getportstate(gate, 25)~=0 then " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 3)) " @ @@ -37,18 +37,18 @@ datablock fxDtsBrickData(LogicGate_Enabler12BitDown_Data){ " Gate.setportstate(gate, 23, Gate.getportstate(gate, 11)) " @ " Gate.setportstate(gate, 24, Gate.getportstate(gate, 12)) " @ " else " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 12 Bit Up.cs b/bricks/gen/newcode/Enabler 12 Bit Up.cs index d4e599e..076f8e4 100644 --- a/bricks/gen/newcode/Enabler 12 Bit Up.cs +++ b/bricks/gen/newcode/Enabler 12 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler12BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 25) then " @ + " if Gate.getportstate(gate, 25)~=0 then " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 3)) " @ @@ -37,18 +37,18 @@ datablock fxDtsBrickData(LogicGate_Enabler12BitUp_Data){ " Gate.setportstate(gate, 23, Gate.getportstate(gate, 11)) " @ " Gate.setportstate(gate, 24, Gate.getportstate(gate, 12)) " @ " else " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 12 Bit.cs b/bricks/gen/newcode/Enabler 12 Bit.cs index cdb8f7e..00bc7ca 100644 --- a/bricks/gen/newcode/Enabler 12 Bit.cs +++ b/bricks/gen/newcode/Enabler 12 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler12Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 25) then " @ + " if Gate.getportstate(gate, 25)~=0 then " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 3)) " @ @@ -37,18 +37,18 @@ datablock fxDtsBrickData(LogicGate_Enabler12Bit_Data){ " Gate.setportstate(gate, 23, Gate.getportstate(gate, 11)) " @ " Gate.setportstate(gate, 24, Gate.getportstate(gate, 12)) " @ " else " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 13 Bit Down.cs b/bricks/gen/newcode/Enabler 13 Bit Down.cs index 79a45e8..5035ac5 100644 --- a/bricks/gen/newcode/Enabler 13 Bit Down.cs +++ b/bricks/gen/newcode/Enabler 13 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler13BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 27) then " @ + " if Gate.getportstate(gate, 27)~=0 then " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 3)) " @ @@ -38,19 +38,19 @@ datablock fxDtsBrickData(LogicGate_Enabler13BitDown_Data){ " Gate.setportstate(gate, 25, Gate.getportstate(gate, 12)) " @ " Gate.setportstate(gate, 26, Gate.getportstate(gate, 13)) " @ " else " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 13 Bit Up.cs b/bricks/gen/newcode/Enabler 13 Bit Up.cs index 88af9ab..6e1bc43 100644 --- a/bricks/gen/newcode/Enabler 13 Bit Up.cs +++ b/bricks/gen/newcode/Enabler 13 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler13BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 27) then " @ + " if Gate.getportstate(gate, 27)~=0 then " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 3)) " @ @@ -38,19 +38,19 @@ datablock fxDtsBrickData(LogicGate_Enabler13BitUp_Data){ " Gate.setportstate(gate, 25, Gate.getportstate(gate, 12)) " @ " Gate.setportstate(gate, 26, Gate.getportstate(gate, 13)) " @ " else " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 13 Bit.cs b/bricks/gen/newcode/Enabler 13 Bit.cs index 576b54a..06556c2 100644 --- a/bricks/gen/newcode/Enabler 13 Bit.cs +++ b/bricks/gen/newcode/Enabler 13 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler13Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 27) then " @ + " if Gate.getportstate(gate, 27)~=0 then " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 3)) " @ @@ -38,19 +38,19 @@ datablock fxDtsBrickData(LogicGate_Enabler13Bit_Data){ " Gate.setportstate(gate, 25, Gate.getportstate(gate, 12)) " @ " Gate.setportstate(gate, 26, Gate.getportstate(gate, 13)) " @ " else " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 14 Bit Down.cs b/bricks/gen/newcode/Enabler 14 Bit Down.cs index f19ee25..b26b8db 100644 --- a/bricks/gen/newcode/Enabler 14 Bit Down.cs +++ b/bricks/gen/newcode/Enabler 14 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler14BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 29) then " @ + " if Gate.getportstate(gate, 29)~=0 then " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 3)) " @ @@ -39,20 +39,20 @@ datablock fxDtsBrickData(LogicGate_Enabler14BitDown_Data){ " Gate.setportstate(gate, 27, Gate.getportstate(gate, 13)) " @ " Gate.setportstate(gate, 28, Gate.getportstate(gate, 14)) " @ " else " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 14 Bit Up.cs b/bricks/gen/newcode/Enabler 14 Bit Up.cs index ed79e9c..c663025 100644 --- a/bricks/gen/newcode/Enabler 14 Bit Up.cs +++ b/bricks/gen/newcode/Enabler 14 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler14BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 29) then " @ + " if Gate.getportstate(gate, 29)~=0 then " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 3)) " @ @@ -39,20 +39,20 @@ datablock fxDtsBrickData(LogicGate_Enabler14BitUp_Data){ " Gate.setportstate(gate, 27, Gate.getportstate(gate, 13)) " @ " Gate.setportstate(gate, 28, Gate.getportstate(gate, 14)) " @ " else " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 14 Bit.cs b/bricks/gen/newcode/Enabler 14 Bit.cs index 14ca8ca..01624cd 100644 --- a/bricks/gen/newcode/Enabler 14 Bit.cs +++ b/bricks/gen/newcode/Enabler 14 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler14Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 29) then " @ + " if Gate.getportstate(gate, 29)~=0 then " @ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 3)) " @ @@ -39,20 +39,20 @@ datablock fxDtsBrickData(LogicGate_Enabler14Bit_Data){ " Gate.setportstate(gate, 27, Gate.getportstate(gate, 13)) " @ " Gate.setportstate(gate, 28, Gate.getportstate(gate, 14)) " @ " else " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 15 Bit Down.cs b/bricks/gen/newcode/Enabler 15 Bit Down.cs index 490e5a6..ec8b39c 100644 --- a/bricks/gen/newcode/Enabler 15 Bit Down.cs +++ b/bricks/gen/newcode/Enabler 15 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler15BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 31) then " @ + " if Gate.getportstate(gate, 31)~=0 then " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 3)) " @ @@ -40,21 +40,21 @@ datablock fxDtsBrickData(LogicGate_Enabler15BitDown_Data){ " Gate.setportstate(gate, 29, Gate.getportstate(gate, 14)) " @ " Gate.setportstate(gate, 30, Gate.getportstate(gate, 15)) " @ " else " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ - " Gate.setportstate(gate, 29, false) " @ - " Gate.setportstate(gate, 30, false) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ + " Gate.setportstate(gate, 29, 0) " @ + " Gate.setportstate(gate, 30, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 15 Bit Up.cs b/bricks/gen/newcode/Enabler 15 Bit Up.cs index aab1eb2..e442a27 100644 --- a/bricks/gen/newcode/Enabler 15 Bit Up.cs +++ b/bricks/gen/newcode/Enabler 15 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler15BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 31) then " @ + " if Gate.getportstate(gate, 31)~=0 then " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 3)) " @ @@ -40,21 +40,21 @@ datablock fxDtsBrickData(LogicGate_Enabler15BitUp_Data){ " Gate.setportstate(gate, 29, Gate.getportstate(gate, 14)) " @ " Gate.setportstate(gate, 30, Gate.getportstate(gate, 15)) " @ " else " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ - " Gate.setportstate(gate, 29, false) " @ - " Gate.setportstate(gate, 30, false) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ + " Gate.setportstate(gate, 29, 0) " @ + " Gate.setportstate(gate, 30, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 15 Bit.cs b/bricks/gen/newcode/Enabler 15 Bit.cs index c76d8bb..a984711 100644 --- a/bricks/gen/newcode/Enabler 15 Bit.cs +++ b/bricks/gen/newcode/Enabler 15 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler15Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 31) then " @ + " if Gate.getportstate(gate, 31)~=0 then " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 3)) " @ @@ -40,21 +40,21 @@ datablock fxDtsBrickData(LogicGate_Enabler15Bit_Data){ " Gate.setportstate(gate, 29, Gate.getportstate(gate, 14)) " @ " Gate.setportstate(gate, 30, Gate.getportstate(gate, 15)) " @ " else " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ - " Gate.setportstate(gate, 29, false) " @ - " Gate.setportstate(gate, 30, false) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ + " Gate.setportstate(gate, 29, 0) " @ + " Gate.setportstate(gate, 30, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 16 Bit Down.cs b/bricks/gen/newcode/Enabler 16 Bit Down.cs index 7e1a983..20a621f 100644 --- a/bricks/gen/newcode/Enabler 16 Bit Down.cs +++ b/bricks/gen/newcode/Enabler 16 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler16BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 33) then " @ + " if Gate.getportstate(gate, 33)~=0 then " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 19, Gate.getportstate(gate, 3)) " @ @@ -41,22 +41,22 @@ datablock fxDtsBrickData(LogicGate_Enabler16BitDown_Data){ " Gate.setportstate(gate, 31, Gate.getportstate(gate, 15)) " @ " Gate.setportstate(gate, 32, Gate.getportstate(gate, 16)) " @ " else " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ - " Gate.setportstate(gate, 29, false) " @ - " Gate.setportstate(gate, 30, false) " @ - " Gate.setportstate(gate, 31, false) " @ - " Gate.setportstate(gate, 32, false) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ + " Gate.setportstate(gate, 29, 0) " @ + " Gate.setportstate(gate, 30, 0) " @ + " Gate.setportstate(gate, 31, 0) " @ + " Gate.setportstate(gate, 32, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 16 Bit Up.cs b/bricks/gen/newcode/Enabler 16 Bit Up.cs index 7f74224..3854f55 100644 --- a/bricks/gen/newcode/Enabler 16 Bit Up.cs +++ b/bricks/gen/newcode/Enabler 16 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler16BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 33) then " @ + " if Gate.getportstate(gate, 33)~=0 then " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 19, Gate.getportstate(gate, 3)) " @ @@ -41,22 +41,22 @@ datablock fxDtsBrickData(LogicGate_Enabler16BitUp_Data){ " Gate.setportstate(gate, 31, Gate.getportstate(gate, 15)) " @ " Gate.setportstate(gate, 32, Gate.getportstate(gate, 16)) " @ " else " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ - " Gate.setportstate(gate, 29, false) " @ - " Gate.setportstate(gate, 30, false) " @ - " Gate.setportstate(gate, 31, false) " @ - " Gate.setportstate(gate, 32, false) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ + " Gate.setportstate(gate, 29, 0) " @ + " Gate.setportstate(gate, 30, 0) " @ + " Gate.setportstate(gate, 31, 0) " @ + " Gate.setportstate(gate, 32, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 16 Bit.cs b/bricks/gen/newcode/Enabler 16 Bit.cs index 47e6f6c..e626f5e 100644 --- a/bricks/gen/newcode/Enabler 16 Bit.cs +++ b/bricks/gen/newcode/Enabler 16 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler16Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 33) then " @ + " if Gate.getportstate(gate, 33)~=0 then " @ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 19, Gate.getportstate(gate, 3)) " @ @@ -41,22 +41,22 @@ datablock fxDtsBrickData(LogicGate_Enabler16Bit_Data){ " Gate.setportstate(gate, 31, Gate.getportstate(gate, 15)) " @ " Gate.setportstate(gate, 32, Gate.getportstate(gate, 16)) " @ " else " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ - " Gate.setportstate(gate, 19, false) " @ - " Gate.setportstate(gate, 20, false) " @ - " Gate.setportstate(gate, 21, false) " @ - " Gate.setportstate(gate, 22, false) " @ - " Gate.setportstate(gate, 23, false) " @ - " Gate.setportstate(gate, 24, false) " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ - " Gate.setportstate(gate, 29, false) " @ - " Gate.setportstate(gate, 30, false) " @ - " Gate.setportstate(gate, 31, false) " @ - " Gate.setportstate(gate, 32, false) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ + " Gate.setportstate(gate, 19, 0) " @ + " Gate.setportstate(gate, 20, 0) " @ + " Gate.setportstate(gate, 21, 0) " @ + " Gate.setportstate(gate, 22, 0) " @ + " Gate.setportstate(gate, 23, 0) " @ + " Gate.setportstate(gate, 24, 0) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ + " Gate.setportstate(gate, 29, 0) " @ + " Gate.setportstate(gate, 30, 0) " @ + " Gate.setportstate(gate, 31, 0) " @ + " Gate.setportstate(gate, 32, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 2 Bit Down.cs b/bricks/gen/newcode/Enabler 2 Bit Down.cs index c71f44e..f5bfe93 100644 --- a/bricks/gen/newcode/Enabler 2 Bit Down.cs +++ b/bricks/gen/newcode/Enabler 2 Bit Down.cs @@ -23,12 +23,12 @@ datablock fxDtsBrickData(LogicGate_Enabler2BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 5) then " @ + " if Gate.getportstate(gate, 5)~=0 then " @ " Gate.setportstate(gate, 3, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 4, Gate.getportstate(gate, 2)) " @ " else " @ - " Gate.setportstate(gate, 3, false) " @ - " Gate.setportstate(gate, 4, false) " @ + " Gate.setportstate(gate, 3, 0) " @ + " Gate.setportstate(gate, 4, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 2 Bit Up.cs b/bricks/gen/newcode/Enabler 2 Bit Up.cs index 83c9cb7..7ae1d40 100644 --- a/bricks/gen/newcode/Enabler 2 Bit Up.cs +++ b/bricks/gen/newcode/Enabler 2 Bit Up.cs @@ -23,12 +23,12 @@ datablock fxDtsBrickData(LogicGate_Enabler2BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 5) then " @ + " if Gate.getportstate(gate, 5)~=0 then " @ " Gate.setportstate(gate, 3, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 4, Gate.getportstate(gate, 2)) " @ " else " @ - " Gate.setportstate(gate, 3, false) " @ - " Gate.setportstate(gate, 4, false) " @ + " Gate.setportstate(gate, 3, 0) " @ + " Gate.setportstate(gate, 4, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 2 Bit.cs b/bricks/gen/newcode/Enabler 2 Bit.cs index 6305c74..4ea5bfa 100644 --- a/bricks/gen/newcode/Enabler 2 Bit.cs +++ b/bricks/gen/newcode/Enabler 2 Bit.cs @@ -23,12 +23,12 @@ datablock fxDtsBrickData(LogicGate_Enabler2Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 5) then " @ + " if Gate.getportstate(gate, 5)~=0 then " @ " Gate.setportstate(gate, 3, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 4, Gate.getportstate(gate, 2)) " @ " else " @ - " Gate.setportstate(gate, 3, false) " @ - " Gate.setportstate(gate, 4, false) " @ + " Gate.setportstate(gate, 3, 0) " @ + " Gate.setportstate(gate, 4, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 24 Bit Down.cs b/bricks/gen/newcode/Enabler 24 Bit Down.cs index 8ce990f..9bb5d9d 100644 --- a/bricks/gen/newcode/Enabler 24 Bit Down.cs +++ b/bricks/gen/newcode/Enabler 24 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler24BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 49) then " @ + " if Gate.getportstate(gate, 49)~=0 then " @ " Gate.setportstate(gate, 25, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 26, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 27, Gate.getportstate(gate, 3)) " @ @@ -49,30 +49,30 @@ datablock fxDtsBrickData(LogicGate_Enabler24BitDown_Data){ " Gate.setportstate(gate, 47, Gate.getportstate(gate, 23)) " @ " Gate.setportstate(gate, 48, Gate.getportstate(gate, 24)) " @ " else " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ - " Gate.setportstate(gate, 29, false) " @ - " Gate.setportstate(gate, 30, false) " @ - " Gate.setportstate(gate, 31, false) " @ - " Gate.setportstate(gate, 32, false) " @ - " Gate.setportstate(gate, 33, false) " @ - " Gate.setportstate(gate, 34, false) " @ - " Gate.setportstate(gate, 35, false) " @ - " Gate.setportstate(gate, 36, false) " @ - " Gate.setportstate(gate, 37, false) " @ - " Gate.setportstate(gate, 38, false) " @ - " Gate.setportstate(gate, 39, false) " @ - " Gate.setportstate(gate, 40, false) " @ - " Gate.setportstate(gate, 41, false) " @ - " Gate.setportstate(gate, 42, false) " @ - " Gate.setportstate(gate, 43, false) " @ - " Gate.setportstate(gate, 44, false) " @ - " Gate.setportstate(gate, 45, false) " @ - " Gate.setportstate(gate, 46, false) " @ - " Gate.setportstate(gate, 47, false) " @ - " Gate.setportstate(gate, 48, false) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ + " Gate.setportstate(gate, 29, 0) " @ + " Gate.setportstate(gate, 30, 0) " @ + " Gate.setportstate(gate, 31, 0) " @ + " Gate.setportstate(gate, 32, 0) " @ + " Gate.setportstate(gate, 33, 0) " @ + " Gate.setportstate(gate, 34, 0) " @ + " Gate.setportstate(gate, 35, 0) " @ + " Gate.setportstate(gate, 36, 0) " @ + " Gate.setportstate(gate, 37, 0) " @ + " Gate.setportstate(gate, 38, 0) " @ + " Gate.setportstate(gate, 39, 0) " @ + " Gate.setportstate(gate, 40, 0) " @ + " Gate.setportstate(gate, 41, 0) " @ + " Gate.setportstate(gate, 42, 0) " @ + " Gate.setportstate(gate, 43, 0) " @ + " Gate.setportstate(gate, 44, 0) " @ + " Gate.setportstate(gate, 45, 0) " @ + " Gate.setportstate(gate, 46, 0) " @ + " Gate.setportstate(gate, 47, 0) " @ + " Gate.setportstate(gate, 48, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 24 Bit Up.cs b/bricks/gen/newcode/Enabler 24 Bit Up.cs index 1eb5972..b2a6626 100644 --- a/bricks/gen/newcode/Enabler 24 Bit Up.cs +++ b/bricks/gen/newcode/Enabler 24 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler24BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 49) then " @ + " if Gate.getportstate(gate, 49)~=0 then " @ " Gate.setportstate(gate, 25, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 26, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 27, Gate.getportstate(gate, 3)) " @ @@ -49,30 +49,30 @@ datablock fxDtsBrickData(LogicGate_Enabler24BitUp_Data){ " Gate.setportstate(gate, 47, Gate.getportstate(gate, 23)) " @ " Gate.setportstate(gate, 48, Gate.getportstate(gate, 24)) " @ " else " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ - " Gate.setportstate(gate, 29, false) " @ - " Gate.setportstate(gate, 30, false) " @ - " Gate.setportstate(gate, 31, false) " @ - " Gate.setportstate(gate, 32, false) " @ - " Gate.setportstate(gate, 33, false) " @ - " Gate.setportstate(gate, 34, false) " @ - " Gate.setportstate(gate, 35, false) " @ - " Gate.setportstate(gate, 36, false) " @ - " Gate.setportstate(gate, 37, false) " @ - " Gate.setportstate(gate, 38, false) " @ - " Gate.setportstate(gate, 39, false) " @ - " Gate.setportstate(gate, 40, false) " @ - " Gate.setportstate(gate, 41, false) " @ - " Gate.setportstate(gate, 42, false) " @ - " Gate.setportstate(gate, 43, false) " @ - " Gate.setportstate(gate, 44, false) " @ - " Gate.setportstate(gate, 45, false) " @ - " Gate.setportstate(gate, 46, false) " @ - " Gate.setportstate(gate, 47, false) " @ - " Gate.setportstate(gate, 48, false) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ + " Gate.setportstate(gate, 29, 0) " @ + " Gate.setportstate(gate, 30, 0) " @ + " Gate.setportstate(gate, 31, 0) " @ + " Gate.setportstate(gate, 32, 0) " @ + " Gate.setportstate(gate, 33, 0) " @ + " Gate.setportstate(gate, 34, 0) " @ + " Gate.setportstate(gate, 35, 0) " @ + " Gate.setportstate(gate, 36, 0) " @ + " Gate.setportstate(gate, 37, 0) " @ + " Gate.setportstate(gate, 38, 0) " @ + " Gate.setportstate(gate, 39, 0) " @ + " Gate.setportstate(gate, 40, 0) " @ + " Gate.setportstate(gate, 41, 0) " @ + " Gate.setportstate(gate, 42, 0) " @ + " Gate.setportstate(gate, 43, 0) " @ + " Gate.setportstate(gate, 44, 0) " @ + " Gate.setportstate(gate, 45, 0) " @ + " Gate.setportstate(gate, 46, 0) " @ + " Gate.setportstate(gate, 47, 0) " @ + " Gate.setportstate(gate, 48, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 24 Bit.cs b/bricks/gen/newcode/Enabler 24 Bit.cs index fd9303c..4e82eb6 100644 --- a/bricks/gen/newcode/Enabler 24 Bit.cs +++ b/bricks/gen/newcode/Enabler 24 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler24Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 49) then " @ + " if Gate.getportstate(gate, 49)~=0 then " @ " Gate.setportstate(gate, 25, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 26, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 27, Gate.getportstate(gate, 3)) " @ @@ -49,30 +49,30 @@ datablock fxDtsBrickData(LogicGate_Enabler24Bit_Data){ " Gate.setportstate(gate, 47, Gate.getportstate(gate, 23)) " @ " Gate.setportstate(gate, 48, Gate.getportstate(gate, 24)) " @ " else " @ - " Gate.setportstate(gate, 25, false) " @ - " Gate.setportstate(gate, 26, false) " @ - " Gate.setportstate(gate, 27, false) " @ - " Gate.setportstate(gate, 28, false) " @ - " Gate.setportstate(gate, 29, false) " @ - " Gate.setportstate(gate, 30, false) " @ - " Gate.setportstate(gate, 31, false) " @ - " Gate.setportstate(gate, 32, false) " @ - " Gate.setportstate(gate, 33, false) " @ - " Gate.setportstate(gate, 34, false) " @ - " Gate.setportstate(gate, 35, false) " @ - " Gate.setportstate(gate, 36, false) " @ - " Gate.setportstate(gate, 37, false) " @ - " Gate.setportstate(gate, 38, false) " @ - " Gate.setportstate(gate, 39, false) " @ - " Gate.setportstate(gate, 40, false) " @ - " Gate.setportstate(gate, 41, false) " @ - " Gate.setportstate(gate, 42, false) " @ - " Gate.setportstate(gate, 43, false) " @ - " Gate.setportstate(gate, 44, false) " @ - " Gate.setportstate(gate, 45, false) " @ - " Gate.setportstate(gate, 46, false) " @ - " Gate.setportstate(gate, 47, false) " @ - " Gate.setportstate(gate, 48, false) " @ + " Gate.setportstate(gate, 25, 0) " @ + " Gate.setportstate(gate, 26, 0) " @ + " Gate.setportstate(gate, 27, 0) " @ + " Gate.setportstate(gate, 28, 0) " @ + " Gate.setportstate(gate, 29, 0) " @ + " Gate.setportstate(gate, 30, 0) " @ + " Gate.setportstate(gate, 31, 0) " @ + " Gate.setportstate(gate, 32, 0) " @ + " Gate.setportstate(gate, 33, 0) " @ + " Gate.setportstate(gate, 34, 0) " @ + " Gate.setportstate(gate, 35, 0) " @ + " Gate.setportstate(gate, 36, 0) " @ + " Gate.setportstate(gate, 37, 0) " @ + " Gate.setportstate(gate, 38, 0) " @ + " Gate.setportstate(gate, 39, 0) " @ + " Gate.setportstate(gate, 40, 0) " @ + " Gate.setportstate(gate, 41, 0) " @ + " Gate.setportstate(gate, 42, 0) " @ + " Gate.setportstate(gate, 43, 0) " @ + " Gate.setportstate(gate, 44, 0) " @ + " Gate.setportstate(gate, 45, 0) " @ + " Gate.setportstate(gate, 46, 0) " @ + " Gate.setportstate(gate, 47, 0) " @ + " Gate.setportstate(gate, 48, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 3 Bit Down.cs b/bricks/gen/newcode/Enabler 3 Bit Down.cs index c968441..c8c519f 100644 --- a/bricks/gen/newcode/Enabler 3 Bit Down.cs +++ b/bricks/gen/newcode/Enabler 3 Bit Down.cs @@ -23,14 +23,14 @@ datablock fxDtsBrickData(LogicGate_Enabler3BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 7) then " @ + " if Gate.getportstate(gate, 7)~=0 then " @ " Gate.setportstate(gate, 4, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 5, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 3)) " @ " else " @ - " Gate.setportstate(gate, 4, false) " @ - " Gate.setportstate(gate, 5, false) " @ - " Gate.setportstate(gate, 6, false) " @ + " Gate.setportstate(gate, 4, 0) " @ + " Gate.setportstate(gate, 5, 0) " @ + " Gate.setportstate(gate, 6, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 3 Bit Up.cs b/bricks/gen/newcode/Enabler 3 Bit Up.cs index 0f7c95f..7aba118 100644 --- a/bricks/gen/newcode/Enabler 3 Bit Up.cs +++ b/bricks/gen/newcode/Enabler 3 Bit Up.cs @@ -23,14 +23,14 @@ datablock fxDtsBrickData(LogicGate_Enabler3BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 7) then " @ + " if Gate.getportstate(gate, 7)~=0 then " @ " Gate.setportstate(gate, 4, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 5, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 3)) " @ " else " @ - " Gate.setportstate(gate, 4, false) " @ - " Gate.setportstate(gate, 5, false) " @ - " Gate.setportstate(gate, 6, false) " @ + " Gate.setportstate(gate, 4, 0) " @ + " Gate.setportstate(gate, 5, 0) " @ + " Gate.setportstate(gate, 6, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 3 Bit.cs b/bricks/gen/newcode/Enabler 3 Bit.cs index 55af542..99137b3 100644 --- a/bricks/gen/newcode/Enabler 3 Bit.cs +++ b/bricks/gen/newcode/Enabler 3 Bit.cs @@ -23,14 +23,14 @@ datablock fxDtsBrickData(LogicGate_Enabler3Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 7) then " @ + " if Gate.getportstate(gate, 7)~=0 then " @ " Gate.setportstate(gate, 4, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 5, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 3)) " @ " else " @ - " Gate.setportstate(gate, 4, false) " @ - " Gate.setportstate(gate, 5, false) " @ - " Gate.setportstate(gate, 6, false) " @ + " Gate.setportstate(gate, 4, 0) " @ + " Gate.setportstate(gate, 5, 0) " @ + " Gate.setportstate(gate, 6, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 32 Bit Down.cs b/bricks/gen/newcode/Enabler 32 Bit Down.cs index eaceeb5..e628ed9 100644 --- a/bricks/gen/newcode/Enabler 32 Bit Down.cs +++ b/bricks/gen/newcode/Enabler 32 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler32BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 65) then " @ + " if Gate.getportstate(gate, 65)~=0 then " @ " Gate.setportstate(gate, 33, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 34, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 35, Gate.getportstate(gate, 3)) " @ @@ -57,38 +57,38 @@ datablock fxDtsBrickData(LogicGate_Enabler32BitDown_Data){ " Gate.setportstate(gate, 63, Gate.getportstate(gate, 31)) " @ " Gate.setportstate(gate, 64, Gate.getportstate(gate, 32)) " @ " else " @ - " Gate.setportstate(gate, 33, false) " @ - " Gate.setportstate(gate, 34, false) " @ - " Gate.setportstate(gate, 35, false) " @ - " Gate.setportstate(gate, 36, false) " @ - " Gate.setportstate(gate, 37, false) " @ - " Gate.setportstate(gate, 38, false) " @ - " Gate.setportstate(gate, 39, false) " @ - " Gate.setportstate(gate, 40, false) " @ - " Gate.setportstate(gate, 41, false) " @ - " Gate.setportstate(gate, 42, false) " @ - " Gate.setportstate(gate, 43, false) " @ - " Gate.setportstate(gate, 44, false) " @ - " Gate.setportstate(gate, 45, false) " @ - " Gate.setportstate(gate, 46, false) " @ - " Gate.setportstate(gate, 47, false) " @ - " Gate.setportstate(gate, 48, false) " @ - " Gate.setportstate(gate, 49, false) " @ - " Gate.setportstate(gate, 50, false) " @ - " Gate.setportstate(gate, 51, false) " @ - " Gate.setportstate(gate, 52, false) " @ - " Gate.setportstate(gate, 53, false) " @ - " Gate.setportstate(gate, 54, false) " @ - " Gate.setportstate(gate, 55, false) " @ - " Gate.setportstate(gate, 56, false) " @ - " Gate.setportstate(gate, 57, false) " @ - " Gate.setportstate(gate, 58, false) " @ - " Gate.setportstate(gate, 59, false) " @ - " Gate.setportstate(gate, 60, false) " @ - " Gate.setportstate(gate, 61, false) " @ - " Gate.setportstate(gate, 62, false) " @ - " Gate.setportstate(gate, 63, false) " @ - " Gate.setportstate(gate, 64, false) " @ + " Gate.setportstate(gate, 33, 0) " @ + " Gate.setportstate(gate, 34, 0) " @ + " Gate.setportstate(gate, 35, 0) " @ + " Gate.setportstate(gate, 36, 0) " @ + " Gate.setportstate(gate, 37, 0) " @ + " Gate.setportstate(gate, 38, 0) " @ + " Gate.setportstate(gate, 39, 0) " @ + " Gate.setportstate(gate, 40, 0) " @ + " Gate.setportstate(gate, 41, 0) " @ + " Gate.setportstate(gate, 42, 0) " @ + " Gate.setportstate(gate, 43, 0) " @ + " Gate.setportstate(gate, 44, 0) " @ + " Gate.setportstate(gate, 45, 0) " @ + " Gate.setportstate(gate, 46, 0) " @ + " Gate.setportstate(gate, 47, 0) " @ + " Gate.setportstate(gate, 48, 0) " @ + " Gate.setportstate(gate, 49, 0) " @ + " Gate.setportstate(gate, 50, 0) " @ + " Gate.setportstate(gate, 51, 0) " @ + " Gate.setportstate(gate, 52, 0) " @ + " Gate.setportstate(gate, 53, 0) " @ + " Gate.setportstate(gate, 54, 0) " @ + " Gate.setportstate(gate, 55, 0) " @ + " Gate.setportstate(gate, 56, 0) " @ + " Gate.setportstate(gate, 57, 0) " @ + " Gate.setportstate(gate, 58, 0) " @ + " Gate.setportstate(gate, 59, 0) " @ + " Gate.setportstate(gate, 60, 0) " @ + " Gate.setportstate(gate, 61, 0) " @ + " Gate.setportstate(gate, 62, 0) " @ + " Gate.setportstate(gate, 63, 0) " @ + " Gate.setportstate(gate, 64, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 32 Bit Up.cs b/bricks/gen/newcode/Enabler 32 Bit Up.cs index 8a87a14..dc2bab3 100644 --- a/bricks/gen/newcode/Enabler 32 Bit Up.cs +++ b/bricks/gen/newcode/Enabler 32 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler32BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 65) then " @ + " if Gate.getportstate(gate, 65)~=0 then " @ " Gate.setportstate(gate, 33, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 34, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 35, Gate.getportstate(gate, 3)) " @ @@ -57,38 +57,38 @@ datablock fxDtsBrickData(LogicGate_Enabler32BitUp_Data){ " Gate.setportstate(gate, 63, Gate.getportstate(gate, 31)) " @ " Gate.setportstate(gate, 64, Gate.getportstate(gate, 32)) " @ " else " @ - " Gate.setportstate(gate, 33, false) " @ - " Gate.setportstate(gate, 34, false) " @ - " Gate.setportstate(gate, 35, false) " @ - " Gate.setportstate(gate, 36, false) " @ - " Gate.setportstate(gate, 37, false) " @ - " Gate.setportstate(gate, 38, false) " @ - " Gate.setportstate(gate, 39, false) " @ - " Gate.setportstate(gate, 40, false) " @ - " Gate.setportstate(gate, 41, false) " @ - " Gate.setportstate(gate, 42, false) " @ - " Gate.setportstate(gate, 43, false) " @ - " Gate.setportstate(gate, 44, false) " @ - " Gate.setportstate(gate, 45, false) " @ - " Gate.setportstate(gate, 46, false) " @ - " Gate.setportstate(gate, 47, false) " @ - " Gate.setportstate(gate, 48, false) " @ - " Gate.setportstate(gate, 49, false) " @ - " Gate.setportstate(gate, 50, false) " @ - " Gate.setportstate(gate, 51, false) " @ - " Gate.setportstate(gate, 52, false) " @ - " Gate.setportstate(gate, 53, false) " @ - " Gate.setportstate(gate, 54, false) " @ - " Gate.setportstate(gate, 55, false) " @ - " Gate.setportstate(gate, 56, false) " @ - " Gate.setportstate(gate, 57, false) " @ - " Gate.setportstate(gate, 58, false) " @ - " Gate.setportstate(gate, 59, false) " @ - " Gate.setportstate(gate, 60, false) " @ - " Gate.setportstate(gate, 61, false) " @ - " Gate.setportstate(gate, 62, false) " @ - " Gate.setportstate(gate, 63, false) " @ - " Gate.setportstate(gate, 64, false) " @ + " Gate.setportstate(gate, 33, 0) " @ + " Gate.setportstate(gate, 34, 0) " @ + " Gate.setportstate(gate, 35, 0) " @ + " Gate.setportstate(gate, 36, 0) " @ + " Gate.setportstate(gate, 37, 0) " @ + " Gate.setportstate(gate, 38, 0) " @ + " Gate.setportstate(gate, 39, 0) " @ + " Gate.setportstate(gate, 40, 0) " @ + " Gate.setportstate(gate, 41, 0) " @ + " Gate.setportstate(gate, 42, 0) " @ + " Gate.setportstate(gate, 43, 0) " @ + " Gate.setportstate(gate, 44, 0) " @ + " Gate.setportstate(gate, 45, 0) " @ + " Gate.setportstate(gate, 46, 0) " @ + " Gate.setportstate(gate, 47, 0) " @ + " Gate.setportstate(gate, 48, 0) " @ + " Gate.setportstate(gate, 49, 0) " @ + " Gate.setportstate(gate, 50, 0) " @ + " Gate.setportstate(gate, 51, 0) " @ + " Gate.setportstate(gate, 52, 0) " @ + " Gate.setportstate(gate, 53, 0) " @ + " Gate.setportstate(gate, 54, 0) " @ + " Gate.setportstate(gate, 55, 0) " @ + " Gate.setportstate(gate, 56, 0) " @ + " Gate.setportstate(gate, 57, 0) " @ + " Gate.setportstate(gate, 58, 0) " @ + " Gate.setportstate(gate, 59, 0) " @ + " Gate.setportstate(gate, 60, 0) " @ + " Gate.setportstate(gate, 61, 0) " @ + " Gate.setportstate(gate, 62, 0) " @ + " Gate.setportstate(gate, 63, 0) " @ + " Gate.setportstate(gate, 64, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 32 Bit.cs b/bricks/gen/newcode/Enabler 32 Bit.cs index 6c7ecc0..7464bb9 100644 --- a/bricks/gen/newcode/Enabler 32 Bit.cs +++ b/bricks/gen/newcode/Enabler 32 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler32Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 65) then " @ + " if Gate.getportstate(gate, 65)~=0 then " @ " Gate.setportstate(gate, 33, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 34, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 35, Gate.getportstate(gate, 3)) " @ @@ -57,38 +57,38 @@ datablock fxDtsBrickData(LogicGate_Enabler32Bit_Data){ " Gate.setportstate(gate, 63, Gate.getportstate(gate, 31)) " @ " Gate.setportstate(gate, 64, Gate.getportstate(gate, 32)) " @ " else " @ - " Gate.setportstate(gate, 33, false) " @ - " Gate.setportstate(gate, 34, false) " @ - " Gate.setportstate(gate, 35, false) " @ - " Gate.setportstate(gate, 36, false) " @ - " Gate.setportstate(gate, 37, false) " @ - " Gate.setportstate(gate, 38, false) " @ - " Gate.setportstate(gate, 39, false) " @ - " Gate.setportstate(gate, 40, false) " @ - " Gate.setportstate(gate, 41, false) " @ - " Gate.setportstate(gate, 42, false) " @ - " Gate.setportstate(gate, 43, false) " @ - " Gate.setportstate(gate, 44, false) " @ - " Gate.setportstate(gate, 45, false) " @ - " Gate.setportstate(gate, 46, false) " @ - " Gate.setportstate(gate, 47, false) " @ - " Gate.setportstate(gate, 48, false) " @ - " Gate.setportstate(gate, 49, false) " @ - " Gate.setportstate(gate, 50, false) " @ - " Gate.setportstate(gate, 51, false) " @ - " Gate.setportstate(gate, 52, false) " @ - " Gate.setportstate(gate, 53, false) " @ - " Gate.setportstate(gate, 54, false) " @ - " Gate.setportstate(gate, 55, false) " @ - " Gate.setportstate(gate, 56, false) " @ - " Gate.setportstate(gate, 57, false) " @ - " Gate.setportstate(gate, 58, false) " @ - " Gate.setportstate(gate, 59, false) " @ - " Gate.setportstate(gate, 60, false) " @ - " Gate.setportstate(gate, 61, false) " @ - " Gate.setportstate(gate, 62, false) " @ - " Gate.setportstate(gate, 63, false) " @ - " Gate.setportstate(gate, 64, false) " @ + " Gate.setportstate(gate, 33, 0) " @ + " Gate.setportstate(gate, 34, 0) " @ + " Gate.setportstate(gate, 35, 0) " @ + " Gate.setportstate(gate, 36, 0) " @ + " Gate.setportstate(gate, 37, 0) " @ + " Gate.setportstate(gate, 38, 0) " @ + " Gate.setportstate(gate, 39, 0) " @ + " Gate.setportstate(gate, 40, 0) " @ + " Gate.setportstate(gate, 41, 0) " @ + " Gate.setportstate(gate, 42, 0) " @ + " Gate.setportstate(gate, 43, 0) " @ + " Gate.setportstate(gate, 44, 0) " @ + " Gate.setportstate(gate, 45, 0) " @ + " Gate.setportstate(gate, 46, 0) " @ + " Gate.setportstate(gate, 47, 0) " @ + " Gate.setportstate(gate, 48, 0) " @ + " Gate.setportstate(gate, 49, 0) " @ + " Gate.setportstate(gate, 50, 0) " @ + " Gate.setportstate(gate, 51, 0) " @ + " Gate.setportstate(gate, 52, 0) " @ + " Gate.setportstate(gate, 53, 0) " @ + " Gate.setportstate(gate, 54, 0) " @ + " Gate.setportstate(gate, 55, 0) " @ + " Gate.setportstate(gate, 56, 0) " @ + " Gate.setportstate(gate, 57, 0) " @ + " Gate.setportstate(gate, 58, 0) " @ + " Gate.setportstate(gate, 59, 0) " @ + " Gate.setportstate(gate, 60, 0) " @ + " Gate.setportstate(gate, 61, 0) " @ + " Gate.setportstate(gate, 62, 0) " @ + " Gate.setportstate(gate, 63, 0) " @ + " Gate.setportstate(gate, 64, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 4 Bit Down.cs b/bricks/gen/newcode/Enabler 4 Bit Down.cs index 58addec..57ce370 100644 --- a/bricks/gen/newcode/Enabler 4 Bit Down.cs +++ b/bricks/gen/newcode/Enabler 4 Bit Down.cs @@ -23,16 +23,16 @@ datablock fxDtsBrickData(LogicGate_Enabler4BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 9) then " @ + " if Gate.getportstate(gate, 9)~=0 then " @ " Gate.setportstate(gate, 5, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 3)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 4)) " @ " else " @ - " Gate.setportstate(gate, 5, false) " @ - " Gate.setportstate(gate, 6, false) " @ - " Gate.setportstate(gate, 7, false) " @ - " Gate.setportstate(gate, 8, false) " @ + " Gate.setportstate(gate, 5, 0) " @ + " Gate.setportstate(gate, 6, 0) " @ + " Gate.setportstate(gate, 7, 0) " @ + " Gate.setportstate(gate, 8, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 4 Bit Up.cs b/bricks/gen/newcode/Enabler 4 Bit Up.cs index e6c55c7..9927d28 100644 --- a/bricks/gen/newcode/Enabler 4 Bit Up.cs +++ b/bricks/gen/newcode/Enabler 4 Bit Up.cs @@ -23,16 +23,16 @@ datablock fxDtsBrickData(LogicGate_Enabler4BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 9) then " @ + " if Gate.getportstate(gate, 9)~=0 then " @ " Gate.setportstate(gate, 5, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 3)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 4)) " @ " else " @ - " Gate.setportstate(gate, 5, false) " @ - " Gate.setportstate(gate, 6, false) " @ - " Gate.setportstate(gate, 7, false) " @ - " Gate.setportstate(gate, 8, false) " @ + " Gate.setportstate(gate, 5, 0) " @ + " Gate.setportstate(gate, 6, 0) " @ + " Gate.setportstate(gate, 7, 0) " @ + " Gate.setportstate(gate, 8, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 4 Bit.cs b/bricks/gen/newcode/Enabler 4 Bit.cs index f3c4df8..17bee11 100644 --- a/bricks/gen/newcode/Enabler 4 Bit.cs +++ b/bricks/gen/newcode/Enabler 4 Bit.cs @@ -23,16 +23,16 @@ datablock fxDtsBrickData(LogicGate_Enabler4Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 9) then " @ + " if Gate.getportstate(gate, 9)~=0 then " @ " Gate.setportstate(gate, 5, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 3)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 4)) " @ " else " @ - " Gate.setportstate(gate, 5, false) " @ - " Gate.setportstate(gate, 6, false) " @ - " Gate.setportstate(gate, 7, false) " @ - " Gate.setportstate(gate, 8, false) " @ + " Gate.setportstate(gate, 5, 0) " @ + " Gate.setportstate(gate, 6, 0) " @ + " Gate.setportstate(gate, 7, 0) " @ + " Gate.setportstate(gate, 8, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 48 Bit Down.cs b/bricks/gen/newcode/Enabler 48 Bit Down.cs index de695a0..cf1d4a6 100644 --- a/bricks/gen/newcode/Enabler 48 Bit Down.cs +++ b/bricks/gen/newcode/Enabler 48 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler48BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 97) then " @ + " if Gate.getportstate(gate, 97)~=0 then " @ " Gate.setportstate(gate, 49, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 50, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 51, Gate.getportstate(gate, 3)) " @ @@ -73,54 +73,54 @@ datablock fxDtsBrickData(LogicGate_Enabler48BitDown_Data){ " Gate.setportstate(gate, 95, Gate.getportstate(gate, 47)) " @ " Gate.setportstate(gate, 96, Gate.getportstate(gate, 48)) " @ " else " @ - " Gate.setportstate(gate, 49, false) " @ - " Gate.setportstate(gate, 50, false) " @ - " Gate.setportstate(gate, 51, false) " @ - " Gate.setportstate(gate, 52, false) " @ - " Gate.setportstate(gate, 53, false) " @ - " Gate.setportstate(gate, 54, false) " @ - " Gate.setportstate(gate, 55, false) " @ - " Gate.setportstate(gate, 56, false) " @ - " Gate.setportstate(gate, 57, false) " @ - " Gate.setportstate(gate, 58, false) " @ - " Gate.setportstate(gate, 59, false) " @ - " Gate.setportstate(gate, 60, false) " @ - " Gate.setportstate(gate, 61, false) " @ - " Gate.setportstate(gate, 62, false) " @ - " Gate.setportstate(gate, 63, false) " @ - " Gate.setportstate(gate, 64, false) " @ - " Gate.setportstate(gate, 65, false) " @ - " Gate.setportstate(gate, 66, false) " @ - " Gate.setportstate(gate, 67, false) " @ - " Gate.setportstate(gate, 68, false) " @ - " Gate.setportstate(gate, 69, false) " @ - " Gate.setportstate(gate, 70, false) " @ - " Gate.setportstate(gate, 71, false) " @ - " Gate.setportstate(gate, 72, false) " @ - " Gate.setportstate(gate, 73, false) " @ - " Gate.setportstate(gate, 74, false) " @ - " Gate.setportstate(gate, 75, false) " @ - " Gate.setportstate(gate, 76, false) " @ - " Gate.setportstate(gate, 77, false) " @ - " Gate.setportstate(gate, 78, false) " @ - " Gate.setportstate(gate, 79, false) " @ - " Gate.setportstate(gate, 80, false) " @ - " Gate.setportstate(gate, 81, false) " @ - " Gate.setportstate(gate, 82, false) " @ - " Gate.setportstate(gate, 83, false) " @ - " Gate.setportstate(gate, 84, false) " @ - " Gate.setportstate(gate, 85, false) " @ - " Gate.setportstate(gate, 86, false) " @ - " Gate.setportstate(gate, 87, false) " @ - " Gate.setportstate(gate, 88, false) " @ - " Gate.setportstate(gate, 89, false) " @ - " Gate.setportstate(gate, 90, false) " @ - " Gate.setportstate(gate, 91, false) " @ - " Gate.setportstate(gate, 92, false) " @ - " Gate.setportstate(gate, 93, false) " @ - " Gate.setportstate(gate, 94, false) " @ - " Gate.setportstate(gate, 95, false) " @ - " Gate.setportstate(gate, 96, false) " @ + " Gate.setportstate(gate, 49, 0) " @ + " Gate.setportstate(gate, 50, 0) " @ + " Gate.setportstate(gate, 51, 0) " @ + " Gate.setportstate(gate, 52, 0) " @ + " Gate.setportstate(gate, 53, 0) " @ + " Gate.setportstate(gate, 54, 0) " @ + " Gate.setportstate(gate, 55, 0) " @ + " Gate.setportstate(gate, 56, 0) " @ + " Gate.setportstate(gate, 57, 0) " @ + " Gate.setportstate(gate, 58, 0) " @ + " Gate.setportstate(gate, 59, 0) " @ + " Gate.setportstate(gate, 60, 0) " @ + " Gate.setportstate(gate, 61, 0) " @ + " Gate.setportstate(gate, 62, 0) " @ + " Gate.setportstate(gate, 63, 0) " @ + " Gate.setportstate(gate, 64, 0) " @ + " Gate.setportstate(gate, 65, 0) " @ + " Gate.setportstate(gate, 66, 0) " @ + " Gate.setportstate(gate, 67, 0) " @ + " Gate.setportstate(gate, 68, 0) " @ + " Gate.setportstate(gate, 69, 0) " @ + " Gate.setportstate(gate, 70, 0) " @ + " Gate.setportstate(gate, 71, 0) " @ + " Gate.setportstate(gate, 72, 0) " @ + " Gate.setportstate(gate, 73, 0) " @ + " Gate.setportstate(gate, 74, 0) " @ + " Gate.setportstate(gate, 75, 0) " @ + " Gate.setportstate(gate, 76, 0) " @ + " Gate.setportstate(gate, 77, 0) " @ + " Gate.setportstate(gate, 78, 0) " @ + " Gate.setportstate(gate, 79, 0) " @ + " Gate.setportstate(gate, 80, 0) " @ + " Gate.setportstate(gate, 81, 0) " @ + " Gate.setportstate(gate, 82, 0) " @ + " Gate.setportstate(gate, 83, 0) " @ + " Gate.setportstate(gate, 84, 0) " @ + " Gate.setportstate(gate, 85, 0) " @ + " Gate.setportstate(gate, 86, 0) " @ + " Gate.setportstate(gate, 87, 0) " @ + " Gate.setportstate(gate, 88, 0) " @ + " Gate.setportstate(gate, 89, 0) " @ + " Gate.setportstate(gate, 90, 0) " @ + " Gate.setportstate(gate, 91, 0) " @ + " Gate.setportstate(gate, 92, 0) " @ + " Gate.setportstate(gate, 93, 0) " @ + " Gate.setportstate(gate, 94, 0) " @ + " Gate.setportstate(gate, 95, 0) " @ + " Gate.setportstate(gate, 96, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 48 Bit Up.cs b/bricks/gen/newcode/Enabler 48 Bit Up.cs index 10e2c79..e317358 100644 --- a/bricks/gen/newcode/Enabler 48 Bit Up.cs +++ b/bricks/gen/newcode/Enabler 48 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler48BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 97) then " @ + " if Gate.getportstate(gate, 97)~=0 then " @ " Gate.setportstate(gate, 49, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 50, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 51, Gate.getportstate(gate, 3)) " @ @@ -73,54 +73,54 @@ datablock fxDtsBrickData(LogicGate_Enabler48BitUp_Data){ " Gate.setportstate(gate, 95, Gate.getportstate(gate, 47)) " @ " Gate.setportstate(gate, 96, Gate.getportstate(gate, 48)) " @ " else " @ - " Gate.setportstate(gate, 49, false) " @ - " Gate.setportstate(gate, 50, false) " @ - " Gate.setportstate(gate, 51, false) " @ - " Gate.setportstate(gate, 52, false) " @ - " Gate.setportstate(gate, 53, false) " @ - " Gate.setportstate(gate, 54, false) " @ - " Gate.setportstate(gate, 55, false) " @ - " Gate.setportstate(gate, 56, false) " @ - " Gate.setportstate(gate, 57, false) " @ - " Gate.setportstate(gate, 58, false) " @ - " Gate.setportstate(gate, 59, false) " @ - " Gate.setportstate(gate, 60, false) " @ - " Gate.setportstate(gate, 61, false) " @ - " Gate.setportstate(gate, 62, false) " @ - " Gate.setportstate(gate, 63, false) " @ - " Gate.setportstate(gate, 64, false) " @ - " Gate.setportstate(gate, 65, false) " @ - " Gate.setportstate(gate, 66, false) " @ - " Gate.setportstate(gate, 67, false) " @ - " Gate.setportstate(gate, 68, false) " @ - " Gate.setportstate(gate, 69, false) " @ - " Gate.setportstate(gate, 70, false) " @ - " Gate.setportstate(gate, 71, false) " @ - " Gate.setportstate(gate, 72, false) " @ - " Gate.setportstate(gate, 73, false) " @ - " Gate.setportstate(gate, 74, false) " @ - " Gate.setportstate(gate, 75, false) " @ - " Gate.setportstate(gate, 76, false) " @ - " Gate.setportstate(gate, 77, false) " @ - " Gate.setportstate(gate, 78, false) " @ - " Gate.setportstate(gate, 79, false) " @ - " Gate.setportstate(gate, 80, false) " @ - " Gate.setportstate(gate, 81, false) " @ - " Gate.setportstate(gate, 82, false) " @ - " Gate.setportstate(gate, 83, false) " @ - " Gate.setportstate(gate, 84, false) " @ - " Gate.setportstate(gate, 85, false) " @ - " Gate.setportstate(gate, 86, false) " @ - " Gate.setportstate(gate, 87, false) " @ - " Gate.setportstate(gate, 88, false) " @ - " Gate.setportstate(gate, 89, false) " @ - " Gate.setportstate(gate, 90, false) " @ - " Gate.setportstate(gate, 91, false) " @ - " Gate.setportstate(gate, 92, false) " @ - " Gate.setportstate(gate, 93, false) " @ - " Gate.setportstate(gate, 94, false) " @ - " Gate.setportstate(gate, 95, false) " @ - " Gate.setportstate(gate, 96, false) " @ + " Gate.setportstate(gate, 49, 0) " @ + " Gate.setportstate(gate, 50, 0) " @ + " Gate.setportstate(gate, 51, 0) " @ + " Gate.setportstate(gate, 52, 0) " @ + " Gate.setportstate(gate, 53, 0) " @ + " Gate.setportstate(gate, 54, 0) " @ + " Gate.setportstate(gate, 55, 0) " @ + " Gate.setportstate(gate, 56, 0) " @ + " Gate.setportstate(gate, 57, 0) " @ + " Gate.setportstate(gate, 58, 0) " @ + " Gate.setportstate(gate, 59, 0) " @ + " Gate.setportstate(gate, 60, 0) " @ + " Gate.setportstate(gate, 61, 0) " @ + " Gate.setportstate(gate, 62, 0) " @ + " Gate.setportstate(gate, 63, 0) " @ + " Gate.setportstate(gate, 64, 0) " @ + " Gate.setportstate(gate, 65, 0) " @ + " Gate.setportstate(gate, 66, 0) " @ + " Gate.setportstate(gate, 67, 0) " @ + " Gate.setportstate(gate, 68, 0) " @ + " Gate.setportstate(gate, 69, 0) " @ + " Gate.setportstate(gate, 70, 0) " @ + " Gate.setportstate(gate, 71, 0) " @ + " Gate.setportstate(gate, 72, 0) " @ + " Gate.setportstate(gate, 73, 0) " @ + " Gate.setportstate(gate, 74, 0) " @ + " Gate.setportstate(gate, 75, 0) " @ + " Gate.setportstate(gate, 76, 0) " @ + " Gate.setportstate(gate, 77, 0) " @ + " Gate.setportstate(gate, 78, 0) " @ + " Gate.setportstate(gate, 79, 0) " @ + " Gate.setportstate(gate, 80, 0) " @ + " Gate.setportstate(gate, 81, 0) " @ + " Gate.setportstate(gate, 82, 0) " @ + " Gate.setportstate(gate, 83, 0) " @ + " Gate.setportstate(gate, 84, 0) " @ + " Gate.setportstate(gate, 85, 0) " @ + " Gate.setportstate(gate, 86, 0) " @ + " Gate.setportstate(gate, 87, 0) " @ + " Gate.setportstate(gate, 88, 0) " @ + " Gate.setportstate(gate, 89, 0) " @ + " Gate.setportstate(gate, 90, 0) " @ + " Gate.setportstate(gate, 91, 0) " @ + " Gate.setportstate(gate, 92, 0) " @ + " Gate.setportstate(gate, 93, 0) " @ + " Gate.setportstate(gate, 94, 0) " @ + " Gate.setportstate(gate, 95, 0) " @ + " Gate.setportstate(gate, 96, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 48 Bit.cs b/bricks/gen/newcode/Enabler 48 Bit.cs index 6664df7..c57aec2 100644 --- a/bricks/gen/newcode/Enabler 48 Bit.cs +++ b/bricks/gen/newcode/Enabler 48 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler48Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 97) then " @ + " if Gate.getportstate(gate, 97)~=0 then " @ " Gate.setportstate(gate, 49, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 50, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 51, Gate.getportstate(gate, 3)) " @ @@ -73,54 +73,54 @@ datablock fxDtsBrickData(LogicGate_Enabler48Bit_Data){ " Gate.setportstate(gate, 95, Gate.getportstate(gate, 47)) " @ " Gate.setportstate(gate, 96, Gate.getportstate(gate, 48)) " @ " else " @ - " Gate.setportstate(gate, 49, false) " @ - " Gate.setportstate(gate, 50, false) " @ - " Gate.setportstate(gate, 51, false) " @ - " Gate.setportstate(gate, 52, false) " @ - " Gate.setportstate(gate, 53, false) " @ - " Gate.setportstate(gate, 54, false) " @ - " Gate.setportstate(gate, 55, false) " @ - " Gate.setportstate(gate, 56, false) " @ - " Gate.setportstate(gate, 57, false) " @ - " Gate.setportstate(gate, 58, false) " @ - " Gate.setportstate(gate, 59, false) " @ - " Gate.setportstate(gate, 60, false) " @ - " Gate.setportstate(gate, 61, false) " @ - " Gate.setportstate(gate, 62, false) " @ - " Gate.setportstate(gate, 63, false) " @ - " Gate.setportstate(gate, 64, false) " @ - " Gate.setportstate(gate, 65, false) " @ - " Gate.setportstate(gate, 66, false) " @ - " Gate.setportstate(gate, 67, false) " @ - " Gate.setportstate(gate, 68, false) " @ - " Gate.setportstate(gate, 69, false) " @ - " Gate.setportstate(gate, 70, false) " @ - " Gate.setportstate(gate, 71, false) " @ - " Gate.setportstate(gate, 72, false) " @ - " Gate.setportstate(gate, 73, false) " @ - " Gate.setportstate(gate, 74, false) " @ - " Gate.setportstate(gate, 75, false) " @ - " Gate.setportstate(gate, 76, false) " @ - " Gate.setportstate(gate, 77, false) " @ - " Gate.setportstate(gate, 78, false) " @ - " Gate.setportstate(gate, 79, false) " @ - " Gate.setportstate(gate, 80, false) " @ - " Gate.setportstate(gate, 81, false) " @ - " Gate.setportstate(gate, 82, false) " @ - " Gate.setportstate(gate, 83, false) " @ - " Gate.setportstate(gate, 84, false) " @ - " Gate.setportstate(gate, 85, false) " @ - " Gate.setportstate(gate, 86, false) " @ - " Gate.setportstate(gate, 87, false) " @ - " Gate.setportstate(gate, 88, false) " @ - " Gate.setportstate(gate, 89, false) " @ - " Gate.setportstate(gate, 90, false) " @ - " Gate.setportstate(gate, 91, false) " @ - " Gate.setportstate(gate, 92, false) " @ - " Gate.setportstate(gate, 93, false) " @ - " Gate.setportstate(gate, 94, false) " @ - " Gate.setportstate(gate, 95, false) " @ - " Gate.setportstate(gate, 96, false) " @ + " Gate.setportstate(gate, 49, 0) " @ + " Gate.setportstate(gate, 50, 0) " @ + " Gate.setportstate(gate, 51, 0) " @ + " Gate.setportstate(gate, 52, 0) " @ + " Gate.setportstate(gate, 53, 0) " @ + " Gate.setportstate(gate, 54, 0) " @ + " Gate.setportstate(gate, 55, 0) " @ + " Gate.setportstate(gate, 56, 0) " @ + " Gate.setportstate(gate, 57, 0) " @ + " Gate.setportstate(gate, 58, 0) " @ + " Gate.setportstate(gate, 59, 0) " @ + " Gate.setportstate(gate, 60, 0) " @ + " Gate.setportstate(gate, 61, 0) " @ + " Gate.setportstate(gate, 62, 0) " @ + " Gate.setportstate(gate, 63, 0) " @ + " Gate.setportstate(gate, 64, 0) " @ + " Gate.setportstate(gate, 65, 0) " @ + " Gate.setportstate(gate, 66, 0) " @ + " Gate.setportstate(gate, 67, 0) " @ + " Gate.setportstate(gate, 68, 0) " @ + " Gate.setportstate(gate, 69, 0) " @ + " Gate.setportstate(gate, 70, 0) " @ + " Gate.setportstate(gate, 71, 0) " @ + " Gate.setportstate(gate, 72, 0) " @ + " Gate.setportstate(gate, 73, 0) " @ + " Gate.setportstate(gate, 74, 0) " @ + " Gate.setportstate(gate, 75, 0) " @ + " Gate.setportstate(gate, 76, 0) " @ + " Gate.setportstate(gate, 77, 0) " @ + " Gate.setportstate(gate, 78, 0) " @ + " Gate.setportstate(gate, 79, 0) " @ + " Gate.setportstate(gate, 80, 0) " @ + " Gate.setportstate(gate, 81, 0) " @ + " Gate.setportstate(gate, 82, 0) " @ + " Gate.setportstate(gate, 83, 0) " @ + " Gate.setportstate(gate, 84, 0) " @ + " Gate.setportstate(gate, 85, 0) " @ + " Gate.setportstate(gate, 86, 0) " @ + " Gate.setportstate(gate, 87, 0) " @ + " Gate.setportstate(gate, 88, 0) " @ + " Gate.setportstate(gate, 89, 0) " @ + " Gate.setportstate(gate, 90, 0) " @ + " Gate.setportstate(gate, 91, 0) " @ + " Gate.setportstate(gate, 92, 0) " @ + " Gate.setportstate(gate, 93, 0) " @ + " Gate.setportstate(gate, 94, 0) " @ + " Gate.setportstate(gate, 95, 0) " @ + " Gate.setportstate(gate, 96, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 5 Bit Down.cs b/bricks/gen/newcode/Enabler 5 Bit Down.cs index 3e2a39e..7d8b1e1 100644 --- a/bricks/gen/newcode/Enabler 5 Bit Down.cs +++ b/bricks/gen/newcode/Enabler 5 Bit Down.cs @@ -23,18 +23,18 @@ datablock fxDtsBrickData(LogicGate_Enabler5BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 11) then " @ + " if Gate.getportstate(gate, 11)~=0 then " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 3)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 4)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 5)) " @ " else " @ - " Gate.setportstate(gate, 6, false) " @ - " Gate.setportstate(gate, 7, false) " @ - " Gate.setportstate(gate, 8, false) " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ + " Gate.setportstate(gate, 6, 0) " @ + " Gate.setportstate(gate, 7, 0) " @ + " Gate.setportstate(gate, 8, 0) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 5 Bit Up.cs b/bricks/gen/newcode/Enabler 5 Bit Up.cs index 500803e..ef2db3e 100644 --- a/bricks/gen/newcode/Enabler 5 Bit Up.cs +++ b/bricks/gen/newcode/Enabler 5 Bit Up.cs @@ -23,18 +23,18 @@ datablock fxDtsBrickData(LogicGate_Enabler5BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 11) then " @ + " if Gate.getportstate(gate, 11)~=0 then " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 3)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 4)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 5)) " @ " else " @ - " Gate.setportstate(gate, 6, false) " @ - " Gate.setportstate(gate, 7, false) " @ - " Gate.setportstate(gate, 8, false) " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ + " Gate.setportstate(gate, 6, 0) " @ + " Gate.setportstate(gate, 7, 0) " @ + " Gate.setportstate(gate, 8, 0) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 5 Bit.cs b/bricks/gen/newcode/Enabler 5 Bit.cs index a30a80b..b312341 100644 --- a/bricks/gen/newcode/Enabler 5 Bit.cs +++ b/bricks/gen/newcode/Enabler 5 Bit.cs @@ -23,18 +23,18 @@ datablock fxDtsBrickData(LogicGate_Enabler5Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 11) then " @ + " if Gate.getportstate(gate, 11)~=0 then " @ " Gate.setportstate(gate, 6, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 3)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 4)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 5)) " @ " else " @ - " Gate.setportstate(gate, 6, false) " @ - " Gate.setportstate(gate, 7, false) " @ - " Gate.setportstate(gate, 8, false) " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ + " Gate.setportstate(gate, 6, 0) " @ + " Gate.setportstate(gate, 7, 0) " @ + " Gate.setportstate(gate, 8, 0) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 6 Bit Down.cs b/bricks/gen/newcode/Enabler 6 Bit Down.cs index cd6b25c..97b71f4 100644 --- a/bricks/gen/newcode/Enabler 6 Bit Down.cs +++ b/bricks/gen/newcode/Enabler 6 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler6BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 13) then " @ + " if Gate.getportstate(gate, 13)~=0 then " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 3)) " @ @@ -31,12 +31,12 @@ datablock fxDtsBrickData(LogicGate_Enabler6BitDown_Data){ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 5)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 6)) " @ " else " @ - " Gate.setportstate(gate, 7, false) " @ - " Gate.setportstate(gate, 8, false) " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ + " Gate.setportstate(gate, 7, 0) " @ + " Gate.setportstate(gate, 8, 0) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 6 Bit Up.cs b/bricks/gen/newcode/Enabler 6 Bit Up.cs index b33c087..da96627 100644 --- a/bricks/gen/newcode/Enabler 6 Bit Up.cs +++ b/bricks/gen/newcode/Enabler 6 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler6BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 13) then " @ + " if Gate.getportstate(gate, 13)~=0 then " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 3)) " @ @@ -31,12 +31,12 @@ datablock fxDtsBrickData(LogicGate_Enabler6BitUp_Data){ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 5)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 6)) " @ " else " @ - " Gate.setportstate(gate, 7, false) " @ - " Gate.setportstate(gate, 8, false) " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ + " Gate.setportstate(gate, 7, 0) " @ + " Gate.setportstate(gate, 8, 0) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 6 Bit.cs b/bricks/gen/newcode/Enabler 6 Bit.cs index bd11852..7ad7ad6 100644 --- a/bricks/gen/newcode/Enabler 6 Bit.cs +++ b/bricks/gen/newcode/Enabler 6 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler6Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 13) then " @ + " if Gate.getportstate(gate, 13)~=0 then " @ " Gate.setportstate(gate, 7, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 3)) " @ @@ -31,12 +31,12 @@ datablock fxDtsBrickData(LogicGate_Enabler6Bit_Data){ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 5)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 6)) " @ " else " @ - " Gate.setportstate(gate, 7, false) " @ - " Gate.setportstate(gate, 8, false) " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ + " Gate.setportstate(gate, 7, 0) " @ + " Gate.setportstate(gate, 8, 0) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 64 Bit Down.cs b/bricks/gen/newcode/Enabler 64 Bit Down.cs index 0f54e60..dfe3032 100644 --- a/bricks/gen/newcode/Enabler 64 Bit Down.cs +++ b/bricks/gen/newcode/Enabler 64 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler64BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 129) then " @ + " if Gate.getportstate(gate, 129)~=0 then " @ " Gate.setportstate(gate, 65, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 66, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 67, Gate.getportstate(gate, 3)) " @ @@ -89,70 +89,70 @@ datablock fxDtsBrickData(LogicGate_Enabler64BitDown_Data){ " Gate.setportstate(gate, 127, Gate.getportstate(gate, 63)) " @ " Gate.setportstate(gate, 128, Gate.getportstate(gate, 64)) " @ " else " @ - " Gate.setportstate(gate, 65, false) " @ - " Gate.setportstate(gate, 66, false) " @ - " Gate.setportstate(gate, 67, false) " @ - " Gate.setportstate(gate, 68, false) " @ - " Gate.setportstate(gate, 69, false) " @ - " Gate.setportstate(gate, 70, false) " @ - " Gate.setportstate(gate, 71, false) " @ - " Gate.setportstate(gate, 72, false) " @ - " Gate.setportstate(gate, 73, false) " @ - " Gate.setportstate(gate, 74, false) " @ - " Gate.setportstate(gate, 75, false) " @ - " Gate.setportstate(gate, 76, false) " @ - " Gate.setportstate(gate, 77, false) " @ - " Gate.setportstate(gate, 78, false) " @ - " Gate.setportstate(gate, 79, false) " @ - " Gate.setportstate(gate, 80, false) " @ - " Gate.setportstate(gate, 81, false) " @ - " Gate.setportstate(gate, 82, false) " @ - " Gate.setportstate(gate, 83, false) " @ - " Gate.setportstate(gate, 84, false) " @ - " Gate.setportstate(gate, 85, false) " @ - " Gate.setportstate(gate, 86, false) " @ - " Gate.setportstate(gate, 87, false) " @ - " Gate.setportstate(gate, 88, false) " @ - " Gate.setportstate(gate, 89, false) " @ - " Gate.setportstate(gate, 90, false) " @ - " Gate.setportstate(gate, 91, false) " @ - " Gate.setportstate(gate, 92, false) " @ - " Gate.setportstate(gate, 93, false) " @ - " Gate.setportstate(gate, 94, false) " @ - " Gate.setportstate(gate, 95, false) " @ - " Gate.setportstate(gate, 96, false) " @ - " Gate.setportstate(gate, 97, false) " @ - " Gate.setportstate(gate, 98, false) " @ - " Gate.setportstate(gate, 99, false) " @ - " Gate.setportstate(gate, 100, false) " @ - " Gate.setportstate(gate, 101, false) " @ - " Gate.setportstate(gate, 102, false) " @ - " Gate.setportstate(gate, 103, false) " @ - " Gate.setportstate(gate, 104, false) " @ - " Gate.setportstate(gate, 105, false) " @ - " Gate.setportstate(gate, 106, false) " @ - " Gate.setportstate(gate, 107, false) " @ - " Gate.setportstate(gate, 108, false) " @ - " Gate.setportstate(gate, 109, false) " @ - " Gate.setportstate(gate, 110, false) " @ - " Gate.setportstate(gate, 111, false) " @ - " Gate.setportstate(gate, 112, false) " @ - " Gate.setportstate(gate, 113, false) " @ - " Gate.setportstate(gate, 114, false) " @ - " Gate.setportstate(gate, 115, false) " @ - " Gate.setportstate(gate, 116, false) " @ - " Gate.setportstate(gate, 117, false) " @ - " Gate.setportstate(gate, 118, false) " @ - " Gate.setportstate(gate, 119, false) " @ - " Gate.setportstate(gate, 120, false) " @ - " Gate.setportstate(gate, 121, false) " @ - " Gate.setportstate(gate, 122, false) " @ - " Gate.setportstate(gate, 123, false) " @ - " Gate.setportstate(gate, 124, false) " @ - " Gate.setportstate(gate, 125, false) " @ - " Gate.setportstate(gate, 126, false) " @ - " Gate.setportstate(gate, 127, false) " @ - " Gate.setportstate(gate, 128, false) " @ + " Gate.setportstate(gate, 65, 0) " @ + " Gate.setportstate(gate, 66, 0) " @ + " Gate.setportstate(gate, 67, 0) " @ + " Gate.setportstate(gate, 68, 0) " @ + " Gate.setportstate(gate, 69, 0) " @ + " Gate.setportstate(gate, 70, 0) " @ + " Gate.setportstate(gate, 71, 0) " @ + " Gate.setportstate(gate, 72, 0) " @ + " Gate.setportstate(gate, 73, 0) " @ + " Gate.setportstate(gate, 74, 0) " @ + " Gate.setportstate(gate, 75, 0) " @ + " Gate.setportstate(gate, 76, 0) " @ + " Gate.setportstate(gate, 77, 0) " @ + " Gate.setportstate(gate, 78, 0) " @ + " Gate.setportstate(gate, 79, 0) " @ + " Gate.setportstate(gate, 80, 0) " @ + " Gate.setportstate(gate, 81, 0) " @ + " Gate.setportstate(gate, 82, 0) " @ + " Gate.setportstate(gate, 83, 0) " @ + " Gate.setportstate(gate, 84, 0) " @ + " Gate.setportstate(gate, 85, 0) " @ + " Gate.setportstate(gate, 86, 0) " @ + " Gate.setportstate(gate, 87, 0) " @ + " Gate.setportstate(gate, 88, 0) " @ + " Gate.setportstate(gate, 89, 0) " @ + " Gate.setportstate(gate, 90, 0) " @ + " Gate.setportstate(gate, 91, 0) " @ + " Gate.setportstate(gate, 92, 0) " @ + " Gate.setportstate(gate, 93, 0) " @ + " Gate.setportstate(gate, 94, 0) " @ + " Gate.setportstate(gate, 95, 0) " @ + " Gate.setportstate(gate, 96, 0) " @ + " Gate.setportstate(gate, 97, 0) " @ + " Gate.setportstate(gate, 98, 0) " @ + " Gate.setportstate(gate, 99, 0) " @ + " Gate.setportstate(gate, 100, 0) " @ + " Gate.setportstate(gate, 101, 0) " @ + " Gate.setportstate(gate, 102, 0) " @ + " Gate.setportstate(gate, 103, 0) " @ + " Gate.setportstate(gate, 104, 0) " @ + " Gate.setportstate(gate, 105, 0) " @ + " Gate.setportstate(gate, 106, 0) " @ + " Gate.setportstate(gate, 107, 0) " @ + " Gate.setportstate(gate, 108, 0) " @ + " Gate.setportstate(gate, 109, 0) " @ + " Gate.setportstate(gate, 110, 0) " @ + " Gate.setportstate(gate, 111, 0) " @ + " Gate.setportstate(gate, 112, 0) " @ + " Gate.setportstate(gate, 113, 0) " @ + " Gate.setportstate(gate, 114, 0) " @ + " Gate.setportstate(gate, 115, 0) " @ + " Gate.setportstate(gate, 116, 0) " @ + " Gate.setportstate(gate, 117, 0) " @ + " Gate.setportstate(gate, 118, 0) " @ + " Gate.setportstate(gate, 119, 0) " @ + " Gate.setportstate(gate, 120, 0) " @ + " Gate.setportstate(gate, 121, 0) " @ + " Gate.setportstate(gate, 122, 0) " @ + " Gate.setportstate(gate, 123, 0) " @ + " Gate.setportstate(gate, 124, 0) " @ + " Gate.setportstate(gate, 125, 0) " @ + " Gate.setportstate(gate, 126, 0) " @ + " Gate.setportstate(gate, 127, 0) " @ + " Gate.setportstate(gate, 128, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 64 Bit Up.cs b/bricks/gen/newcode/Enabler 64 Bit Up.cs index 6d328af..9d77de7 100644 --- a/bricks/gen/newcode/Enabler 64 Bit Up.cs +++ b/bricks/gen/newcode/Enabler 64 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler64BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 129) then " @ + " if Gate.getportstate(gate, 129)~=0 then " @ " Gate.setportstate(gate, 65, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 66, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 67, Gate.getportstate(gate, 3)) " @ @@ -89,70 +89,70 @@ datablock fxDtsBrickData(LogicGate_Enabler64BitUp_Data){ " Gate.setportstate(gate, 127, Gate.getportstate(gate, 63)) " @ " Gate.setportstate(gate, 128, Gate.getportstate(gate, 64)) " @ " else " @ - " Gate.setportstate(gate, 65, false) " @ - " Gate.setportstate(gate, 66, false) " @ - " Gate.setportstate(gate, 67, false) " @ - " Gate.setportstate(gate, 68, false) " @ - " Gate.setportstate(gate, 69, false) " @ - " Gate.setportstate(gate, 70, false) " @ - " Gate.setportstate(gate, 71, false) " @ - " Gate.setportstate(gate, 72, false) " @ - " Gate.setportstate(gate, 73, false) " @ - " Gate.setportstate(gate, 74, false) " @ - " Gate.setportstate(gate, 75, false) " @ - " Gate.setportstate(gate, 76, false) " @ - " Gate.setportstate(gate, 77, false) " @ - " Gate.setportstate(gate, 78, false) " @ - " Gate.setportstate(gate, 79, false) " @ - " Gate.setportstate(gate, 80, false) " @ - " Gate.setportstate(gate, 81, false) " @ - " Gate.setportstate(gate, 82, false) " @ - " Gate.setportstate(gate, 83, false) " @ - " Gate.setportstate(gate, 84, false) " @ - " Gate.setportstate(gate, 85, false) " @ - " Gate.setportstate(gate, 86, false) " @ - " Gate.setportstate(gate, 87, false) " @ - " Gate.setportstate(gate, 88, false) " @ - " Gate.setportstate(gate, 89, false) " @ - " Gate.setportstate(gate, 90, false) " @ - " Gate.setportstate(gate, 91, false) " @ - " Gate.setportstate(gate, 92, false) " @ - " Gate.setportstate(gate, 93, false) " @ - " Gate.setportstate(gate, 94, false) " @ - " Gate.setportstate(gate, 95, false) " @ - " Gate.setportstate(gate, 96, false) " @ - " Gate.setportstate(gate, 97, false) " @ - " Gate.setportstate(gate, 98, false) " @ - " Gate.setportstate(gate, 99, false) " @ - " Gate.setportstate(gate, 100, false) " @ - " Gate.setportstate(gate, 101, false) " @ - " Gate.setportstate(gate, 102, false) " @ - " Gate.setportstate(gate, 103, false) " @ - " Gate.setportstate(gate, 104, false) " @ - " Gate.setportstate(gate, 105, false) " @ - " Gate.setportstate(gate, 106, false) " @ - " Gate.setportstate(gate, 107, false) " @ - " Gate.setportstate(gate, 108, false) " @ - " Gate.setportstate(gate, 109, false) " @ - " Gate.setportstate(gate, 110, false) " @ - " Gate.setportstate(gate, 111, false) " @ - " Gate.setportstate(gate, 112, false) " @ - " Gate.setportstate(gate, 113, false) " @ - " Gate.setportstate(gate, 114, false) " @ - " Gate.setportstate(gate, 115, false) " @ - " Gate.setportstate(gate, 116, false) " @ - " Gate.setportstate(gate, 117, false) " @ - " Gate.setportstate(gate, 118, false) " @ - " Gate.setportstate(gate, 119, false) " @ - " Gate.setportstate(gate, 120, false) " @ - " Gate.setportstate(gate, 121, false) " @ - " Gate.setportstate(gate, 122, false) " @ - " Gate.setportstate(gate, 123, false) " @ - " Gate.setportstate(gate, 124, false) " @ - " Gate.setportstate(gate, 125, false) " @ - " Gate.setportstate(gate, 126, false) " @ - " Gate.setportstate(gate, 127, false) " @ - " Gate.setportstate(gate, 128, false) " @ + " Gate.setportstate(gate, 65, 0) " @ + " Gate.setportstate(gate, 66, 0) " @ + " Gate.setportstate(gate, 67, 0) " @ + " Gate.setportstate(gate, 68, 0) " @ + " Gate.setportstate(gate, 69, 0) " @ + " Gate.setportstate(gate, 70, 0) " @ + " Gate.setportstate(gate, 71, 0) " @ + " Gate.setportstate(gate, 72, 0) " @ + " Gate.setportstate(gate, 73, 0) " @ + " Gate.setportstate(gate, 74, 0) " @ + " Gate.setportstate(gate, 75, 0) " @ + " Gate.setportstate(gate, 76, 0) " @ + " Gate.setportstate(gate, 77, 0) " @ + " Gate.setportstate(gate, 78, 0) " @ + " Gate.setportstate(gate, 79, 0) " @ + " Gate.setportstate(gate, 80, 0) " @ + " Gate.setportstate(gate, 81, 0) " @ + " Gate.setportstate(gate, 82, 0) " @ + " Gate.setportstate(gate, 83, 0) " @ + " Gate.setportstate(gate, 84, 0) " @ + " Gate.setportstate(gate, 85, 0) " @ + " Gate.setportstate(gate, 86, 0) " @ + " Gate.setportstate(gate, 87, 0) " @ + " Gate.setportstate(gate, 88, 0) " @ + " Gate.setportstate(gate, 89, 0) " @ + " Gate.setportstate(gate, 90, 0) " @ + " Gate.setportstate(gate, 91, 0) " @ + " Gate.setportstate(gate, 92, 0) " @ + " Gate.setportstate(gate, 93, 0) " @ + " Gate.setportstate(gate, 94, 0) " @ + " Gate.setportstate(gate, 95, 0) " @ + " Gate.setportstate(gate, 96, 0) " @ + " Gate.setportstate(gate, 97, 0) " @ + " Gate.setportstate(gate, 98, 0) " @ + " Gate.setportstate(gate, 99, 0) " @ + " Gate.setportstate(gate, 100, 0) " @ + " Gate.setportstate(gate, 101, 0) " @ + " Gate.setportstate(gate, 102, 0) " @ + " Gate.setportstate(gate, 103, 0) " @ + " Gate.setportstate(gate, 104, 0) " @ + " Gate.setportstate(gate, 105, 0) " @ + " Gate.setportstate(gate, 106, 0) " @ + " Gate.setportstate(gate, 107, 0) " @ + " Gate.setportstate(gate, 108, 0) " @ + " Gate.setportstate(gate, 109, 0) " @ + " Gate.setportstate(gate, 110, 0) " @ + " Gate.setportstate(gate, 111, 0) " @ + " Gate.setportstate(gate, 112, 0) " @ + " Gate.setportstate(gate, 113, 0) " @ + " Gate.setportstate(gate, 114, 0) " @ + " Gate.setportstate(gate, 115, 0) " @ + " Gate.setportstate(gate, 116, 0) " @ + " Gate.setportstate(gate, 117, 0) " @ + " Gate.setportstate(gate, 118, 0) " @ + " Gate.setportstate(gate, 119, 0) " @ + " Gate.setportstate(gate, 120, 0) " @ + " Gate.setportstate(gate, 121, 0) " @ + " Gate.setportstate(gate, 122, 0) " @ + " Gate.setportstate(gate, 123, 0) " @ + " Gate.setportstate(gate, 124, 0) " @ + " Gate.setportstate(gate, 125, 0) " @ + " Gate.setportstate(gate, 126, 0) " @ + " Gate.setportstate(gate, 127, 0) " @ + " Gate.setportstate(gate, 128, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 64 Bit.cs b/bricks/gen/newcode/Enabler 64 Bit.cs index ae45641..cfa0960 100644 --- a/bricks/gen/newcode/Enabler 64 Bit.cs +++ b/bricks/gen/newcode/Enabler 64 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler64Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 129) then " @ + " if Gate.getportstate(gate, 129)~=0 then " @ " Gate.setportstate(gate, 65, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 66, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 67, Gate.getportstate(gate, 3)) " @ @@ -89,70 +89,70 @@ datablock fxDtsBrickData(LogicGate_Enabler64Bit_Data){ " Gate.setportstate(gate, 127, Gate.getportstate(gate, 63)) " @ " Gate.setportstate(gate, 128, Gate.getportstate(gate, 64)) " @ " else " @ - " Gate.setportstate(gate, 65, false) " @ - " Gate.setportstate(gate, 66, false) " @ - " Gate.setportstate(gate, 67, false) " @ - " Gate.setportstate(gate, 68, false) " @ - " Gate.setportstate(gate, 69, false) " @ - " Gate.setportstate(gate, 70, false) " @ - " Gate.setportstate(gate, 71, false) " @ - " Gate.setportstate(gate, 72, false) " @ - " Gate.setportstate(gate, 73, false) " @ - " Gate.setportstate(gate, 74, false) " @ - " Gate.setportstate(gate, 75, false) " @ - " Gate.setportstate(gate, 76, false) " @ - " Gate.setportstate(gate, 77, false) " @ - " Gate.setportstate(gate, 78, false) " @ - " Gate.setportstate(gate, 79, false) " @ - " Gate.setportstate(gate, 80, false) " @ - " Gate.setportstate(gate, 81, false) " @ - " Gate.setportstate(gate, 82, false) " @ - " Gate.setportstate(gate, 83, false) " @ - " Gate.setportstate(gate, 84, false) " @ - " Gate.setportstate(gate, 85, false) " @ - " Gate.setportstate(gate, 86, false) " @ - " Gate.setportstate(gate, 87, false) " @ - " Gate.setportstate(gate, 88, false) " @ - " Gate.setportstate(gate, 89, false) " @ - " Gate.setportstate(gate, 90, false) " @ - " Gate.setportstate(gate, 91, false) " @ - " Gate.setportstate(gate, 92, false) " @ - " Gate.setportstate(gate, 93, false) " @ - " Gate.setportstate(gate, 94, false) " @ - " Gate.setportstate(gate, 95, false) " @ - " Gate.setportstate(gate, 96, false) " @ - " Gate.setportstate(gate, 97, false) " @ - " Gate.setportstate(gate, 98, false) " @ - " Gate.setportstate(gate, 99, false) " @ - " Gate.setportstate(gate, 100, false) " @ - " Gate.setportstate(gate, 101, false) " @ - " Gate.setportstate(gate, 102, false) " @ - " Gate.setportstate(gate, 103, false) " @ - " Gate.setportstate(gate, 104, false) " @ - " Gate.setportstate(gate, 105, false) " @ - " Gate.setportstate(gate, 106, false) " @ - " Gate.setportstate(gate, 107, false) " @ - " Gate.setportstate(gate, 108, false) " @ - " Gate.setportstate(gate, 109, false) " @ - " Gate.setportstate(gate, 110, false) " @ - " Gate.setportstate(gate, 111, false) " @ - " Gate.setportstate(gate, 112, false) " @ - " Gate.setportstate(gate, 113, false) " @ - " Gate.setportstate(gate, 114, false) " @ - " Gate.setportstate(gate, 115, false) " @ - " Gate.setportstate(gate, 116, false) " @ - " Gate.setportstate(gate, 117, false) " @ - " Gate.setportstate(gate, 118, false) " @ - " Gate.setportstate(gate, 119, false) " @ - " Gate.setportstate(gate, 120, false) " @ - " Gate.setportstate(gate, 121, false) " @ - " Gate.setportstate(gate, 122, false) " @ - " Gate.setportstate(gate, 123, false) " @ - " Gate.setportstate(gate, 124, false) " @ - " Gate.setportstate(gate, 125, false) " @ - " Gate.setportstate(gate, 126, false) " @ - " Gate.setportstate(gate, 127, false) " @ - " Gate.setportstate(gate, 128, false) " @ + " Gate.setportstate(gate, 65, 0) " @ + " Gate.setportstate(gate, 66, 0) " @ + " Gate.setportstate(gate, 67, 0) " @ + " Gate.setportstate(gate, 68, 0) " @ + " Gate.setportstate(gate, 69, 0) " @ + " Gate.setportstate(gate, 70, 0) " @ + " Gate.setportstate(gate, 71, 0) " @ + " Gate.setportstate(gate, 72, 0) " @ + " Gate.setportstate(gate, 73, 0) " @ + " Gate.setportstate(gate, 74, 0) " @ + " Gate.setportstate(gate, 75, 0) " @ + " Gate.setportstate(gate, 76, 0) " @ + " Gate.setportstate(gate, 77, 0) " @ + " Gate.setportstate(gate, 78, 0) " @ + " Gate.setportstate(gate, 79, 0) " @ + " Gate.setportstate(gate, 80, 0) " @ + " Gate.setportstate(gate, 81, 0) " @ + " Gate.setportstate(gate, 82, 0) " @ + " Gate.setportstate(gate, 83, 0) " @ + " Gate.setportstate(gate, 84, 0) " @ + " Gate.setportstate(gate, 85, 0) " @ + " Gate.setportstate(gate, 86, 0) " @ + " Gate.setportstate(gate, 87, 0) " @ + " Gate.setportstate(gate, 88, 0) " @ + " Gate.setportstate(gate, 89, 0) " @ + " Gate.setportstate(gate, 90, 0) " @ + " Gate.setportstate(gate, 91, 0) " @ + " Gate.setportstate(gate, 92, 0) " @ + " Gate.setportstate(gate, 93, 0) " @ + " Gate.setportstate(gate, 94, 0) " @ + " Gate.setportstate(gate, 95, 0) " @ + " Gate.setportstate(gate, 96, 0) " @ + " Gate.setportstate(gate, 97, 0) " @ + " Gate.setportstate(gate, 98, 0) " @ + " Gate.setportstate(gate, 99, 0) " @ + " Gate.setportstate(gate, 100, 0) " @ + " Gate.setportstate(gate, 101, 0) " @ + " Gate.setportstate(gate, 102, 0) " @ + " Gate.setportstate(gate, 103, 0) " @ + " Gate.setportstate(gate, 104, 0) " @ + " Gate.setportstate(gate, 105, 0) " @ + " Gate.setportstate(gate, 106, 0) " @ + " Gate.setportstate(gate, 107, 0) " @ + " Gate.setportstate(gate, 108, 0) " @ + " Gate.setportstate(gate, 109, 0) " @ + " Gate.setportstate(gate, 110, 0) " @ + " Gate.setportstate(gate, 111, 0) " @ + " Gate.setportstate(gate, 112, 0) " @ + " Gate.setportstate(gate, 113, 0) " @ + " Gate.setportstate(gate, 114, 0) " @ + " Gate.setportstate(gate, 115, 0) " @ + " Gate.setportstate(gate, 116, 0) " @ + " Gate.setportstate(gate, 117, 0) " @ + " Gate.setportstate(gate, 118, 0) " @ + " Gate.setportstate(gate, 119, 0) " @ + " Gate.setportstate(gate, 120, 0) " @ + " Gate.setportstate(gate, 121, 0) " @ + " Gate.setportstate(gate, 122, 0) " @ + " Gate.setportstate(gate, 123, 0) " @ + " Gate.setportstate(gate, 124, 0) " @ + " Gate.setportstate(gate, 125, 0) " @ + " Gate.setportstate(gate, 126, 0) " @ + " Gate.setportstate(gate, 127, 0) " @ + " Gate.setportstate(gate, 128, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 7 Bit Down.cs b/bricks/gen/newcode/Enabler 7 Bit Down.cs index 08daa6e..e48273b 100644 --- a/bricks/gen/newcode/Enabler 7 Bit Down.cs +++ b/bricks/gen/newcode/Enabler 7 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler7BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 15) then " @ + " if Gate.getportstate(gate, 15)~=0 then " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 3)) " @ @@ -32,13 +32,13 @@ datablock fxDtsBrickData(LogicGate_Enabler7BitDown_Data){ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 6)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 7)) " @ " else " @ - " Gate.setportstate(gate, 8, false) " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ + " Gate.setportstate(gate, 8, 0) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 7 Bit Up.cs b/bricks/gen/newcode/Enabler 7 Bit Up.cs index 62d7612..fb96649 100644 --- a/bricks/gen/newcode/Enabler 7 Bit Up.cs +++ b/bricks/gen/newcode/Enabler 7 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler7BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 15) then " @ + " if Gate.getportstate(gate, 15)~=0 then " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 3)) " @ @@ -32,13 +32,13 @@ datablock fxDtsBrickData(LogicGate_Enabler7BitUp_Data){ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 6)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 7)) " @ " else " @ - " Gate.setportstate(gate, 8, false) " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ + " Gate.setportstate(gate, 8, 0) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 7 Bit.cs b/bricks/gen/newcode/Enabler 7 Bit.cs index 063822e..33dd194 100644 --- a/bricks/gen/newcode/Enabler 7 Bit.cs +++ b/bricks/gen/newcode/Enabler 7 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler7Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 15) then " @ + " if Gate.getportstate(gate, 15)~=0 then " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 3)) " @ @@ -32,13 +32,13 @@ datablock fxDtsBrickData(LogicGate_Enabler7Bit_Data){ " Gate.setportstate(gate, 13, Gate.getportstate(gate, 6)) " @ " Gate.setportstate(gate, 14, Gate.getportstate(gate, 7)) " @ " else " @ - " Gate.setportstate(gate, 8, false) " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ + " Gate.setportstate(gate, 8, 0) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 8 Bit Down.cs b/bricks/gen/newcode/Enabler 8 Bit Down.cs index 8ec0f3a..94e3566 100644 --- a/bricks/gen/newcode/Enabler 8 Bit Down.cs +++ b/bricks/gen/newcode/Enabler 8 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler8BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 17) then " @ + " if Gate.getportstate(gate, 17)~=0 then " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 3)) " @ @@ -33,14 +33,14 @@ datablock fxDtsBrickData(LogicGate_Enabler8BitDown_Data){ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 7)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 8)) " @ " else " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 8 Bit Up.cs b/bricks/gen/newcode/Enabler 8 Bit Up.cs index a40bc71..df4c3c8 100644 --- a/bricks/gen/newcode/Enabler 8 Bit Up.cs +++ b/bricks/gen/newcode/Enabler 8 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler8BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 17) then " @ + " if Gate.getportstate(gate, 17)~=0 then " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 3)) " @ @@ -33,14 +33,14 @@ datablock fxDtsBrickData(LogicGate_Enabler8BitUp_Data){ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 7)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 8)) " @ " else " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 8 Bit.cs b/bricks/gen/newcode/Enabler 8 Bit.cs index e1573ce..7331556 100644 --- a/bricks/gen/newcode/Enabler 8 Bit.cs +++ b/bricks/gen/newcode/Enabler 8 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler8Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 17) then " @ + " if Gate.getportstate(gate, 17)~=0 then " @ " Gate.setportstate(gate, 9, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 3)) " @ @@ -33,14 +33,14 @@ datablock fxDtsBrickData(LogicGate_Enabler8Bit_Data){ " Gate.setportstate(gate, 15, Gate.getportstate(gate, 7)) " @ " Gate.setportstate(gate, 16, Gate.getportstate(gate, 8)) " @ " else " @ - " Gate.setportstate(gate, 9, false) " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ + " Gate.setportstate(gate, 9, 0) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 9 Bit Down.cs b/bricks/gen/newcode/Enabler 9 Bit Down.cs index 6df59a0..3b15414 100644 --- a/bricks/gen/newcode/Enabler 9 Bit Down.cs +++ b/bricks/gen/newcode/Enabler 9 Bit Down.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler9BitDown_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 19) then " @ + " if Gate.getportstate(gate, 19)~=0 then " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 3)) " @ @@ -34,15 +34,15 @@ datablock fxDtsBrickData(LogicGate_Enabler9BitDown_Data){ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 8)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 9)) " @ " else " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 9 Bit Up.cs b/bricks/gen/newcode/Enabler 9 Bit Up.cs index 2f55ced..2bf4edd 100644 --- a/bricks/gen/newcode/Enabler 9 Bit Up.cs +++ b/bricks/gen/newcode/Enabler 9 Bit Up.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler9BitUp_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 19) then " @ + " if Gate.getportstate(gate, 19)~=0 then " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 3)) " @ @@ -34,15 +34,15 @@ datablock fxDtsBrickData(LogicGate_Enabler9BitUp_Data){ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 8)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 9)) " @ " else " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Enabler 9 Bit.cs b/bricks/gen/newcode/Enabler 9 Bit.cs index 3df57cd..2d89733 100644 --- a/bricks/gen/newcode/Enabler 9 Bit.cs +++ b/bricks/gen/newcode/Enabler 9 Bit.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Enabler9Bit_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " if Gate.getportstate(gate, 19) then " @ + " if Gate.getportstate(gate, 19)~=0 then " @ " Gate.setportstate(gate, 10, Gate.getportstate(gate, 1)) " @ " Gate.setportstate(gate, 11, Gate.getportstate(gate, 2)) " @ " Gate.setportstate(gate, 12, Gate.getportstate(gate, 3)) " @ @@ -34,15 +34,15 @@ datablock fxDtsBrickData(LogicGate_Enabler9Bit_Data){ " Gate.setportstate(gate, 17, Gate.getportstate(gate, 8)) " @ " Gate.setportstate(gate, 18, Gate.getportstate(gate, 9)) " @ " else " @ - " Gate.setportstate(gate, 10, false) " @ - " Gate.setportstate(gate, 11, false) " @ - " Gate.setportstate(gate, 12, false) " @ - " Gate.setportstate(gate, 13, false) " @ - " Gate.setportstate(gate, 14, false) " @ - " Gate.setportstate(gate, 15, false) " @ - " Gate.setportstate(gate, 16, false) " @ - " Gate.setportstate(gate, 17, false) " @ - " Gate.setportstate(gate, 18, false) " @ + " Gate.setportstate(gate, 10, 0) " @ + " Gate.setportstate(gate, 11, 0) " @ + " Gate.setportstate(gate, 12, 0) " @ + " Gate.setportstate(gate, 13, 0) " @ + " Gate.setportstate(gate, 14, 0) " @ + " Gate.setportstate(gate, 15, 0) " @ + " Gate.setportstate(gate, 16, 0) " @ + " Gate.setportstate(gate, 17, 0) " @ + " Gate.setportstate(gate, 18, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Mux 1 Bit Vertical.cs b/bricks/gen/newcode/Mux 1 Bit Vertical.cs index 4485f68..2897b40 100644 --- a/bricks/gen/newcode/Mux 1 Bit Vertical.cs +++ b/bricks/gen/newcode/Mux 1 Bit Vertical.cs @@ -25,10 +25,10 @@ datablock fxDtsBrickData(LogicGate_Mux1Vertical_Data){ "return function(gate) " @ " if Gate.getportstate(gate, 4) then " @ " local idx = 2 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) " @ + " (Gate.getportstate(gate, 1) * 1) " @ " Gate.setportstate(gate, 5, Gate.getportstate(gate, idx)) " @ " else " @ - " Gate.setportstate(gate, 5, false) " @ + " Gate.setportstate(gate, 5, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Mux 1 Bit.cs b/bricks/gen/newcode/Mux 1 Bit.cs index ae097b1..2a3c4a3 100644 --- a/bricks/gen/newcode/Mux 1 Bit.cs +++ b/bricks/gen/newcode/Mux 1 Bit.cs @@ -25,10 +25,10 @@ datablock fxDtsBrickData(LogicGate_Mux1_Data){ "return function(gate) " @ " if Gate.getportstate(gate, 4) then " @ " local idx = 2 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) " @ + " (Gate.getportstate(gate, 1) * 1) " @ " Gate.setportstate(gate, 5, Gate.getportstate(gate, idx)) " @ " else " @ - " Gate.setportstate(gate, 5, false) " @ + " Gate.setportstate(gate, 5, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Mux 2 Bit Vertical.cs b/bricks/gen/newcode/Mux 2 Bit Vertical.cs index c07a50e..a69268b 100644 --- a/bricks/gen/newcode/Mux 2 Bit Vertical.cs +++ b/bricks/gen/newcode/Mux 2 Bit Vertical.cs @@ -25,11 +25,11 @@ datablock fxDtsBrickData(LogicGate_Mux2Vertical_Data){ "return function(gate) " @ " if Gate.getportstate(gate, 7) then " @ " local idx = 3 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) + " @ - " (bool_to_int[Gate.getportstate(gate, 2)] * 2) " @ + " (Gate.getportstate(gate, 1) * 1) + " @ + " (Gate.getportstate(gate, 2) * 2) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, idx)) " @ " else " @ - " Gate.setportstate(gate, 8, false) " @ + " Gate.setportstate(gate, 8, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Mux 2 Bit.cs b/bricks/gen/newcode/Mux 2 Bit.cs index cc94b3d..5fe328f 100644 --- a/bricks/gen/newcode/Mux 2 Bit.cs +++ b/bricks/gen/newcode/Mux 2 Bit.cs @@ -25,11 +25,11 @@ datablock fxDtsBrickData(LogicGate_Mux2_Data){ "return function(gate) " @ " if Gate.getportstate(gate, 7) then " @ " local idx = 3 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) + " @ - " (bool_to_int[Gate.getportstate(gate, 2)] * 2) " @ + " (Gate.getportstate(gate, 1) * 1) + " @ + " (Gate.getportstate(gate, 2) * 2) " @ " Gate.setportstate(gate, 8, Gate.getportstate(gate, idx)) " @ " else " @ - " Gate.setportstate(gate, 8, false) " @ + " Gate.setportstate(gate, 8, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Mux 3 Bit Vertical.cs b/bricks/gen/newcode/Mux 3 Bit Vertical.cs index 82b5d67..dc90957 100644 --- a/bricks/gen/newcode/Mux 3 Bit Vertical.cs +++ b/bricks/gen/newcode/Mux 3 Bit Vertical.cs @@ -25,12 +25,12 @@ datablock fxDtsBrickData(LogicGate_Mux3Vertical_Data){ "return function(gate) " @ " if Gate.getportstate(gate, 12) then " @ " local idx = 4 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) + " @ - " (bool_to_int[Gate.getportstate(gate, 2)] * 2) + " @ - " (bool_to_int[Gate.getportstate(gate, 3)] * 4) " @ + " (Gate.getportstate(gate, 1) * 1) + " @ + " (Gate.getportstate(gate, 2) * 2) + " @ + " (Gate.getportstate(gate, 3) * 4) " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, idx)) " @ " else " @ - " Gate.setportstate(gate, 13, false) " @ + " Gate.setportstate(gate, 13, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Mux 3 Bit.cs b/bricks/gen/newcode/Mux 3 Bit.cs index d760ce5..964b473 100644 --- a/bricks/gen/newcode/Mux 3 Bit.cs +++ b/bricks/gen/newcode/Mux 3 Bit.cs @@ -25,12 +25,12 @@ datablock fxDtsBrickData(LogicGate_Mux3_Data){ "return function(gate) " @ " if Gate.getportstate(gate, 12) then " @ " local idx = 4 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) + " @ - " (bool_to_int[Gate.getportstate(gate, 2)] * 2) + " @ - " (bool_to_int[Gate.getportstate(gate, 3)] * 4) " @ + " (Gate.getportstate(gate, 1) * 1) + " @ + " (Gate.getportstate(gate, 2) * 2) + " @ + " (Gate.getportstate(gate, 3) * 4) " @ " Gate.setportstate(gate, 13, Gate.getportstate(gate, idx)) " @ " else " @ - " Gate.setportstate(gate, 13, false) " @ + " Gate.setportstate(gate, 13, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Mux 4 Bit Vertical.cs b/bricks/gen/newcode/Mux 4 Bit Vertical.cs index 2131cd1..f853bdb 100644 --- a/bricks/gen/newcode/Mux 4 Bit Vertical.cs +++ b/bricks/gen/newcode/Mux 4 Bit Vertical.cs @@ -25,13 +25,13 @@ datablock fxDtsBrickData(LogicGate_Mux4Vertical_Data){ "return function(gate) " @ " if Gate.getportstate(gate, 21) then " @ " local idx = 5 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) + " @ - " (bool_to_int[Gate.getportstate(gate, 2)] * 2) + " @ - " (bool_to_int[Gate.getportstate(gate, 3)] * 4) + " @ - " (bool_to_int[Gate.getportstate(gate, 4)] * 8) " @ + " (Gate.getportstate(gate, 1) * 1) + " @ + " (Gate.getportstate(gate, 2) * 2) + " @ + " (Gate.getportstate(gate, 3) * 4) + " @ + " (Gate.getportstate(gate, 4) * 8) " @ " Gate.setportstate(gate, 22, Gate.getportstate(gate, idx)) " @ " else " @ - " Gate.setportstate(gate, 22, false) " @ + " Gate.setportstate(gate, 22, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Mux 4 Bit.cs b/bricks/gen/newcode/Mux 4 Bit.cs index 9fd0901..6d2ee05 100644 --- a/bricks/gen/newcode/Mux 4 Bit.cs +++ b/bricks/gen/newcode/Mux 4 Bit.cs @@ -25,13 +25,13 @@ datablock fxDtsBrickData(LogicGate_Mux4_Data){ "return function(gate) " @ " if Gate.getportstate(gate, 21) then " @ " local idx = 5 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) + " @ - " (bool_to_int[Gate.getportstate(gate, 2)] * 2) + " @ - " (bool_to_int[Gate.getportstate(gate, 3)] * 4) + " @ - " (bool_to_int[Gate.getportstate(gate, 4)] * 8) " @ + " (Gate.getportstate(gate, 1) * 1) + " @ + " (Gate.getportstate(gate, 2) * 2) + " @ + " (Gate.getportstate(gate, 3) * 4) + " @ + " (Gate.getportstate(gate, 4) * 8) " @ " Gate.setportstate(gate, 22, Gate.getportstate(gate, idx)) " @ " else " @ - " Gate.setportstate(gate, 22, false) " @ + " Gate.setportstate(gate, 22, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Mux 5 Bit Vertical.cs b/bricks/gen/newcode/Mux 5 Bit Vertical.cs index f1c99a2..ae7b16e 100644 --- a/bricks/gen/newcode/Mux 5 Bit Vertical.cs +++ b/bricks/gen/newcode/Mux 5 Bit Vertical.cs @@ -25,14 +25,14 @@ datablock fxDtsBrickData(LogicGate_Mux5Vertical_Data){ "return function(gate) " @ " if Gate.getportstate(gate, 38) then " @ " local idx = 6 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) + " @ - " (bool_to_int[Gate.getportstate(gate, 2)] * 2) + " @ - " (bool_to_int[Gate.getportstate(gate, 3)] * 4) + " @ - " (bool_to_int[Gate.getportstate(gate, 4)] * 8) + " @ - " (bool_to_int[Gate.getportstate(gate, 5)] * 16) " @ + " (Gate.getportstate(gate, 1) * 1) + " @ + " (Gate.getportstate(gate, 2) * 2) + " @ + " (Gate.getportstate(gate, 3) * 4) + " @ + " (Gate.getportstate(gate, 4) * 8) + " @ + " (Gate.getportstate(gate, 5) * 16) " @ " Gate.setportstate(gate, 39, Gate.getportstate(gate, idx)) " @ " else " @ - " Gate.setportstate(gate, 39, false) " @ + " Gate.setportstate(gate, 39, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Mux 5 Bit.cs b/bricks/gen/newcode/Mux 5 Bit.cs index a2f3c10..6120700 100644 --- a/bricks/gen/newcode/Mux 5 Bit.cs +++ b/bricks/gen/newcode/Mux 5 Bit.cs @@ -25,14 +25,14 @@ datablock fxDtsBrickData(LogicGate_Mux5_Data){ "return function(gate) " @ " if Gate.getportstate(gate, 38) then " @ " local idx = 6 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) + " @ - " (bool_to_int[Gate.getportstate(gate, 2)] * 2) + " @ - " (bool_to_int[Gate.getportstate(gate, 3)] * 4) + " @ - " (bool_to_int[Gate.getportstate(gate, 4)] * 8) + " @ - " (bool_to_int[Gate.getportstate(gate, 5)] * 16) " @ + " (Gate.getportstate(gate, 1) * 1) + " @ + " (Gate.getportstate(gate, 2) * 2) + " @ + " (Gate.getportstate(gate, 3) * 4) + " @ + " (Gate.getportstate(gate, 4) * 8) + " @ + " (Gate.getportstate(gate, 5) * 16) " @ " Gate.setportstate(gate, 39, Gate.getportstate(gate, idx)) " @ " else " @ - " Gate.setportstate(gate, 39, false) " @ + " Gate.setportstate(gate, 39, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Mux 6 Bit Vertical.cs b/bricks/gen/newcode/Mux 6 Bit Vertical.cs index 0067334..e9a83fb 100644 --- a/bricks/gen/newcode/Mux 6 Bit Vertical.cs +++ b/bricks/gen/newcode/Mux 6 Bit Vertical.cs @@ -25,15 +25,15 @@ datablock fxDtsBrickData(LogicGate_Mux6Vertical_Data){ "return function(gate) " @ " if Gate.getportstate(gate, 71) then " @ " local idx = 7 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) + " @ - " (bool_to_int[Gate.getportstate(gate, 2)] * 2) + " @ - " (bool_to_int[Gate.getportstate(gate, 3)] * 4) + " @ - " (bool_to_int[Gate.getportstate(gate, 4)] * 8) + " @ - " (bool_to_int[Gate.getportstate(gate, 5)] * 16) + " @ - " (bool_to_int[Gate.getportstate(gate, 6)] * 32) " @ + " (Gate.getportstate(gate, 1) * 1) + " @ + " (Gate.getportstate(gate, 2) * 2) + " @ + " (Gate.getportstate(gate, 3) * 4) + " @ + " (Gate.getportstate(gate, 4) * 8) + " @ + " (Gate.getportstate(gate, 5) * 16) + " @ + " (Gate.getportstate(gate, 6) * 32) " @ " Gate.setportstate(gate, 72, Gate.getportstate(gate, idx)) " @ " else " @ - " Gate.setportstate(gate, 72, false) " @ + " Gate.setportstate(gate, 72, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/Mux 6 Bit.cs b/bricks/gen/newcode/Mux 6 Bit.cs index c8937e5..19524fc 100644 --- a/bricks/gen/newcode/Mux 6 Bit.cs +++ b/bricks/gen/newcode/Mux 6 Bit.cs @@ -25,15 +25,15 @@ datablock fxDtsBrickData(LogicGate_Mux6_Data){ "return function(gate) " @ " if Gate.getportstate(gate, 71) then " @ " local idx = 7 + " @ - " (bool_to_int[Gate.getportstate(gate, 1)] * 1) + " @ - " (bool_to_int[Gate.getportstate(gate, 2)] * 2) + " @ - " (bool_to_int[Gate.getportstate(gate, 3)] * 4) + " @ - " (bool_to_int[Gate.getportstate(gate, 4)] * 8) + " @ - " (bool_to_int[Gate.getportstate(gate, 5)] * 16) + " @ - " (bool_to_int[Gate.getportstate(gate, 6)] * 32) " @ + " (Gate.getportstate(gate, 1) * 1) + " @ + " (Gate.getportstate(gate, 2) * 2) + " @ + " (Gate.getportstate(gate, 3) * 4) + " @ + " (Gate.getportstate(gate, 4) * 8) + " @ + " (Gate.getportstate(gate, 5) * 16) + " @ + " (Gate.getportstate(gate, 6) * 32) " @ " Gate.setportstate(gate, 72, Gate.getportstate(gate, idx)) " @ " else " @ - " Gate.setportstate(gate, 72, false) " @ + " Gate.setportstate(gate, 72, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/NAND 2 Bit Vertical.cs b/bricks/gen/newcode/NAND 2 Bit Vertical.cs index 841af01..2eb5c5d 100644 --- a/bricks/gen/newcode/NAND 2 Bit Vertical.cs +++ b/bricks/gen/newcode/NAND 2 Bit Vertical.cs @@ -23,10 +23,10 @@ datablock fxDtsBrickData(LogicGate_GateNand2Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 3, not ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) " @ - " )) " @ + " Gate.setportstate(gate, 3, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NAND 2 Bit.cs b/bricks/gen/newcode/NAND 2 Bit.cs index 23d67d4..4fea10c 100644 --- a/bricks/gen/newcode/NAND 2 Bit.cs +++ b/bricks/gen/newcode/NAND 2 Bit.cs @@ -23,10 +23,10 @@ datablock fxDtsBrickData(LogicGate_GateNand2_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 3, not ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) " @ - " )) " @ + " Gate.setportstate(gate, 3, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NAND 3 Bit Vertical.cs b/bricks/gen/newcode/NAND 3 Bit Vertical.cs index 8c03d11..8d933f3 100644 --- a/bricks/gen/newcode/NAND 3 Bit Vertical.cs +++ b/bricks/gen/newcode/NAND 3 Bit Vertical.cs @@ -23,11 +23,11 @@ datablock fxDtsBrickData(LogicGate_GateNand3Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 4, not ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) " @ - " )) " @ + " Gate.setportstate(gate, 4, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NAND 3 Bit.cs b/bricks/gen/newcode/NAND 3 Bit.cs index 215e261..af457f2 100644 --- a/bricks/gen/newcode/NAND 3 Bit.cs +++ b/bricks/gen/newcode/NAND 3 Bit.cs @@ -23,11 +23,11 @@ datablock fxDtsBrickData(LogicGate_GateNand3_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 4, not ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) " @ - " )) " @ + " Gate.setportstate(gate, 4, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NAND 4 Bit Vertical.cs b/bricks/gen/newcode/NAND 4 Bit Vertical.cs index dbcbe56..29d4b44 100644 --- a/bricks/gen/newcode/NAND 4 Bit Vertical.cs +++ b/bricks/gen/newcode/NAND 4 Bit Vertical.cs @@ -23,12 +23,12 @@ datablock fxDtsBrickData(LogicGate_GateNand4Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 5, not ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) and " @ - " Gate.getportstate(gate, 4) " @ - " )) " @ + " Gate.setportstate(gate, 5, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) and " @ + " (Gate.getportstate(gate, 4)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NAND 4 Bit.cs b/bricks/gen/newcode/NAND 4 Bit.cs index 97c35a3..8ba3851 100644 --- a/bricks/gen/newcode/NAND 4 Bit.cs +++ b/bricks/gen/newcode/NAND 4 Bit.cs @@ -23,12 +23,12 @@ datablock fxDtsBrickData(LogicGate_GateNand4_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 5, not ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) and " @ - " Gate.getportstate(gate, 4) " @ - " )) " @ + " Gate.setportstate(gate, 5, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) and " @ + " (Gate.getportstate(gate, 4)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NAND 5 Bit Vertical.cs b/bricks/gen/newcode/NAND 5 Bit Vertical.cs index 50fb878..ecaac4a 100644 --- a/bricks/gen/newcode/NAND 5 Bit Vertical.cs +++ b/bricks/gen/newcode/NAND 5 Bit Vertical.cs @@ -23,13 +23,13 @@ datablock fxDtsBrickData(LogicGate_GateNand5Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 6, not ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) and " @ - " Gate.getportstate(gate, 4) and " @ - " Gate.getportstate(gate, 5) " @ - " )) " @ + " Gate.setportstate(gate, 6, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) and " @ + " (Gate.getportstate(gate, 4)~=0) and " @ + " (Gate.getportstate(gate, 5)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NAND 5 Bit.cs b/bricks/gen/newcode/NAND 5 Bit.cs index ed48c2c..84b5e98 100644 --- a/bricks/gen/newcode/NAND 5 Bit.cs +++ b/bricks/gen/newcode/NAND 5 Bit.cs @@ -23,13 +23,13 @@ datablock fxDtsBrickData(LogicGate_GateNand5_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 6, not ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) and " @ - " Gate.getportstate(gate, 4) and " @ - " Gate.getportstate(gate, 5) " @ - " )) " @ + " Gate.setportstate(gate, 6, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) and " @ + " (Gate.getportstate(gate, 4)~=0) and " @ + " (Gate.getportstate(gate, 5)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NAND 6 Bit Vertical.cs b/bricks/gen/newcode/NAND 6 Bit Vertical.cs index 7c6dd51..a05ccbc 100644 --- a/bricks/gen/newcode/NAND 6 Bit Vertical.cs +++ b/bricks/gen/newcode/NAND 6 Bit Vertical.cs @@ -23,14 +23,14 @@ datablock fxDtsBrickData(LogicGate_GateNand6Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 7, not ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) and " @ - " Gate.getportstate(gate, 4) and " @ - " Gate.getportstate(gate, 5) and " @ - " Gate.getportstate(gate, 6) " @ - " )) " @ + " Gate.setportstate(gate, 7, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) and " @ + " (Gate.getportstate(gate, 4)~=0) and " @ + " (Gate.getportstate(gate, 5)~=0) and " @ + " (Gate.getportstate(gate, 6)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NAND 6 Bit.cs b/bricks/gen/newcode/NAND 6 Bit.cs index 4ddd186..6e33156 100644 --- a/bricks/gen/newcode/NAND 6 Bit.cs +++ b/bricks/gen/newcode/NAND 6 Bit.cs @@ -23,14 +23,14 @@ datablock fxDtsBrickData(LogicGate_GateNand6_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 7, not ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) and " @ - " Gate.getportstate(gate, 4) and " @ - " Gate.getportstate(gate, 5) and " @ - " Gate.getportstate(gate, 6) " @ - " )) " @ + " Gate.setportstate(gate, 7, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) and " @ + " (Gate.getportstate(gate, 4)~=0) and " @ + " (Gate.getportstate(gate, 5)~=0) and " @ + " (Gate.getportstate(gate, 6)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NAND 7 Bit Vertical.cs b/bricks/gen/newcode/NAND 7 Bit Vertical.cs index e5aea82..190983a 100644 --- a/bricks/gen/newcode/NAND 7 Bit Vertical.cs +++ b/bricks/gen/newcode/NAND 7 Bit Vertical.cs @@ -23,15 +23,15 @@ datablock fxDtsBrickData(LogicGate_GateNand7Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 8, not ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) and " @ - " Gate.getportstate(gate, 4) and " @ - " Gate.getportstate(gate, 5) and " @ - " Gate.getportstate(gate, 6) and " @ - " Gate.getportstate(gate, 7) " @ - " )) " @ + " Gate.setportstate(gate, 8, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) and " @ + " (Gate.getportstate(gate, 4)~=0) and " @ + " (Gate.getportstate(gate, 5)~=0) and " @ + " (Gate.getportstate(gate, 6)~=0) and " @ + " (Gate.getportstate(gate, 7)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NAND 7 Bit.cs b/bricks/gen/newcode/NAND 7 Bit.cs index 82c9aed..1dc2dc5 100644 --- a/bricks/gen/newcode/NAND 7 Bit.cs +++ b/bricks/gen/newcode/NAND 7 Bit.cs @@ -23,15 +23,15 @@ datablock fxDtsBrickData(LogicGate_GateNand7_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 8, not ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) and " @ - " Gate.getportstate(gate, 4) and " @ - " Gate.getportstate(gate, 5) and " @ - " Gate.getportstate(gate, 6) and " @ - " Gate.getportstate(gate, 7) " @ - " )) " @ + " Gate.setportstate(gate, 8, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) and " @ + " (Gate.getportstate(gate, 4)~=0) and " @ + " (Gate.getportstate(gate, 5)~=0) and " @ + " (Gate.getportstate(gate, 6)~=0) and " @ + " (Gate.getportstate(gate, 7)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NAND 8 Bit Vertical.cs b/bricks/gen/newcode/NAND 8 Bit Vertical.cs index 190a923..2aa7347 100644 --- a/bricks/gen/newcode/NAND 8 Bit Vertical.cs +++ b/bricks/gen/newcode/NAND 8 Bit Vertical.cs @@ -23,16 +23,16 @@ datablock fxDtsBrickData(LogicGate_GateNand8Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 9, not ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) and " @ - " Gate.getportstate(gate, 4) and " @ - " Gate.getportstate(gate, 5) and " @ - " Gate.getportstate(gate, 6) and " @ - " Gate.getportstate(gate, 7) and " @ - " Gate.getportstate(gate, 8) " @ - " )) " @ + " Gate.setportstate(gate, 9, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) and " @ + " (Gate.getportstate(gate, 4)~=0) and " @ + " (Gate.getportstate(gate, 5)~=0) and " @ + " (Gate.getportstate(gate, 6)~=0) and " @ + " (Gate.getportstate(gate, 7)~=0) and " @ + " (Gate.getportstate(gate, 8)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NAND 8 Bit.cs b/bricks/gen/newcode/NAND 8 Bit.cs index 2aafe77..7a8e193 100644 --- a/bricks/gen/newcode/NAND 8 Bit.cs +++ b/bricks/gen/newcode/NAND 8 Bit.cs @@ -23,16 +23,16 @@ datablock fxDtsBrickData(LogicGate_GateNand8_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 9, not ( " @ - " Gate.getportstate(gate, 1) and " @ - " Gate.getportstate(gate, 2) and " @ - " Gate.getportstate(gate, 3) and " @ - " Gate.getportstate(gate, 4) and " @ - " Gate.getportstate(gate, 5) and " @ - " Gate.getportstate(gate, 6) and " @ - " Gate.getportstate(gate, 7) and " @ - " Gate.getportstate(gate, 8) " @ - " )) " @ + " Gate.setportstate(gate, 9, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) and " @ + " (Gate.getportstate(gate, 2)~=0) and " @ + " (Gate.getportstate(gate, 3)~=0) and " @ + " (Gate.getportstate(gate, 4)~=0) and " @ + " (Gate.getportstate(gate, 5)~=0) and " @ + " (Gate.getportstate(gate, 6)~=0) and " @ + " (Gate.getportstate(gate, 7)~=0) and " @ + " (Gate.getportstate(gate, 8)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NOR 2 Bit Vertical.cs b/bricks/gen/newcode/NOR 2 Bit Vertical.cs index d8399cb..b0c113d 100644 --- a/bricks/gen/newcode/NOR 2 Bit Vertical.cs +++ b/bricks/gen/newcode/NOR 2 Bit Vertical.cs @@ -23,10 +23,10 @@ datablock fxDtsBrickData(LogicGate_GateNor2Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 3, not ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) " @ - " )) " @ + " Gate.setportstate(gate, 3, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NOR 2 Bit.cs b/bricks/gen/newcode/NOR 2 Bit.cs index 44d510b..1b66938 100644 --- a/bricks/gen/newcode/NOR 2 Bit.cs +++ b/bricks/gen/newcode/NOR 2 Bit.cs @@ -23,10 +23,10 @@ datablock fxDtsBrickData(LogicGate_GateNor2_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 3, not ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) " @ - " )) " @ + " Gate.setportstate(gate, 3, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NOR 3 Bit Vertical.cs b/bricks/gen/newcode/NOR 3 Bit Vertical.cs index dafd8ca..3b3d0fd 100644 --- a/bricks/gen/newcode/NOR 3 Bit Vertical.cs +++ b/bricks/gen/newcode/NOR 3 Bit Vertical.cs @@ -23,11 +23,11 @@ datablock fxDtsBrickData(LogicGate_GateNor3Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 4, not ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) " @ - " )) " @ + " Gate.setportstate(gate, 4, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NOR 3 Bit.cs b/bricks/gen/newcode/NOR 3 Bit.cs index df87045..2ae36a3 100644 --- a/bricks/gen/newcode/NOR 3 Bit.cs +++ b/bricks/gen/newcode/NOR 3 Bit.cs @@ -23,11 +23,11 @@ datablock fxDtsBrickData(LogicGate_GateNor3_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 4, not ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) " @ - " )) " @ + " Gate.setportstate(gate, 4, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NOR 4 Bit Vertical.cs b/bricks/gen/newcode/NOR 4 Bit Vertical.cs index f49cba5..d57a906 100644 --- a/bricks/gen/newcode/NOR 4 Bit Vertical.cs +++ b/bricks/gen/newcode/NOR 4 Bit Vertical.cs @@ -23,12 +23,12 @@ datablock fxDtsBrickData(LogicGate_GateNor4Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 5, not ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) or " @ - " Gate.getportstate(gate, 4) " @ - " )) " @ + " Gate.setportstate(gate, 5, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) or " @ + " (Gate.getportstate(gate, 4)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NOR 4 Bit.cs b/bricks/gen/newcode/NOR 4 Bit.cs index ec99ee5..f7b5bff 100644 --- a/bricks/gen/newcode/NOR 4 Bit.cs +++ b/bricks/gen/newcode/NOR 4 Bit.cs @@ -23,12 +23,12 @@ datablock fxDtsBrickData(LogicGate_GateNor4_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 5, not ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) or " @ - " Gate.getportstate(gate, 4) " @ - " )) " @ + " Gate.setportstate(gate, 5, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) or " @ + " (Gate.getportstate(gate, 4)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NOR 5 Bit Vertical.cs b/bricks/gen/newcode/NOR 5 Bit Vertical.cs index cd88cb6..3f25c38 100644 --- a/bricks/gen/newcode/NOR 5 Bit Vertical.cs +++ b/bricks/gen/newcode/NOR 5 Bit Vertical.cs @@ -23,13 +23,13 @@ datablock fxDtsBrickData(LogicGate_GateNor5Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 6, not ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) or " @ - " Gate.getportstate(gate, 4) or " @ - " Gate.getportstate(gate, 5) " @ - " )) " @ + " Gate.setportstate(gate, 6, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) or " @ + " (Gate.getportstate(gate, 4)~=0) or " @ + " (Gate.getportstate(gate, 5)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NOR 5 Bit.cs b/bricks/gen/newcode/NOR 5 Bit.cs index 168d2d0..bfe9987 100644 --- a/bricks/gen/newcode/NOR 5 Bit.cs +++ b/bricks/gen/newcode/NOR 5 Bit.cs @@ -23,13 +23,13 @@ datablock fxDtsBrickData(LogicGate_GateNor5_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 6, not ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) or " @ - " Gate.getportstate(gate, 4) or " @ - " Gate.getportstate(gate, 5) " @ - " )) " @ + " Gate.setportstate(gate, 6, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) or " @ + " (Gate.getportstate(gate, 4)~=0) or " @ + " (Gate.getportstate(gate, 5)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NOR 6 Bit Vertical.cs b/bricks/gen/newcode/NOR 6 Bit Vertical.cs index e945371..feaaf39 100644 --- a/bricks/gen/newcode/NOR 6 Bit Vertical.cs +++ b/bricks/gen/newcode/NOR 6 Bit Vertical.cs @@ -23,14 +23,14 @@ datablock fxDtsBrickData(LogicGate_GateNor6Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 7, not ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) or " @ - " Gate.getportstate(gate, 4) or " @ - " Gate.getportstate(gate, 5) or " @ - " Gate.getportstate(gate, 6) " @ - " )) " @ + " Gate.setportstate(gate, 7, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) or " @ + " (Gate.getportstate(gate, 4)~=0) or " @ + " (Gate.getportstate(gate, 5)~=0) or " @ + " (Gate.getportstate(gate, 6)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NOR 6 Bit.cs b/bricks/gen/newcode/NOR 6 Bit.cs index 12fd62b..4a099d0 100644 --- a/bricks/gen/newcode/NOR 6 Bit.cs +++ b/bricks/gen/newcode/NOR 6 Bit.cs @@ -23,14 +23,14 @@ datablock fxDtsBrickData(LogicGate_GateNor6_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 7, not ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) or " @ - " Gate.getportstate(gate, 4) or " @ - " Gate.getportstate(gate, 5) or " @ - " Gate.getportstate(gate, 6) " @ - " )) " @ + " Gate.setportstate(gate, 7, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) or " @ + " (Gate.getportstate(gate, 4)~=0) or " @ + " (Gate.getportstate(gate, 5)~=0) or " @ + " (Gate.getportstate(gate, 6)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NOR 7 Bit Vertical.cs b/bricks/gen/newcode/NOR 7 Bit Vertical.cs index d44f973..323633b 100644 --- a/bricks/gen/newcode/NOR 7 Bit Vertical.cs +++ b/bricks/gen/newcode/NOR 7 Bit Vertical.cs @@ -23,15 +23,15 @@ datablock fxDtsBrickData(LogicGate_GateNor7Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 8, not ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) or " @ - " Gate.getportstate(gate, 4) or " @ - " Gate.getportstate(gate, 5) or " @ - " Gate.getportstate(gate, 6) or " @ - " Gate.getportstate(gate, 7) " @ - " )) " @ + " Gate.setportstate(gate, 8, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) or " @ + " (Gate.getportstate(gate, 4)~=0) or " @ + " (Gate.getportstate(gate, 5)~=0) or " @ + " (Gate.getportstate(gate, 6)~=0) or " @ + " (Gate.getportstate(gate, 7)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NOR 7 Bit.cs b/bricks/gen/newcode/NOR 7 Bit.cs index 4f43152..6bc5c3e 100644 --- a/bricks/gen/newcode/NOR 7 Bit.cs +++ b/bricks/gen/newcode/NOR 7 Bit.cs @@ -23,15 +23,15 @@ datablock fxDtsBrickData(LogicGate_GateNor7_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 8, not ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) or " @ - " Gate.getportstate(gate, 4) or " @ - " Gate.getportstate(gate, 5) or " @ - " Gate.getportstate(gate, 6) or " @ - " Gate.getportstate(gate, 7) " @ - " )) " @ + " Gate.setportstate(gate, 8, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) or " @ + " (Gate.getportstate(gate, 4)~=0) or " @ + " (Gate.getportstate(gate, 5)~=0) or " @ + " (Gate.getportstate(gate, 6)~=0) or " @ + " (Gate.getportstate(gate, 7)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NOR 8 Bit Vertical.cs b/bricks/gen/newcode/NOR 8 Bit Vertical.cs index 1b894e1..1cd85a6 100644 --- a/bricks/gen/newcode/NOR 8 Bit Vertical.cs +++ b/bricks/gen/newcode/NOR 8 Bit Vertical.cs @@ -23,16 +23,16 @@ datablock fxDtsBrickData(LogicGate_GateNor8Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 9, not ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) or " @ - " Gate.getportstate(gate, 4) or " @ - " Gate.getportstate(gate, 5) or " @ - " Gate.getportstate(gate, 6) or " @ - " Gate.getportstate(gate, 7) or " @ - " Gate.getportstate(gate, 8) " @ - " )) " @ + " Gate.setportstate(gate, 9, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) or " @ + " (Gate.getportstate(gate, 4)~=0) or " @ + " (Gate.getportstate(gate, 5)~=0) or " @ + " (Gate.getportstate(gate, 6)~=0) or " @ + " (Gate.getportstate(gate, 7)~=0) or " @ + " (Gate.getportstate(gate, 8)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/NOR 8 Bit.cs b/bricks/gen/newcode/NOR 8 Bit.cs index ccea3e5..2a19f31 100644 --- a/bricks/gen/newcode/NOR 8 Bit.cs +++ b/bricks/gen/newcode/NOR 8 Bit.cs @@ -23,16 +23,16 @@ datablock fxDtsBrickData(LogicGate_GateNor8_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 9, not ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) or " @ - " Gate.getportstate(gate, 4) or " @ - " Gate.getportstate(gate, 5) or " @ - " Gate.getportstate(gate, 6) or " @ - " Gate.getportstate(gate, 7) or " @ - " Gate.getportstate(gate, 8) " @ - " )) " @ + " Gate.setportstate(gate, 9, (not ( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) or " @ + " (Gate.getportstate(gate, 4)~=0) or " @ + " (Gate.getportstate(gate, 5)~=0) or " @ + " (Gate.getportstate(gate, 6)~=0) or " @ + " (Gate.getportstate(gate, 7)~=0) or " @ + " (Gate.getportstate(gate, 8)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/OR 2 Bit Vertical.cs b/bricks/gen/newcode/OR 2 Bit Vertical.cs index 396461f..e1c9d30 100644 --- a/bricks/gen/newcode/OR 2 Bit Vertical.cs +++ b/bricks/gen/newcode/OR 2 Bit Vertical.cs @@ -23,10 +23,10 @@ datablock fxDtsBrickData(LogicGate_GateOr2Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 3, ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) " @ - " )) " @ + " Gate.setportstate(gate, 3, (( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/OR 2 Bit.cs b/bricks/gen/newcode/OR 2 Bit.cs index 8675377..149765d 100644 --- a/bricks/gen/newcode/OR 2 Bit.cs +++ b/bricks/gen/newcode/OR 2 Bit.cs @@ -23,10 +23,10 @@ datablock fxDtsBrickData(LogicGate_GateOr2_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 3, ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) " @ - " )) " @ + " Gate.setportstate(gate, 3, (( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/OR 3 Bit Vertical.cs b/bricks/gen/newcode/OR 3 Bit Vertical.cs index 503cd6a..be31af4 100644 --- a/bricks/gen/newcode/OR 3 Bit Vertical.cs +++ b/bricks/gen/newcode/OR 3 Bit Vertical.cs @@ -23,11 +23,11 @@ datablock fxDtsBrickData(LogicGate_GateOr3Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 4, ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) " @ - " )) " @ + " Gate.setportstate(gate, 4, (( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/OR 3 Bit.cs b/bricks/gen/newcode/OR 3 Bit.cs index 7686aff..2bd60a4 100644 --- a/bricks/gen/newcode/OR 3 Bit.cs +++ b/bricks/gen/newcode/OR 3 Bit.cs @@ -23,11 +23,11 @@ datablock fxDtsBrickData(LogicGate_GateOr3_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 4, ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) " @ - " )) " @ + " Gate.setportstate(gate, 4, (( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/OR 4 Bit Vertical.cs b/bricks/gen/newcode/OR 4 Bit Vertical.cs index 01f16ce..a467e4a 100644 --- a/bricks/gen/newcode/OR 4 Bit Vertical.cs +++ b/bricks/gen/newcode/OR 4 Bit Vertical.cs @@ -23,12 +23,12 @@ datablock fxDtsBrickData(LogicGate_GateOr4Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 5, ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) or " @ - " Gate.getportstate(gate, 4) " @ - " )) " @ + " Gate.setportstate(gate, 5, (( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) or " @ + " (Gate.getportstate(gate, 4)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/OR 4 Bit.cs b/bricks/gen/newcode/OR 4 Bit.cs index e6853bb..b87049c 100644 --- a/bricks/gen/newcode/OR 4 Bit.cs +++ b/bricks/gen/newcode/OR 4 Bit.cs @@ -23,12 +23,12 @@ datablock fxDtsBrickData(LogicGate_GateOr4_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 5, ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) or " @ - " Gate.getportstate(gate, 4) " @ - " )) " @ + " Gate.setportstate(gate, 5, (( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) or " @ + " (Gate.getportstate(gate, 4)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/OR 5 Bit Vertical.cs b/bricks/gen/newcode/OR 5 Bit Vertical.cs index 409becf..f5bdedb 100644 --- a/bricks/gen/newcode/OR 5 Bit Vertical.cs +++ b/bricks/gen/newcode/OR 5 Bit Vertical.cs @@ -23,13 +23,13 @@ datablock fxDtsBrickData(LogicGate_GateOr5Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 6, ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) or " @ - " Gate.getportstate(gate, 4) or " @ - " Gate.getportstate(gate, 5) " @ - " )) " @ + " Gate.setportstate(gate, 6, (( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) or " @ + " (Gate.getportstate(gate, 4)~=0) or " @ + " (Gate.getportstate(gate, 5)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/OR 5 Bit.cs b/bricks/gen/newcode/OR 5 Bit.cs index 3ba6c02..0506c19 100644 --- a/bricks/gen/newcode/OR 5 Bit.cs +++ b/bricks/gen/newcode/OR 5 Bit.cs @@ -23,13 +23,13 @@ datablock fxDtsBrickData(LogicGate_GateOr5_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 6, ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) or " @ - " Gate.getportstate(gate, 4) or " @ - " Gate.getportstate(gate, 5) " @ - " )) " @ + " Gate.setportstate(gate, 6, (( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) or " @ + " (Gate.getportstate(gate, 4)~=0) or " @ + " (Gate.getportstate(gate, 5)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/OR 6 Bit Vertical.cs b/bricks/gen/newcode/OR 6 Bit Vertical.cs index ebbff1a..82c2871 100644 --- a/bricks/gen/newcode/OR 6 Bit Vertical.cs +++ b/bricks/gen/newcode/OR 6 Bit Vertical.cs @@ -23,14 +23,14 @@ datablock fxDtsBrickData(LogicGate_GateOr6Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 7, ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) or " @ - " Gate.getportstate(gate, 4) or " @ - " Gate.getportstate(gate, 5) or " @ - " Gate.getportstate(gate, 6) " @ - " )) " @ + " Gate.setportstate(gate, 7, (( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) or " @ + " (Gate.getportstate(gate, 4)~=0) or " @ + " (Gate.getportstate(gate, 5)~=0) or " @ + " (Gate.getportstate(gate, 6)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/OR 6 Bit.cs b/bricks/gen/newcode/OR 6 Bit.cs index ef2a529..b5fa09b 100644 --- a/bricks/gen/newcode/OR 6 Bit.cs +++ b/bricks/gen/newcode/OR 6 Bit.cs @@ -23,14 +23,14 @@ datablock fxDtsBrickData(LogicGate_GateOr6_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 7, ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) or " @ - " Gate.getportstate(gate, 4) or " @ - " Gate.getportstate(gate, 5) or " @ - " Gate.getportstate(gate, 6) " @ - " )) " @ + " Gate.setportstate(gate, 7, (( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) or " @ + " (Gate.getportstate(gate, 4)~=0) or " @ + " (Gate.getportstate(gate, 5)~=0) or " @ + " (Gate.getportstate(gate, 6)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/OR 7 Bit Vertical.cs b/bricks/gen/newcode/OR 7 Bit Vertical.cs index 7e5e712..c1e02b2 100644 --- a/bricks/gen/newcode/OR 7 Bit Vertical.cs +++ b/bricks/gen/newcode/OR 7 Bit Vertical.cs @@ -23,15 +23,15 @@ datablock fxDtsBrickData(LogicGate_GateOr7Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 8, ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) or " @ - " Gate.getportstate(gate, 4) or " @ - " Gate.getportstate(gate, 5) or " @ - " Gate.getportstate(gate, 6) or " @ - " Gate.getportstate(gate, 7) " @ - " )) " @ + " Gate.setportstate(gate, 8, (( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) or " @ + " (Gate.getportstate(gate, 4)~=0) or " @ + " (Gate.getportstate(gate, 5)~=0) or " @ + " (Gate.getportstate(gate, 6)~=0) or " @ + " (Gate.getportstate(gate, 7)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/OR 7 Bit.cs b/bricks/gen/newcode/OR 7 Bit.cs index 45ec6f1..177d603 100644 --- a/bricks/gen/newcode/OR 7 Bit.cs +++ b/bricks/gen/newcode/OR 7 Bit.cs @@ -23,15 +23,15 @@ datablock fxDtsBrickData(LogicGate_GateOr7_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 8, ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) or " @ - " Gate.getportstate(gate, 4) or " @ - " Gate.getportstate(gate, 5) or " @ - " Gate.getportstate(gate, 6) or " @ - " Gate.getportstate(gate, 7) " @ - " )) " @ + " Gate.setportstate(gate, 8, (( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) or " @ + " (Gate.getportstate(gate, 4)~=0) or " @ + " (Gate.getportstate(gate, 5)~=0) or " @ + " (Gate.getportstate(gate, 6)~=0) or " @ + " (Gate.getportstate(gate, 7)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/OR 8 Bit Vertical.cs b/bricks/gen/newcode/OR 8 Bit Vertical.cs index 795e36c..bfedf11 100644 --- a/bricks/gen/newcode/OR 8 Bit Vertical.cs +++ b/bricks/gen/newcode/OR 8 Bit Vertical.cs @@ -23,16 +23,16 @@ datablock fxDtsBrickData(LogicGate_GateOr8Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 9, ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) or " @ - " Gate.getportstate(gate, 4) or " @ - " Gate.getportstate(gate, 5) or " @ - " Gate.getportstate(gate, 6) or " @ - " Gate.getportstate(gate, 7) or " @ - " Gate.getportstate(gate, 8) " @ - " )) " @ + " Gate.setportstate(gate, 9, (( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) or " @ + " (Gate.getportstate(gate, 4)~=0) or " @ + " (Gate.getportstate(gate, 5)~=0) or " @ + " (Gate.getportstate(gate, 6)~=0) or " @ + " (Gate.getportstate(gate, 7)~=0) or " @ + " (Gate.getportstate(gate, 8)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/OR 8 Bit.cs b/bricks/gen/newcode/OR 8 Bit.cs index e204df0..54fb250 100644 --- a/bricks/gen/newcode/OR 8 Bit.cs +++ b/bricks/gen/newcode/OR 8 Bit.cs @@ -23,16 +23,16 @@ datablock fxDtsBrickData(LogicGate_GateOr8_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 9, ( " @ - " Gate.getportstate(gate, 1) or " @ - " Gate.getportstate(gate, 2) or " @ - " Gate.getportstate(gate, 3) or " @ - " Gate.getportstate(gate, 4) or " @ - " Gate.getportstate(gate, 5) or " @ - " Gate.getportstate(gate, 6) or " @ - " Gate.getportstate(gate, 7) or " @ - " Gate.getportstate(gate, 8) " @ - " )) " @ + " Gate.setportstate(gate, 9, (( " @ + " (Gate.getportstate(gate, 1)~=0) or " @ + " (Gate.getportstate(gate, 2)~=0) or " @ + " (Gate.getportstate(gate, 3)~=0) or " @ + " (Gate.getportstate(gate, 4)~=0) or " @ + " (Gate.getportstate(gate, 5)~=0) or " @ + " (Gate.getportstate(gate, 6)~=0) or " @ + " (Gate.getportstate(gate, 7)~=0) or " @ + " (Gate.getportstate(gate, 8)~=0) " @ + " )) and 1 or 0) " @ "end" ; logicGlobal = ""; diff --git a/bricks/gen/newcode/ROM 16x16.cs b/bricks/gen/newcode/ROM 16x16.cs index 00475c9..f2f80ab 100644 --- a/bricks/gen/newcode/ROM 16x16.cs +++ b/bricks/gen/newcode/ROM 16x16.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Rom16x16_Data){ "return function(gate) " @ " gate.romdata = {} " @ " for i = 0, 255 do " @ - " gate.romdata[i] = false " @ + " gate.romdata[i] = 0 " @ " end " @ "end" ; @@ -32,7 +32,7 @@ datablock fxDtsBrickData(LogicGate_Rom16x16_Data){ " local data = args[1] " @ " for i = 1, #data do " @ " local c = data:sub(i, i) " @ - " gate.romdata[i-1] = (c==\"1\") " @ + " gate.romdata[i-1] = (c==\"1\") and 1 or 0 " @ " end " @ " Gate.queue(gate, 0) " @ "end" @@ -41,17 +41,17 @@ datablock fxDtsBrickData(LogicGate_Rom16x16_Data){ "return function(gate) " @ " if Gate.getportstate(gate, 10) then " @ " Gate.setportstate(gate, 9, gate.romdata[( " @ - " (Gate.getportstate(gate, 1) and 1 or 0) " @ - " + (Gate.getportstate(gate, 2) and 2 or 0) " @ - " + (Gate.getportstate(gate, 3) and 4 or 0) " @ - " + (Gate.getportstate(gate, 4) and 8 or 0) " @ - " + (Gate.getportstate(gate, 5) and 16 or 0) " @ - " + (Gate.getportstate(gate, 6) and 32 or 0) " @ - " + (Gate.getportstate(gate, 7) and 64 or 0) " @ - " + (Gate.getportstate(gate, 8) and 128 or 0) " @ + " (Gate.getportstate(gate, 1)) " @ + " + (Gate.getportstate(gate, 2) * 2) " @ + " + (Gate.getportstate(gate, 3) * 4) " @ + " + (Gate.getportstate(gate, 4) * 8) " @ + " + (Gate.getportstate(gate, 5) * 16) " @ + " + (Gate.getportstate(gate, 6) * 32) " @ + " + (Gate.getportstate(gate, 7) * 64) " @ + " + (Gate.getportstate(gate, 8) * 128) " @ " )]) " @ " else " @ - " Gate.setportstate(gate, 9, false) " @ + " Gate.setportstate(gate, 9, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/ROM 16x8.cs b/bricks/gen/newcode/ROM 16x8.cs index 99bb974..8ca8544 100644 --- a/bricks/gen/newcode/ROM 16x8.cs +++ b/bricks/gen/newcode/ROM 16x8.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Rom16x8_Data){ "return function(gate) " @ " gate.romdata = {} " @ " for i = 0, 127 do " @ - " gate.romdata[i] = false " @ + " gate.romdata[i] = 0 " @ " end " @ "end" ; @@ -32,7 +32,7 @@ datablock fxDtsBrickData(LogicGate_Rom16x8_Data){ " local data = args[1] " @ " for i = 1, #data do " @ " local c = data:sub(i, i) " @ - " gate.romdata[i-1] = (c==\"1\") " @ + " gate.romdata[i-1] = (c==\"1\") and 1 or 0 " @ " end " @ " Gate.queue(gate, 0) " @ "end" @@ -41,16 +41,16 @@ datablock fxDtsBrickData(LogicGate_Rom16x8_Data){ "return function(gate) " @ " if Gate.getportstate(gate, 9) then " @ " Gate.setportstate(gate, 8, gate.romdata[( " @ - " (Gate.getportstate(gate, 1) and 1 or 0) " @ - " + (Gate.getportstate(gate, 2) and 2 or 0) " @ - " + (Gate.getportstate(gate, 3) and 4 or 0) " @ - " + (Gate.getportstate(gate, 4) and 8 or 0) " @ - " + (Gate.getportstate(gate, 5) and 16 or 0) " @ - " + (Gate.getportstate(gate, 6) and 32 or 0) " @ - " + (Gate.getportstate(gate, 7) and 64 or 0) " @ + " (Gate.getportstate(gate, 1)) " @ + " + (Gate.getportstate(gate, 2) * 2) " @ + " + (Gate.getportstate(gate, 3) * 4) " @ + " + (Gate.getportstate(gate, 4) * 8) " @ + " + (Gate.getportstate(gate, 5) * 16) " @ + " + (Gate.getportstate(gate, 6) * 32) " @ + " + (Gate.getportstate(gate, 7) * 64) " @ " )]) " @ " else " @ - " Gate.setportstate(gate, 8, false) " @ + " Gate.setportstate(gate, 8, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/ROM 32x16.cs b/bricks/gen/newcode/ROM 32x16.cs index 68e8f79..e4dab02 100644 --- a/bricks/gen/newcode/ROM 32x16.cs +++ b/bricks/gen/newcode/ROM 32x16.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Rom32x16_Data){ "return function(gate) " @ " gate.romdata = {} " @ " for i = 0, 511 do " @ - " gate.romdata[i] = false " @ + " gate.romdata[i] = 0 " @ " end " @ "end" ; @@ -32,7 +32,7 @@ datablock fxDtsBrickData(LogicGate_Rom32x16_Data){ " local data = args[1] " @ " for i = 1, #data do " @ " local c = data:sub(i, i) " @ - " gate.romdata[i-1] = (c==\"1\") " @ + " gate.romdata[i-1] = (c==\"1\") and 1 or 0 " @ " end " @ " Gate.queue(gate, 0) " @ "end" @@ -41,18 +41,18 @@ datablock fxDtsBrickData(LogicGate_Rom32x16_Data){ "return function(gate) " @ " if Gate.getportstate(gate, 11) then " @ " Gate.setportstate(gate, 10, gate.romdata[( " @ - " (Gate.getportstate(gate, 1) and 1 or 0) " @ - " + (Gate.getportstate(gate, 2) and 2 or 0) " @ - " + (Gate.getportstate(gate, 3) and 4 or 0) " @ - " + (Gate.getportstate(gate, 4) and 8 or 0) " @ - " + (Gate.getportstate(gate, 5) and 16 or 0) " @ - " + (Gate.getportstate(gate, 6) and 32 or 0) " @ - " + (Gate.getportstate(gate, 7) and 64 or 0) " @ - " + (Gate.getportstate(gate, 8) and 128 or 0) " @ - " + (Gate.getportstate(gate, 9) and 256 or 0) " @ + " (Gate.getportstate(gate, 1)) " @ + " + (Gate.getportstate(gate, 2) * 2) " @ + " + (Gate.getportstate(gate, 3) * 4) " @ + " + (Gate.getportstate(gate, 4) * 8) " @ + " + (Gate.getportstate(gate, 5) * 16) " @ + " + (Gate.getportstate(gate, 6) * 32) " @ + " + (Gate.getportstate(gate, 7) * 64) " @ + " + (Gate.getportstate(gate, 8) * 128) " @ + " + (Gate.getportstate(gate, 9) * 256) " @ " )]) " @ " else " @ - " Gate.setportstate(gate, 10, false) " @ + " Gate.setportstate(gate, 10, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/ROM 32x32.cs b/bricks/gen/newcode/ROM 32x32.cs index a50d2e8..a5f1030 100644 --- a/bricks/gen/newcode/ROM 32x32.cs +++ b/bricks/gen/newcode/ROM 32x32.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Rom32x32_Data){ "return function(gate) " @ " gate.romdata = {} " @ " for i = 0, 1023 do " @ - " gate.romdata[i] = false " @ + " gate.romdata[i] = 0 " @ " end " @ "end" ; @@ -32,7 +32,7 @@ datablock fxDtsBrickData(LogicGate_Rom32x32_Data){ " local data = args[1] " @ " for i = 1, #data do " @ " local c = data:sub(i, i) " @ - " gate.romdata[i-1] = (c==\"1\") " @ + " gate.romdata[i-1] = (c==\"1\") and 1 or 0 " @ " end " @ " Gate.queue(gate, 0) " @ "end" @@ -41,19 +41,19 @@ datablock fxDtsBrickData(LogicGate_Rom32x32_Data){ "return function(gate) " @ " if Gate.getportstate(gate, 12) then " @ " Gate.setportstate(gate, 11, gate.romdata[( " @ - " (Gate.getportstate(gate, 1) and 1 or 0) " @ - " + (Gate.getportstate(gate, 2) and 2 or 0) " @ - " + (Gate.getportstate(gate, 3) and 4 or 0) " @ - " + (Gate.getportstate(gate, 4) and 8 or 0) " @ - " + (Gate.getportstate(gate, 5) and 16 or 0) " @ - " + (Gate.getportstate(gate, 6) and 32 or 0) " @ - " + (Gate.getportstate(gate, 7) and 64 or 0) " @ - " + (Gate.getportstate(gate, 8) and 128 or 0) " @ - " + (Gate.getportstate(gate, 9) and 256 or 0) " @ - " + (Gate.getportstate(gate, 10) and 512 or 0) " @ + " (Gate.getportstate(gate, 1)) " @ + " + (Gate.getportstate(gate, 2) * 2) " @ + " + (Gate.getportstate(gate, 3) * 4) " @ + " + (Gate.getportstate(gate, 4) * 8) " @ + " + (Gate.getportstate(gate, 5) * 16) " @ + " + (Gate.getportstate(gate, 6) * 32) " @ + " + (Gate.getportstate(gate, 7) * 64) " @ + " + (Gate.getportstate(gate, 8) * 128) " @ + " + (Gate.getportstate(gate, 9) * 256) " @ + " + (Gate.getportstate(gate, 10) * 512) " @ " )]) " @ " else " @ - " Gate.setportstate(gate, 11, false) " @ + " Gate.setportstate(gate, 11, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/ROM 4x4.cs b/bricks/gen/newcode/ROM 4x4.cs index 85e535d..cf6299b 100644 --- a/bricks/gen/newcode/ROM 4x4.cs +++ b/bricks/gen/newcode/ROM 4x4.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Rom4x4_Data){ "return function(gate) " @ " gate.romdata = {} " @ " for i = 0, 15 do " @ - " gate.romdata[i] = false " @ + " gate.romdata[i] = 0 " @ " end " @ "end" ; @@ -32,7 +32,7 @@ datablock fxDtsBrickData(LogicGate_Rom4x4_Data){ " local data = args[1] " @ " for i = 1, #data do " @ " local c = data:sub(i, i) " @ - " gate.romdata[i-1] = (c==\"1\") " @ + " gate.romdata[i-1] = (c==\"1\") and 1 or 0 " @ " end " @ " Gate.queue(gate, 0) " @ "end" @@ -41,13 +41,13 @@ datablock fxDtsBrickData(LogicGate_Rom4x4_Data){ "return function(gate) " @ " if Gate.getportstate(gate, 6) then " @ " Gate.setportstate(gate, 5, gate.romdata[( " @ - " (Gate.getportstate(gate, 1) and 1 or 0) " @ - " + (Gate.getportstate(gate, 2) and 2 or 0) " @ - " + (Gate.getportstate(gate, 3) and 4 or 0) " @ - " + (Gate.getportstate(gate, 4) and 8 or 0) " @ + " (Gate.getportstate(gate, 1)) " @ + " + (Gate.getportstate(gate, 2) * 2) " @ + " + (Gate.getportstate(gate, 3) * 4) " @ + " + (Gate.getportstate(gate, 4) * 8) " @ " )]) " @ " else " @ - " Gate.setportstate(gate, 5, false) " @ + " Gate.setportstate(gate, 5, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/ROM 8x4.cs b/bricks/gen/newcode/ROM 8x4.cs index 066ac6e..30e8a7c 100644 --- a/bricks/gen/newcode/ROM 8x4.cs +++ b/bricks/gen/newcode/ROM 8x4.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Rom8x4_Data){ "return function(gate) " @ " gate.romdata = {} " @ " for i = 0, 31 do " @ - " gate.romdata[i] = false " @ + " gate.romdata[i] = 0 " @ " end " @ "end" ; @@ -32,7 +32,7 @@ datablock fxDtsBrickData(LogicGate_Rom8x4_Data){ " local data = args[1] " @ " for i = 1, #data do " @ " local c = data:sub(i, i) " @ - " gate.romdata[i-1] = (c==\"1\") " @ + " gate.romdata[i-1] = (c==\"1\") and 1 or 0 " @ " end " @ " Gate.queue(gate, 0) " @ "end" @@ -41,14 +41,14 @@ datablock fxDtsBrickData(LogicGate_Rom8x4_Data){ "return function(gate) " @ " if Gate.getportstate(gate, 7) then " @ " Gate.setportstate(gate, 6, gate.romdata[( " @ - " (Gate.getportstate(gate, 1) and 1 or 0) " @ - " + (Gate.getportstate(gate, 2) and 2 or 0) " @ - " + (Gate.getportstate(gate, 3) and 4 or 0) " @ - " + (Gate.getportstate(gate, 4) and 8 or 0) " @ - " + (Gate.getportstate(gate, 5) and 16 or 0) " @ + " (Gate.getportstate(gate, 1)) " @ + " + (Gate.getportstate(gate, 2) * 2) " @ + " + (Gate.getportstate(gate, 3) * 4) " @ + " + (Gate.getportstate(gate, 4) * 8) " @ + " + (Gate.getportstate(gate, 5) * 16) " @ " )]) " @ " else " @ - " Gate.setportstate(gate, 6, false) " @ + " Gate.setportstate(gate, 6, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/ROM 8x8.cs b/bricks/gen/newcode/ROM 8x8.cs index 6a62ce6..b5515b4 100644 --- a/bricks/gen/newcode/ROM 8x8.cs +++ b/bricks/gen/newcode/ROM 8x8.cs @@ -23,7 +23,7 @@ datablock fxDtsBrickData(LogicGate_Rom8x8_Data){ "return function(gate) " @ " gate.romdata = {} " @ " for i = 0, 63 do " @ - " gate.romdata[i] = false " @ + " gate.romdata[i] = 0 " @ " end " @ "end" ; @@ -32,7 +32,7 @@ datablock fxDtsBrickData(LogicGate_Rom8x8_Data){ " local data = args[1] " @ " for i = 1, #data do " @ " local c = data:sub(i, i) " @ - " gate.romdata[i-1] = (c==\"1\") " @ + " gate.romdata[i-1] = (c==\"1\") and 1 or 0 " @ " end " @ " Gate.queue(gate, 0) " @ "end" @@ -41,15 +41,15 @@ datablock fxDtsBrickData(LogicGate_Rom8x8_Data){ "return function(gate) " @ " if Gate.getportstate(gate, 8) then " @ " Gate.setportstate(gate, 7, gate.romdata[( " @ - " (Gate.getportstate(gate, 1) and 1 or 0) " @ - " + (Gate.getportstate(gate, 2) and 2 or 0) " @ - " + (Gate.getportstate(gate, 3) and 4 or 0) " @ - " + (Gate.getportstate(gate, 4) and 8 or 0) " @ - " + (Gate.getportstate(gate, 5) and 16 or 0) " @ - " + (Gate.getportstate(gate, 6) and 32 or 0) " @ + " (Gate.getportstate(gate, 1)) " @ + " + (Gate.getportstate(gate, 2) * 2) " @ + " + (Gate.getportstate(gate, 3) * 4) " @ + " + (Gate.getportstate(gate, 4) * 8) " @ + " + (Gate.getportstate(gate, 5) * 16) " @ + " + (Gate.getportstate(gate, 6) * 32) " @ " )]) " @ " else " @ - " Gate.setportstate(gate, 7, false) " @ + " Gate.setportstate(gate, 7, 0) " @ " end " @ "end" ; diff --git a/bricks/gen/newcode/XNOR 2 Bit Vertical.cs b/bricks/gen/newcode/XNOR 2 Bit Vertical.cs index 79b92ea..82808f2 100644 --- a/bricks/gen/newcode/XNOR 2 Bit Vertical.cs +++ b/bricks/gen/newcode/XNOR 2 Bit Vertical.cs @@ -23,9 +23,9 @@ datablock fxDtsBrickData(LogicGate_GateXnor2Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = true " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ + " local v = 1 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 3, v) " @ "end" ; diff --git a/bricks/gen/newcode/XNOR 2 Bit.cs b/bricks/gen/newcode/XNOR 2 Bit.cs index 2868389..3a2c4d9 100644 --- a/bricks/gen/newcode/XNOR 2 Bit.cs +++ b/bricks/gen/newcode/XNOR 2 Bit.cs @@ -23,9 +23,9 @@ datablock fxDtsBrickData(LogicGate_GateXnor2_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = true " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ + " local v = 1 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 3, v) " @ "end" ; diff --git a/bricks/gen/newcode/XNOR 3 Bit Vertical.cs b/bricks/gen/newcode/XNOR 3 Bit Vertical.cs index d483c34..3735d98 100644 --- a/bricks/gen/newcode/XNOR 3 Bit Vertical.cs +++ b/bricks/gen/newcode/XNOR 3 Bit Vertical.cs @@ -23,10 +23,10 @@ datablock fxDtsBrickData(LogicGate_GateXnor3Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = true " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ + " local v = 1 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 4, v) " @ "end" ; diff --git a/bricks/gen/newcode/XNOR 3 Bit.cs b/bricks/gen/newcode/XNOR 3 Bit.cs index 3e4bf8f..4ac3b50 100644 --- a/bricks/gen/newcode/XNOR 3 Bit.cs +++ b/bricks/gen/newcode/XNOR 3 Bit.cs @@ -23,10 +23,10 @@ datablock fxDtsBrickData(LogicGate_GateXnor3_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = true " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ + " local v = 1 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 4, v) " @ "end" ; diff --git a/bricks/gen/newcode/XNOR 4 Bit Vertical.cs b/bricks/gen/newcode/XNOR 4 Bit Vertical.cs index 75166df..0a9c30f 100644 --- a/bricks/gen/newcode/XNOR 4 Bit Vertical.cs +++ b/bricks/gen/newcode/XNOR 4 Bit Vertical.cs @@ -23,11 +23,11 @@ datablock fxDtsBrickData(LogicGate_GateXnor4Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = true " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ - " if Gate.getportstate(gate, 4) then v = not v end " @ + " local v = 1 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 4)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 5, v) " @ "end" ; diff --git a/bricks/gen/newcode/XNOR 4 Bit.cs b/bricks/gen/newcode/XNOR 4 Bit.cs index 23fa767..2534f78 100644 --- a/bricks/gen/newcode/XNOR 4 Bit.cs +++ b/bricks/gen/newcode/XNOR 4 Bit.cs @@ -23,11 +23,11 @@ datablock fxDtsBrickData(LogicGate_GateXnor4_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = true " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ - " if Gate.getportstate(gate, 4) then v = not v end " @ + " local v = 1 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 4)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 5, v) " @ "end" ; diff --git a/bricks/gen/newcode/XNOR 5 Bit Vertical.cs b/bricks/gen/newcode/XNOR 5 Bit Vertical.cs index e653dfa..26def1c 100644 --- a/bricks/gen/newcode/XNOR 5 Bit Vertical.cs +++ b/bricks/gen/newcode/XNOR 5 Bit Vertical.cs @@ -23,12 +23,12 @@ datablock fxDtsBrickData(LogicGate_GateXnor5Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = true " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ - " if Gate.getportstate(gate, 4) then v = not v end " @ - " if Gate.getportstate(gate, 5) then v = not v end " @ + " local v = 1 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 4)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 5)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 6, v) " @ "end" ; diff --git a/bricks/gen/newcode/XNOR 5 Bit.cs b/bricks/gen/newcode/XNOR 5 Bit.cs index 9ed3a0b..1880496 100644 --- a/bricks/gen/newcode/XNOR 5 Bit.cs +++ b/bricks/gen/newcode/XNOR 5 Bit.cs @@ -23,12 +23,12 @@ datablock fxDtsBrickData(LogicGate_GateXnor5_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = true " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ - " if Gate.getportstate(gate, 4) then v = not v end " @ - " if Gate.getportstate(gate, 5) then v = not v end " @ + " local v = 1 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 4)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 5)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 6, v) " @ "end" ; diff --git a/bricks/gen/newcode/XNOR 6 Bit Vertical.cs b/bricks/gen/newcode/XNOR 6 Bit Vertical.cs index 5b0d232..766fb0b 100644 --- a/bricks/gen/newcode/XNOR 6 Bit Vertical.cs +++ b/bricks/gen/newcode/XNOR 6 Bit Vertical.cs @@ -23,13 +23,13 @@ datablock fxDtsBrickData(LogicGate_GateXnor6Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = true " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ - " if Gate.getportstate(gate, 4) then v = not v end " @ - " if Gate.getportstate(gate, 5) then v = not v end " @ - " if Gate.getportstate(gate, 6) then v = not v end " @ + " local v = 1 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 4)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 5)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 6)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 7, v) " @ "end" ; diff --git a/bricks/gen/newcode/XNOR 6 Bit.cs b/bricks/gen/newcode/XNOR 6 Bit.cs index 8be0175..306fd54 100644 --- a/bricks/gen/newcode/XNOR 6 Bit.cs +++ b/bricks/gen/newcode/XNOR 6 Bit.cs @@ -23,13 +23,13 @@ datablock fxDtsBrickData(LogicGate_GateXnor6_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = true " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ - " if Gate.getportstate(gate, 4) then v = not v end " @ - " if Gate.getportstate(gate, 5) then v = not v end " @ - " if Gate.getportstate(gate, 6) then v = not v end " @ + " local v = 1 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 4)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 5)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 6)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 7, v) " @ "end" ; diff --git a/bricks/gen/newcode/XNOR 7 Bit Vertical.cs b/bricks/gen/newcode/XNOR 7 Bit Vertical.cs index 9f4eeb8..3363f9b 100644 --- a/bricks/gen/newcode/XNOR 7 Bit Vertical.cs +++ b/bricks/gen/newcode/XNOR 7 Bit Vertical.cs @@ -23,14 +23,14 @@ datablock fxDtsBrickData(LogicGate_GateXnor7Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = true " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ - " if Gate.getportstate(gate, 4) then v = not v end " @ - " if Gate.getportstate(gate, 5) then v = not v end " @ - " if Gate.getportstate(gate, 6) then v = not v end " @ - " if Gate.getportstate(gate, 7) then v = not v end " @ + " local v = 1 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 4)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 5)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 6)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 7)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 8, v) " @ "end" ; diff --git a/bricks/gen/newcode/XNOR 7 Bit.cs b/bricks/gen/newcode/XNOR 7 Bit.cs index 16ec836..1c0abf7 100644 --- a/bricks/gen/newcode/XNOR 7 Bit.cs +++ b/bricks/gen/newcode/XNOR 7 Bit.cs @@ -23,14 +23,14 @@ datablock fxDtsBrickData(LogicGate_GateXnor7_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = true " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ - " if Gate.getportstate(gate, 4) then v = not v end " @ - " if Gate.getportstate(gate, 5) then v = not v end " @ - " if Gate.getportstate(gate, 6) then v = not v end " @ - " if Gate.getportstate(gate, 7) then v = not v end " @ + " local v = 1 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 4)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 5)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 6)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 7)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 8, v) " @ "end" ; diff --git a/bricks/gen/newcode/XNOR 8 Bit Vertical.cs b/bricks/gen/newcode/XNOR 8 Bit Vertical.cs index e294cde..ff8b097 100644 --- a/bricks/gen/newcode/XNOR 8 Bit Vertical.cs +++ b/bricks/gen/newcode/XNOR 8 Bit Vertical.cs @@ -23,15 +23,15 @@ datablock fxDtsBrickData(LogicGate_GateXnor8Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = true " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ - " if Gate.getportstate(gate, 4) then v = not v end " @ - " if Gate.getportstate(gate, 5) then v = not v end " @ - " if Gate.getportstate(gate, 6) then v = not v end " @ - " if Gate.getportstate(gate, 7) then v = not v end " @ - " if Gate.getportstate(gate, 8) then v = not v end " @ + " local v = 1 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 4)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 5)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 6)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 7)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 8)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 9, v) " @ "end" ; diff --git a/bricks/gen/newcode/XNOR 8 Bit.cs b/bricks/gen/newcode/XNOR 8 Bit.cs index 8b8d928..7fd6d30 100644 --- a/bricks/gen/newcode/XNOR 8 Bit.cs +++ b/bricks/gen/newcode/XNOR 8 Bit.cs @@ -23,15 +23,15 @@ datablock fxDtsBrickData(LogicGate_GateXnor8_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = true " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ - " if Gate.getportstate(gate, 4) then v = not v end " @ - " if Gate.getportstate(gate, 5) then v = not v end " @ - " if Gate.getportstate(gate, 6) then v = not v end " @ - " if Gate.getportstate(gate, 7) then v = not v end " @ - " if Gate.getportstate(gate, 8) then v = not v end " @ + " local v = 1 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 4)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 5)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 6)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 7)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 8)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 9, v) " @ "end" ; diff --git a/bricks/gen/newcode/XOR 2 Bit Vertical.cs b/bricks/gen/newcode/XOR 2 Bit Vertical.cs index fdfa5dd..aa1c5a0 100644 --- a/bricks/gen/newcode/XOR 2 Bit Vertical.cs +++ b/bricks/gen/newcode/XOR 2 Bit Vertical.cs @@ -23,9 +23,9 @@ datablock fxDtsBrickData(LogicGate_GateXor2Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = false " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ + " local v = 0 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 3, v) " @ "end" ; diff --git a/bricks/gen/newcode/XOR 2 Bit.cs b/bricks/gen/newcode/XOR 2 Bit.cs index 496b54e..1385605 100644 --- a/bricks/gen/newcode/XOR 2 Bit.cs +++ b/bricks/gen/newcode/XOR 2 Bit.cs @@ -23,9 +23,9 @@ datablock fxDtsBrickData(LogicGate_GateXor2_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = false " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ + " local v = 0 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 3, v) " @ "end" ; diff --git a/bricks/gen/newcode/XOR 3 Bit Vertical.cs b/bricks/gen/newcode/XOR 3 Bit Vertical.cs index d33773a..58ebed0 100644 --- a/bricks/gen/newcode/XOR 3 Bit Vertical.cs +++ b/bricks/gen/newcode/XOR 3 Bit Vertical.cs @@ -23,10 +23,10 @@ datablock fxDtsBrickData(LogicGate_GateXor3Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = false " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ + " local v = 0 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 4, v) " @ "end" ; diff --git a/bricks/gen/newcode/XOR 3 Bit.cs b/bricks/gen/newcode/XOR 3 Bit.cs index 048f16e..f0cd552 100644 --- a/bricks/gen/newcode/XOR 3 Bit.cs +++ b/bricks/gen/newcode/XOR 3 Bit.cs @@ -23,10 +23,10 @@ datablock fxDtsBrickData(LogicGate_GateXor3_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = false " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ + " local v = 0 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 4, v) " @ "end" ; diff --git a/bricks/gen/newcode/XOR 4 Bit Vertical.cs b/bricks/gen/newcode/XOR 4 Bit Vertical.cs index 4754e3d..e728a0e 100644 --- a/bricks/gen/newcode/XOR 4 Bit Vertical.cs +++ b/bricks/gen/newcode/XOR 4 Bit Vertical.cs @@ -23,11 +23,11 @@ datablock fxDtsBrickData(LogicGate_GateXor4Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = false " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ - " if Gate.getportstate(gate, 4) then v = not v end " @ + " local v = 0 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 4)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 5, v) " @ "end" ; diff --git a/bricks/gen/newcode/XOR 4 Bit.cs b/bricks/gen/newcode/XOR 4 Bit.cs index 222a092..70923af 100644 --- a/bricks/gen/newcode/XOR 4 Bit.cs +++ b/bricks/gen/newcode/XOR 4 Bit.cs @@ -23,11 +23,11 @@ datablock fxDtsBrickData(LogicGate_GateXor4_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = false " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ - " if Gate.getportstate(gate, 4) then v = not v end " @ + " local v = 0 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 4)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 5, v) " @ "end" ; diff --git a/bricks/gen/newcode/XOR 5 Bit Vertical.cs b/bricks/gen/newcode/XOR 5 Bit Vertical.cs index 453a1e8..9294ea7 100644 --- a/bricks/gen/newcode/XOR 5 Bit Vertical.cs +++ b/bricks/gen/newcode/XOR 5 Bit Vertical.cs @@ -23,12 +23,12 @@ datablock fxDtsBrickData(LogicGate_GateXor5Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = false " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ - " if Gate.getportstate(gate, 4) then v = not v end " @ - " if Gate.getportstate(gate, 5) then v = not v end " @ + " local v = 0 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 4)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 5)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 6, v) " @ "end" ; diff --git a/bricks/gen/newcode/XOR 5 Bit.cs b/bricks/gen/newcode/XOR 5 Bit.cs index 3c40422..94051c9 100644 --- a/bricks/gen/newcode/XOR 5 Bit.cs +++ b/bricks/gen/newcode/XOR 5 Bit.cs @@ -23,12 +23,12 @@ datablock fxDtsBrickData(LogicGate_GateXor5_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = false " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ - " if Gate.getportstate(gate, 4) then v = not v end " @ - " if Gate.getportstate(gate, 5) then v = not v end " @ + " local v = 0 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 4)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 5)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 6, v) " @ "end" ; diff --git a/bricks/gen/newcode/XOR 6 Bit Vertical.cs b/bricks/gen/newcode/XOR 6 Bit Vertical.cs index 73dbbb6..83cae80 100644 --- a/bricks/gen/newcode/XOR 6 Bit Vertical.cs +++ b/bricks/gen/newcode/XOR 6 Bit Vertical.cs @@ -23,13 +23,13 @@ datablock fxDtsBrickData(LogicGate_GateXor6Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = false " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ - " if Gate.getportstate(gate, 4) then v = not v end " @ - " if Gate.getportstate(gate, 5) then v = not v end " @ - " if Gate.getportstate(gate, 6) then v = not v end " @ + " local v = 0 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 4)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 5)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 6)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 7, v) " @ "end" ; diff --git a/bricks/gen/newcode/XOR 6 Bit.cs b/bricks/gen/newcode/XOR 6 Bit.cs index 66f70e3..5c72dc7 100644 --- a/bricks/gen/newcode/XOR 6 Bit.cs +++ b/bricks/gen/newcode/XOR 6 Bit.cs @@ -23,13 +23,13 @@ datablock fxDtsBrickData(LogicGate_GateXor6_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = false " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ - " if Gate.getportstate(gate, 4) then v = not v end " @ - " if Gate.getportstate(gate, 5) then v = not v end " @ - " if Gate.getportstate(gate, 6) then v = not v end " @ + " local v = 0 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 4)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 5)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 6)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 7, v) " @ "end" ; diff --git a/bricks/gen/newcode/XOR 7 Bit Vertical.cs b/bricks/gen/newcode/XOR 7 Bit Vertical.cs index 1019013..03b9479 100644 --- a/bricks/gen/newcode/XOR 7 Bit Vertical.cs +++ b/bricks/gen/newcode/XOR 7 Bit Vertical.cs @@ -23,14 +23,14 @@ datablock fxDtsBrickData(LogicGate_GateXor7Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = false " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ - " if Gate.getportstate(gate, 4) then v = not v end " @ - " if Gate.getportstate(gate, 5) then v = not v end " @ - " if Gate.getportstate(gate, 6) then v = not v end " @ - " if Gate.getportstate(gate, 7) then v = not v end " @ + " local v = 0 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 4)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 5)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 6)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 7)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 8, v) " @ "end" ; diff --git a/bricks/gen/newcode/XOR 7 Bit.cs b/bricks/gen/newcode/XOR 7 Bit.cs index 332019b..7c15dba 100644 --- a/bricks/gen/newcode/XOR 7 Bit.cs +++ b/bricks/gen/newcode/XOR 7 Bit.cs @@ -23,14 +23,14 @@ datablock fxDtsBrickData(LogicGate_GateXor7_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = false " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ - " if Gate.getportstate(gate, 4) then v = not v end " @ - " if Gate.getportstate(gate, 5) then v = not v end " @ - " if Gate.getportstate(gate, 6) then v = not v end " @ - " if Gate.getportstate(gate, 7) then v = not v end " @ + " local v = 0 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 4)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 5)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 6)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 7)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 8, v) " @ "end" ; diff --git a/bricks/gen/newcode/XOR 8 Bit Vertical.cs b/bricks/gen/newcode/XOR 8 Bit Vertical.cs index c5fb913..f284a58 100644 --- a/bricks/gen/newcode/XOR 8 Bit Vertical.cs +++ b/bricks/gen/newcode/XOR 8 Bit Vertical.cs @@ -23,15 +23,15 @@ datablock fxDtsBrickData(LogicGate_GateXor8Vertical_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = false " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ - " if Gate.getportstate(gate, 4) then v = not v end " @ - " if Gate.getportstate(gate, 5) then v = not v end " @ - " if Gate.getportstate(gate, 6) then v = not v end " @ - " if Gate.getportstate(gate, 7) then v = not v end " @ - " if Gate.getportstate(gate, 8) then v = not v end " @ + " local v = 0 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 4)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 5)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 6)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 7)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 8)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 9, v) " @ "end" ; diff --git a/bricks/gen/newcode/XOR 8 Bit.cs b/bricks/gen/newcode/XOR 8 Bit.cs index 5a50289..af12ab2 100644 --- a/bricks/gen/newcode/XOR 8 Bit.cs +++ b/bricks/gen/newcode/XOR 8 Bit.cs @@ -23,15 +23,15 @@ datablock fxDtsBrickData(LogicGate_GateXor8_Data){ logicInput = ""; logicUpdate = "return function(gate) " @ - " local v = false " @ - " if Gate.getportstate(gate, 1) then v = not v end " @ - " if Gate.getportstate(gate, 2) then v = not v end " @ - " if Gate.getportstate(gate, 3) then v = not v end " @ - " if Gate.getportstate(gate, 4) then v = not v end " @ - " if Gate.getportstate(gate, 5) then v = not v end " @ - " if Gate.getportstate(gate, 6) then v = not v end " @ - " if Gate.getportstate(gate, 7) then v = not v end " @ - " if Gate.getportstate(gate, 8) then v = not v end " @ + " local v = 0 " @ + " if Gate.getportstate(gate, 1)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 2)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 3)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 4)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 5)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 6)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 7)~=0 then v = 1 - v end " @ + " if Gate.getportstate(gate, 8)~=0 then v = 1 - v end " @ " Gate.setportstate(gate, 9, v) " @ "end" ; diff --git a/bricks/inputs/keyboard-input.lua b/bricks/inputs/keyboard-input.lua index b174128..a33e9c5 100644 --- a/bricks/inputs/keyboard-input.lua +++ b/bricks/inputs/keyboard-input.lua @@ -1,4 +1,8 @@ +local function queueBit(gate, bit) + table.insert(gate.queueBits, 1, bit) +end + return function(gate, argv) if argv[1]=="\\:" then argv[1] = ";" end @@ -7,18 +11,14 @@ return function(gate, argv) local code = keycode+(status and 128 or 0) - local function queueBit(bit) - table.insert(gate.queueBits, 1, bit) - end - - queueBit(true) + queueBit(gate, 1) for bitidx = 1, 8 do - local val = bit.band(code, 0x80)~=0 - queueBit(val) + local val = bit.band(code, 0x80) + queueBit(gate, val) code = bit.lshift(code, 1) end - queueBit(false) + queueBit(gate, 0) Gate.queue(gate, 0) end diff --git a/bricks/inputs/keyboard-update.lua b/bricks/inputs/keyboard-update.lua index 1cacf44..91d8691 100644 --- a/bricks/inputs/keyboard-update.lua +++ b/bricks/inputs/keyboard-update.lua @@ -5,6 +5,6 @@ return function(gate) Gate.setportstate(gate, 1, bit) Gate.queue(gate, 1) else - Gate.setportstate(gate, 1, false) + Gate.setportstate(gate, 1, 0) end end diff --git a/bricks/inputs/switch-input.lua b/bricks/inputs/switch-input.lua index 959b767..fe0c41f 100644 --- a/bricks/inputs/switch-input.lua +++ b/bricks/inputs/switch-input.lua @@ -6,7 +6,7 @@ return function(gate, argv) else gatedata.switchstate = not gatedata.switchstate end - Gate.setportstate(gate, 1, gatedata.switchstate) - Gate.setportstate(gate, 2, gatedata.switchstate) + Gate.setportstate(gate, 1, gatedata.switchstate and 1 or 0) + Gate.setportstate(gate, 2, gatedata.switchstate and 1 or 0) Gate.cb(gate, bool_to_int[gatedata.switchstate]) end diff --git a/bricks/math/8bitAdder.cs b/bricks/math/8bitAdder.cs index a095ac9..36a7a1e 100644 --- a/bricks/math/8bitAdder.cs +++ b/bricks/math/8bitAdder.cs @@ -18,16 +18,16 @@ datablock fxDTSBrickData(LogicGate_8bitAdder_Data) logicUpdate = "return function(gate) " @ - " local c = bool_to_int[Gate.getportstate(gate, 17)] " @ + " local c = Gate.getportstate(gate, 17) " @ " local a = 0 " @ " local b = 0 " @ " for i = 1, 8 do " @ - " a = bool_to_int[Gate.getportstate(gate, i )] " @ - " b = bool_to_int[Gate.getportstate(gate, i+8)] " @ - " Gate.setportstate(gate, i+17, bit.bxor(bit.bxor(a, b), c) == 1) " @ + " a = Gate.getportstate(gate, i ) " @ + " b = Gate.getportstate(gate, i+8) " @ + " Gate.setportstate(gate, i+17, bit.bxor(bit.bxor(a, b), c)) " @ " c = bit.bor(bit.band(a, b), bit.band(c, bit.bor(a, b))) " @ " end " @ - " Gate.setportstate(gate, 26, c == 1) " @ + " Gate.setportstate(gate, 26, c) " @ "end" ; diff --git a/bricks/math/8bitDivider.cs b/bricks/math/8bitDivider.cs index 357ca2a..6acf3cb 100644 --- a/bricks/math/8bitDivider.cs +++ b/bricks/math/8bitDivider.cs @@ -21,21 +21,21 @@ datablock fxDTSBrickData(LogicGate_8bitDivider_Data) " local a, b, n = 0, 0 " @ " for i = 1, 8 do " @ " local n = 2^(i-1) " @ - " a = a + bool_to_int[Gate.getportstate(gate, i )] * n " @ - " b = b + bool_to_int[Gate.getportstate(gate, i+8)] * n " @ + " a = a + Gate.getportstate(gate, i ) * n " @ + " b = b + Gate.getportstate(gate, i+8) * n " @ " end " @ " if b ~= 0 then " @ " local q = math.floor(a/b) " @ " local r = a-q*b " @ " for i = 1, 8 do " @ " local n = 2^(i-1) " @ - " Gate.setportstate(gate, i+16, bit.band(q, n) > 0) " @ - " Gate.setportstate(gate, i+24, bit.band(r, n) > 0) " @ + " Gate.setportstate(gate, i+16, (bit.band(q, n) > 0) and 1 or 0) " @ + " Gate.setportstate(gate, i+24, (bit.band(r, n) > 0) and 1 or 0) " @ " end " @ " else " @ " for i = 1, 8 do " @ - " Gate.setportstate(gate, i+16, false) " @ - " Gate.setportstate(gate, i+24, false) " @ + " Gate.setportstate(gate, i+16, 0) " @ + " Gate.setportstate(gate, i+24, 0) " @ " end " @ " end " @ "end" diff --git a/bricks/math/8bitMultiplier.cs b/bricks/math/8bitMultiplier.cs index 788ff15..6c83949 100644 --- a/bricks/math/8bitMultiplier.cs +++ b/bricks/math/8bitMultiplier.cs @@ -20,12 +20,12 @@ datablock fxDTSBrickData(LogicGate_8bitMultiplier_Data) "return function(gate) local a, b = 0, 0 " @ " local sum = 0 " @ " for i = 1, 8 do " @ - " a = a + bool_to_int[Gate.getportstate(gate, i )] * 2^(i-1) " @ - " b = b + bool_to_int[Gate.getportstate(gate, i+8)] * 2^(i-1) " @ + " a = a + Gate.getportstate(gate, i ) * 2^(i-1) " @ + " b = b + Gate.getportstate(gate, i+8) * 2^(i-1) " @ " end " @ " local sum = a * b " @ " for i = 1, 16 do " @ - " Gate.setportstate(gate, i+16, bit.band(sum, 2^(i-1)) > 0) " @ + " Gate.setportstate(gate, i+16, (bit.band(sum, 2^(i-1)) > 0) and 1 or 0) " @ " end " @ "end" ; diff --git a/bricks/math/8bitSubtractor.cs b/bricks/math/8bitSubtractor.cs index d154fd5..2cae72e 100644 --- a/bricks/math/8bitSubtractor.cs +++ b/bricks/math/8bitSubtractor.cs @@ -18,16 +18,16 @@ datablock fxDTSBrickData(LogicGate_8bitSubtractor_Data) logicUpdate = "return function(gate) " @ - " local c = bool_to_int[Gate.getportstate(gate, 17)] " @ + " local c = Gate.getportstate(gate, 17) " @ " local a = 0 " @ " local b = 0 " @ " for i = 1, 8 do " @ - " a = bool_to_int[Gate.getportstate(gate, i )] " @ - " b = bool_to_int[Gate.getportstate(gate, i+8)] " @ - " Gate.setportstate(gate, i+17, bit.bxor(bit.bxor(a, b), c) == 1) " @ + " a = Gate.getportstate(gate, i ) " @ + " b = Gate.getportstate(gate, i+8) " @ + " Gate.setportstate(gate, i+17, bit.bxor(bit.bxor(a, b), c)) " @ " c = bit.bor(bit.bor(bit.band(bool_to_int[a == 0], b), bit.band(bool_to_int[a == 0], c)), bit.band(b, c)) " @ " end " @ - " Gate.setportstate(gate, 26, c == 1) " @ + " Gate.setportstate(gate, 26, c) " @ "end" ; diff --git a/bricks/math/FullAdder.cs b/bricks/math/FullAdder.cs index 13a0f02..d10da8c 100644 --- a/bricks/math/FullAdder.cs +++ b/bricks/math/FullAdder.cs @@ -18,9 +18,9 @@ datablock fxDTSBrickData(LogicGate_FullAdder_Data) logicUpdate = "return function(gate) " @ - " local a, b, c = bool_to_int[Gate.getportstate(gate, 1)], bool_to_int[Gate.getportstate(gate, 2)], bool_to_int[Gate.getportstate(gate, 3)] " @ - " Gate.setportstate(gate, 4, bit.bxor(bit.bxor(a, b), c) == 1) " @ - " Gate.setportstate(gate, 5, bit.bor(bit.bor(bit.band(b, c), bit.band(a, c)), bit.band(a, b)) == 1) " @ + " local a, b, c = Gate.getportstate(gate, 1), Gate.getportstate(gate, 2), Gate.getportstate(gate, 3) " @ + " Gate.setportstate(gate, 4, bit.bxor(bit.bxor(a, b), c)) " @ + " Gate.setportstate(gate, 5, bit.bor(bit.bor(bit.band(b, c), bit.band(a, c)), bit.band(a, b))) " @ "end" ; diff --git a/bricks/math/HalfAdder.cs b/bricks/math/HalfAdder.cs index 45f0688..bae99d7 100644 --- a/bricks/math/HalfAdder.cs +++ b/bricks/math/HalfAdder.cs @@ -18,8 +18,8 @@ datablock fxDTSBrickData(LogicGate_HalfAdder_Data) logicUpdate = "return function(gate) " @ - " Gate.setportstate(gate, 3, bit.bxor(bool_to_int[Gate.getportstate(gate, 1)], bool_to_int[Gate.getportstate(gate, 2)]) == 1) " @ - " Gate.setportstate(gate, 4, Gate.getportstate(gate, 1) and Gate.getportstate(gate, 2)) " @ + " Gate.setportstate(gate, 3, bit.bxor(Gate.getportstate(gate, 1), Gate.getportstate(gate, 2)) == 1) " @ + " Gate.setportstate(gate, 4, (Gate.getportstate(gate, 1) and Gate.getportstate(gate, 2)) and 1 or 0) " @ "end" ; diff --git a/bricks/outputs/pixel3-update.lua b/bricks/outputs/pixel3-update.lua index 3d26e97..9b864d6 100644 --- a/bricks/outputs/pixel3-update.lua +++ b/bricks/outputs/pixel3-update.lua @@ -1,4 +1,4 @@ return function(gate) - Gate.cb(gate, Gate.getportstate(gate, 1) and 1 or 0) + Gate.cb(gate, Gate.getportstate(gate, 1)) end diff --git a/bricks/special/EventGate-input.lua b/bricks/special/EventGate-input.lua index 42857b9..eb1dc61 100644 --- a/bricks/special/EventGate-input.lua +++ b/bricks/special/EventGate-input.lua @@ -1,4 +1,4 @@ return function(gate, argv) - Gate.setportstate(gate, 2, toboolean(argv[1])) + Gate.setportstate(gate, 2, toboolean(argv[1]) and 1 or 0) end diff --git a/bricks/special/EventGate-update.lua b/bricks/special/EventGate-update.lua index 88b8cc2..c3ba65c 100644 --- a/bricks/special/EventGate-update.lua +++ b/bricks/special/EventGate-update.lua @@ -1,4 +1,4 @@ return function(gate) - Gate.cb(gate, bool_to_int[Gate.getportstate(gate, 1)]) + Gate.cb(gate, Gate.getportstate(gate, 1)) end