start adding c structs for gates and ports

This commit is contained in:
Redo0 2021-05-25 14:54:26 -05:00
parent be2df1ef33
commit 8561940777
7 changed files with 86 additions and 43 deletions

View File

@ -1,6 +1,14 @@
Gate = {} Gate = {}
FFI.cdef[[
struct Gate {
int objref;
int definition_objref;
struct Port ports[1];
};
]]
function Gate.new(self, objref, definition, sim) function Gate.new(self, objref, definition, sim)
local o = { local o = {
objref = objref, objref = objref,
@ -57,3 +65,21 @@ end
function Gate.getsim(gate) function Gate.getsim(gate)
return gate.sim return gate.sim
end end
function Gate.getdefinition(gate)
return gate.definition
end
-- Logic functions
function Gate.init(gate)
Gate.getdefinition(gate).init(gate)
end
function Gate.logic(gate)
Gate.getdefinition(gate).logic(gate)
end
function Gate.input(gate, argv)
Gate.getdefinition(gate).input(gate, argv)
end

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@ -58,11 +58,11 @@ function GateDefinition.new(self, objref, name, description, init, logic, input,
return o return o
end end
function GateDefinition.constructgate(self, objref, position, rotation, sim) function GateDefinition.constructgate(def, objref, position, rotation, sim)
local gate = Gate.new(Gate, objref, self, sim) local gate = Gate.new(Gate, objref, def, sim)
for i = 1, #self.ports do for i = 1, #def.ports do
local portd = self.ports[i] local portd = def.ports[i]
local type = portd.type local type = portd.type
local pos = {portd.position[1], portd.position[2], portd.position[3]} local pos = {portd.position[1], portd.position[2], portd.position[3]}
local dir = portd.direction local dir = portd.direction

View File

@ -59,7 +59,7 @@ function Group.removewire(self, wire)
end end
for k, wire in pairs(self.wires) do for k, wire in pairs(self.wires) do
Simulation.connectwire(sim. wire) Simulation.connectwire(sim, wire)
end end
for k, port in pairs(self.out_ports) do for k, port in pairs(self.out_ports) do

View File

@ -14,15 +14,15 @@ local ffi = require("ffi")
dofile("iosafe.lua") dofile("iosafe.lua")
FFI = ffi
dofile("utility.lua") dofile("utility.lua")
dofile("simulation.lua") dofile("simulation.lua")
dofile("group.lua") dofile("group.lua")
dofile("wire.lua") dofile("wire.lua")
dofile("gatedef.lua") dofile("gatedef.lua")
dofile("gate.lua")
dofile("port.lua") dofile("port.lua")
dofile("gate.lua")
dofile("save.lua") dofile("save.lua")
FFI = ffi
dofile("compile.lua") dofile("compile.lua")
FFI = nil FFI = nil
@ -49,6 +49,7 @@ local avgticks = {}
local totalticks = 0 local totalticks = 0
local sim = Simulation.new(Simulation) local sim = Simulation.new(Simulation)
GSim = sim
local units = { local units = {
"uHz", "uHz",
@ -164,8 +165,8 @@ while 1 do
Simulation.addgate(sim, gate) Simulation.addgate(sim, gate)
--print(gate.objref) --print(gate.objref)
gate.definition.init(gate) Gate.init(gate)
gate.definition.logic(gate) Gate.logic(gate)
i = i + 4 i = i + 4
elseif data[i] == "RW" then elseif data[i] == "RW" then
@ -254,33 +255,34 @@ while 1 do
local userid = data[i+1] local userid = data[i+1]
local objref = tonumber(data[i+2]) local objref = tonumber(data[i+2])
local obj = Simulation.getwirebyref(sim, objref) or Simulation.getgatebyref(sim, objref) local info = ""
if obj ~= nil then local wire = Simulation.getwirebyref(sim, objref)
local info = "" if wire then
local numportsi = 0; for k, wire2 in pairs(Wire.getgroup(wire).in_ports ) do numportsi = numportsi+1 end
local numportso = 0; for k, wire2 in pairs(Wire.getgroup(wire).out_ports) do numportso = numportso+1 end
local numwires = 0; for k, wire2 in pairs(Wire.getgroup(wire).wires ) do numwires = numwires +1 end
if obj.logictype == 0 then info = "\\c5Net " .. tostring(wire.group):match("table: 0x(.+)"):upper() .. "\n" .. (Wire.getgroup(wire).state and "\\c2On" or "\\c0Off") .. "\n" ..
local numportsi = 0; for k, wire in pairs(Wire.getgroup(obj).in_ports ) do numportsi = numportsi+1 end "Wires: "..numwires.."\n"..
local numportso = 0; for k, wire in pairs(Wire.getgroup(obj).out_ports) do numportso = numportso+1 end "In Ports: " ..numportsi.."\n"..
local numwires = 0; for k, wire in pairs(Wire.getgroup(obj).wires ) do numwires = numwires +1 end "Out Ports: "..numportso
;
info = "\\c5Net " .. tostring(obj.group):match("table: 0x(.+)"):upper() .. "\n" .. (Wire.getgroup(obj).state and "\\c2On" or "\\c0Off") .. "\n" .. end
"Wires: "..numwires.."\n"..
"In Ports: " ..numportsi.."\n".. local gate = Simulation.getgatebyref(sim, objref)
"Out Ports: "..numportso if gate then
; local def = Gate.getdefinition(gate)
else info = "\\c5" .. def.name .. "<br>"
info = "\\c5" .. obj.definition.name .. "<br>" for i = 1, #gate.ports do
for i = 1, #obj.ports do info = info .. (gate.ports[i].state and "\\c2" or "\\c0") .. def.ports[i].name .. (i ~= #gate.ports and " " or "")
info = info .. (obj.ports[i].state and "\\c2" or "\\c0") .. obj.definition.ports[i].name .. (i ~= #obj.ports and " " or "")
end
end
if info ~= "" then
client:send("GINFO\t" .. userid .. "\t" .. expandescape(info) .. "\n")
end end
end end
if info ~= "" then
client:send("GINFO\t" .. userid .. "\t" .. expandescape(info) .. "\n")
end
i = i + 2 i = i + 2
elseif data[i] == "SINFO" then elseif data[i] == "SINFO" then
client:send("SINFO\t" .. data[i+1] .. "\t" .. sim.nwires .. "\t" .. sim.ngates .. "\t" .. sim.ninports .. "\t" .. sim.noutports .. "\n") client:send("SINFO\t" .. data[i+1] .. "\t" .. sim.nwires .. "\t" .. sim.ngates .. "\t" .. sim.ninports .. "\t" .. sim.noutports .. "\n")

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@ -1,7 +1,7 @@
PortTypes = { PortTypes = {
output = 0, output = 0,
input = 1 input = 1,
} }
PortDirections = { PortDirections = {
@ -13,9 +13,20 @@ PortDirections = {
[5] = {0, 0, -1} [5] = {0, 0, -1}
} }
Port = { Port = {}
logictype = 1,
} FFI.cdef[[
struct Gate;
struct Port {
bool state;
char type;
char direction;
bool causeupdate;
int position[3];
struct Gate* gate;
struct Net* group;
};
]]
function Port.new(self, type, direction, position, causeupdate, sim) function Port.new(self, type, direction, position, causeupdate, sim)
local o = { local o = {

View File

@ -169,13 +169,19 @@ function Simulation.removegate(self, objref)
self.ngates = self.ngates - 1 self.ngates = self.ngates - 1
end end
local function is_wire(obj)
return obj.layer~=nil
end
function Simulation.connectwireat(self, wire, x, y, z) function Simulation.connectwireat(self, wire, x, y, z)
local objs = Simulation.getfromworld(self, x, y, z) local objs = Simulation.getfromworld(self, x, y, z)
for k, obj in pairs(objs) do for k, obj in pairs(objs) do
if obj ~= wire and obj.group ~= nil then if obj ~= wire and obj.group ~= nil then
if obj.logictype == 0 and Wire.getlayer(obj) == Wire.getlayer(wire) then if is_wire(obj) then -- wire
if Wire.getlayer(obj) == Wire.getlayer(wire) then -- same layer
Group.addwire(obj.group, wire) Group.addwire(obj.group, wire)
elseif obj.logictype == 1 then end
else -- port
Group.addwire(obj.group, wire) Group.addwire(obj.group, wire)
end end
end end
@ -273,13 +279,13 @@ function Simulation.tick(self)
self.groupqueue = {} self.groupqueue = {}
for k, gate in pairs(self.initqueue) do for k, gate in pairs(self.initqueue) do
gate.definition.init(gate) Gate.init(gate)
end end
self.initqueue = {} self.initqueue = {}
for gate, inputs in pairs(self.inputqueue) do for gate, inputs in pairs(self.inputqueue) do
for inputidx, argv in ipairs(inputs) do for inputidx, argv in ipairs(inputs) do
gate.definition.input(gate, argv) Gate.input(gate, argv)
end end
end end
self.inputqueue = {} self.inputqueue = {}
@ -292,7 +298,7 @@ function Simulation.tick(self)
end end
for k, gate in pairs(self.gatequeue) do for k, gate in pairs(self.gatequeue) do
gate.definition.logic(gate) Gate.logic(gate)
end end
self.gatequeue = {} self.gatequeue = {}

View File

@ -1,7 +1,5 @@
Wire = { Wire = {}
logictype = 0
}
function Wire.new(self, objref, layer, bounds, sim) function Wire.new(self, objref, layer, bounds, sim)
local o = { local o = {