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fix carry and shifts in hardware, misc

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This commit is contained in:
Redo 2024-01-20 03:12:26 -06:00
parent ecf01a2dc9
commit 365071072b
8 changed files with 29 additions and 29 deletions
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2
assembler-8608.lua
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@ -706,7 +706,7 @@ if HasTs or (not AsmIncluded) then
ts.eval [[
function AssembleBuildFile(%fn, %romsize, %offset, %len) { luacall("AssembleBuildFile", strReplace(%fn, "$", "Add-ons/_misc/rom/8608programs/"), %romsize, %offset, %len); }
]]
AssembleBuildFile(arg[1] or "../8608programs/test.asm", "16 16 8", "0", "256")
if not HasTs then AssembleBuildFile(arg[1] or "../8608programs/test.asm", "16 16 8", "0", "256") end
end
return {

6
emulator/8608emulator.c
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@ -40,9 +40,9 @@
#define pushretaddr2 writememory(cpu->s++, lobyte((cpu->i-1)%65536));
#define lni cpu->instr = readmemory(cpu->i++); cpu->cycle = 0;
#define ldi cpu->instr = readmemory(cpu->i); cpu->cycle = 0;
#define addf(x,y) { x=(x+y); cpu->cf=x>=256; x&=0xFF; setzf(x); }
#define subf(x,y) addf(x,-y);
#define cmpf(x,y) { int t=x-y; cpu->cf=(t<0); setzf(t); }
#define addf(x,y) { x=(x+y)&0x1FF; cpu->cf=x>=256; x&=0xFF; setzf(x); }
#define subf(x,y) addf(x,(-y)&0xFF);
#define cmpf(x,y) { int t=x+((-y)&0xFF); cpu->cf=t>=256; t&=0xFF; setzf(t); }
#define rol(x,y) x=(x<<y)|(x>>(8-y));
#define ror(x,y) x=(x>>y)|(x<<(8-y));
#define sra(x,y) x=(x>>y);

BIN
emulator/8608emulator.dll
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Binary file not shown.

6
emulator/8608emulator.lua
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@ -369,7 +369,7 @@ local function RedrawKeyInfo(x, y, uk, run)
lg.setColor(0,0,0)
lg.rectangle("fill",x,y,768,12)
lg.setColor(1,1,1)
printHighlight("[ESC] Toggle keyboard", 0, lk.isDown("escape"), x, y)
printHighlight("[F4] Toggle keyboard", 0, lk.isDown("f4"), x, y)
lg.setColor(1,1,1)
if uk then
printHighlight("Keystrokes passed to device", 23, false, x, y)
@ -656,7 +656,7 @@ function love.draw()
end
function love.keypressed(k)
if k=="escape" then
if k=="f4" then
UseKeyboard = not UseKeyboard
else
if UseKeyboard then
@ -674,5 +674,5 @@ function love.keypressed(k)
end
end
function love.keyreleased(k)
if k~="escape" and UseKeyboard then KeyboardOnKey(Keyboard, k, false, CPU, Memory) end
if k~="f4" and UseKeyboard then KeyboardOnKey(Keyboard, k, false, CPU, Memory) end
end

12
emulator/instructions_gen.c
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@ -63,19 +63,19 @@ void cpu_instr_46_1(struct CPU* const cpu, struct Memory* const mem) { loadstack
void cpu_instr_46_2(struct CPU* const cpu, struct Memory* const mem) { tst(cpu->u); lni; }
void cpu_instr_47_0(struct CPU* const cpu, struct Memory* const mem) { cpu->a=sra(cpu->a,cpu->c); setzf(cpu->a); lni; }
void cpu_instr_48_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; }
void cpu_instr_48_1(struct CPU* const cpu, struct Memory* const mem) { if( cpu->nz ) { jmprelt } else { lni } }
void cpu_instr_48_1(struct CPU* const cpu, struct Memory* const mem) { if( cpu->nz ) { jmprelt } else { lni } }
void cpu_instr_49_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; }
void cpu_instr_49_1(struct CPU* const cpu, struct Memory* const mem) { jmprelt }
void cpu_instr_50_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; }
void cpu_instr_50_1(struct CPU* const cpu, struct Memory* const mem) { if(!cpu->nz ) { jmprelt } else { lni } }
void cpu_instr_50_1(struct CPU* const cpu, struct Memory* const mem) { if(!cpu->nz ) { jmprelt } else { lni } }
void cpu_instr_51_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; }
void cpu_instr_51_1(struct CPU* const cpu, struct Memory* const mem) { if(!cpu->cf ) { jmprelt } else { lni } }
void cpu_instr_51_1(struct CPU* const cpu, struct Memory* const mem) { if(!cpu->cf ) { jmprelt } else { lni } }
void cpu_instr_52_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; }
void cpu_instr_52_1(struct CPU* const cpu, struct Memory* const mem) { if( cpu->cf ) { jmprelt } else { lni } }
void cpu_instr_52_1(struct CPU* const cpu, struct Memory* const mem) { if( cpu->cf ) { jmprelt } else { lni } }
void cpu_instr_53_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; }
void cpu_instr_53_1(struct CPU* const cpu, struct Memory* const mem) { if(cpu->nz && (!cpu->cf)) { jmprelt } else { lni } }
void cpu_instr_53_1(struct CPU* const cpu, struct Memory* const mem) { if( cpu->nz && cpu->cf ) { jmprelt } else { lni } }
void cpu_instr_54_0(struct CPU* const cpu, struct Memory* const mem) { loadimmedt cpu->cycle++; }
void cpu_instr_54_1(struct CPU* const cpu, struct Memory* const mem) { if((!cpu->nz) || cpu->cf) { jmprelt } else { lni } }
void cpu_instr_54_1(struct CPU* const cpu, struct Memory* const mem) { if((!cpu->nz) || (!cpu->cf)) { jmprelt } else { lni } }
void cpu_instr_55_0(struct CPU* const cpu, struct Memory* const mem) { cpu->b=lobyte(cpu->p); lni; }
void cpu_instr_56_0(struct CPU* const cpu, struct Memory* const mem) { cpu->c=hibyte(cpu->p); lni; }
void cpu_instr_57_0(struct CPU* const cpu, struct Memory* const mem) { cpu->b=lobyte(cpu->q); lni; }

4
instructionList.txt
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@ -131,8 +131,8 @@ jnz imm8 30 2 I+=imm8 if !Zero
jpz imm8 32 2 I+=imm8 if Zero
jge imm8 33 2 I+=imm8 if !Carry
jlt imm8 34 2 I+=imm8 if Carry
jgt imm8 35 2 I+=imm8 if !Zero & Carry
jle imm8 36 2 I+=imm8 if Zero | !Carry
jgt imm8 35 2 I+=imm8 if !Zero & !Carry
jle imm8 36 2 I+=imm8 if Zero | Carry
Stack (S):
psh a 40 2 *(S++)=A

2
readme.txt
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@ -9,7 +9,7 @@ How to use the assembler:
3. In BL console,
luaexec("your_path/assembler-8608.lua");
4. To assemble a program, place a 1x1f ghost brick on the top-left corner of the ROM, face forward, and in BL console do
AssembleFile("other_path/filename.asm", "RomX RomY RomZ"); where RomX is the width of the ROM, RomY is the depth front to back, and RomZ is the height in bits, i.e. "16 16 8"
AssembleBuildFile("other_path/filename.asm", "RomX RomY RomZ"); where RomX is the width of the ROM, RomY is the depth front to back, and RomZ is the height in bits, i.e. "16 16 8"
You can also run the assembler from the command line to get a memory dump and disassembly in stdout, if you have lua installed:
luajit "your_path/assembler-8608.lua" "other_path/filename.asm"

26
rom-8608-defs.lua
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@ -114,11 +114,11 @@ operations = {
aluOpInc = {"aluOpAdd","aluCinOn"},
aluOpDec = {"aluOpAdd","aluRInv"},
aluOpMov = {"aluAdd","aluSaveNZ"},
aluOpShl = {"aluShift" ,"aluSaveNZ"},
aluOpShr = {"aluShift","aluShiftRight" ,"aluSaveNZ"},
aluOpRol = {"aluShift", "aluShiftRoll" ,"aluSaveNZ"},
aluOpRor = {"aluShift","aluShiftRight","aluShiftRoll" ,"aluSaveNZ"},
aluOpSra = {"aluShift","aluShiftRight", "aluShiftArith","aluSaveNZ"},
aluOpShl = {"aluRun", "aluShift" ,"aluSaveNZ"},
aluOpShr = {"aluRun", "aluShift","aluShiftRight" ,"aluSaveNZ"},
aluOpRol = {"aluRun", "aluShift", "aluShiftRoll" ,"aluSaveNZ"},
aluOpRor = {"aluRun", "aluShift","aluShiftRight","aluShiftRoll" ,"aluSaveNZ"},
aluOpSra = {"aluRun", "aluShift","aluShiftRight", "aluShiftArith","aluSaveNZ"},
clearRegs = {
"aluSaveA","aluSaveB","aluSaveC","aluSaveU","aluSaveT",
@ -137,8 +137,8 @@ instructions = {
{ mnem="brk" , opcode=0xF3, {"instrSwapIV","adwInc","intFlgVal","intFlgClk"}, desc="Trigger interrupt", ccode={"cpu.ifg=1; int t=cpu.i; cpu.i=cpu.v; cpu.v=t; lni;"} },
{ mnem="irt" , opcode=0xF4, {"instrSwapIV","adwInc","intFlgClk"}, desc="Return from interrupt", ccode={"cpu.ifg=0; int t=cpu.i; cpu.i=cpu.v; cpu.v=t; lni;"} },
{ mnem="nop" , opcode=0xFF, {"instrNext"}, desc="Do nothing", ccode={"lni;"}, },
{ mnem="ien" , opcode=0xF5, {"instrNext"}, desc="Enbale interrupts", ccode={"cpu.ien=1; lni;"}, },
{ mnem="idi" , opcode=0xF6, {"instrNext"}, desc="Disable interrupts", ccode={"cpu.ien=0; lni;"}, },
{ mnem="ien" , opcode=0xF5, {"instrNext"}, desc="Enbale interrupts", ccode={"cpu.ien=1; lni;"}, }, -- todo
{ mnem="idi" , opcode=0xF6, {"instrNext"}, desc="Disable interrupts", ccode={"cpu.ien=0; lni;"}, }, -- todo
{ category = "16-bit Inc/Dec", catlet="I" },
{ mnem="inc p" , opcode=0x12, {"adwlP","adwInc","adwSaveP","instrNext"}, desc="P++", ccode={"cpu.p++; lni;"} },
@ -258,12 +258,12 @@ instructions = {
{ mnem="jss q" , opcode=0xE5, {"pushRetAddr1","instrSub1"}, {"pushRetAddr2","instrSub2"}, {"jmpAbsQ"}, desc="I=Q, *(S++++)=I-1", ccode={"pushretaddr1","pushretaddr2","jmpabsq"} },
{ mnem="rts" , opcode=0xE1, {"pop161","instrSub1"}, {"pop162","instrSub2"}, {"jmpAbsUT","adrInc"}, desc="I=*(----S)+1", ccode={"pop161","pop162","jmpabsutplus1"} },
{ mnem="jpr imm8" , opcode=0x31, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub1"}, {"jmpRelT"}, desc="I+=imm8", ccode={"loadimmedt","jmprelt"} },
{ mnem="jnz imm8" , opcode=0x30, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NZ" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if !Zero" , ccode={"loadimmedt","if( cpu.nz ) { jmprelt } else { lni }"} },
{ mnem="jpz imm8" , opcode=0x32, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0Z" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if Zero" , ccode={"loadimmedt","if(!cpu.nz ) { jmprelt } else { lni }"} },
{ mnem="jge imm8" , opcode=0x33, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NC" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if !Carry" , ccode={"loadimmedt","if(!cpu.cf ) { jmprelt } else { lni }"} },
{ mnem="jlt imm8" , opcode=0x34, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0C" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if Carry" , ccode={"loadimmedt","if( cpu.cf ) { jmprelt } else { lni }"} },
{ mnem="jgt imm8" , opcode=0x35, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0C","instrNext0Z"}, {}, {"jmpRelT"}, {"instrNext"}, desc="I+=imm8 if !Zero & Carry", ccode={"loadimmedt","if(cpu.nz && (!cpu.cf)) { jmprelt } else { lni }"} },
{ mnem="jle imm8" , opcode=0x36, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0C","instrNext0Z"}, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if Zero | !Carry", ccode={"loadimmedt","if((!cpu.nz) || cpu.cf) { jmprelt } else { lni }"} },
{ mnem="jnz imm8" , opcode=0x30, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NZ" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if !Zero" , ccode={"loadimmedt","if( cpu.nz ) { jmprelt } else { lni }"} },
{ mnem="jpz imm8" , opcode=0x32, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0Z" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if Zero" , ccode={"loadimmedt","if(!cpu.nz ) { jmprelt } else { lni }"} },
{ mnem="jlt imm8" , opcode=0x33, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NC" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if !Carry" , ccode={"loadimmedt","if(!cpu.cf ) { jmprelt } else { lni }"} },
{ mnem="jge imm8" , opcode=0x34, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0C" }, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if Carry" , ccode={"loadimmedt","if( cpu.cf ) { jmprelt } else { lni }"} },
{ mnem="jgt imm8" , opcode=0x35, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NC","instrNext0Z"}, {}, {"jmpRelT"}, {"instrNext"}, desc="I+=imm8 if !Zero & Carry", ccode={"loadimmedt","if( cpu.nz && cpu.cf ) { jmprelt } else { lni }"} },
{ mnem="jle imm8" , opcode=0x36, jmp=true, rel=true, ncycles=2, {"loadImmed","memSaveT","instrSub23Cond","instrNext0NC","instrNext0Z"}, {}, {"instrNext"}, {"jmpRelT"}, desc="I+=imm8 if Zero | !Carry", ccode={"loadimmedt","if((!cpu.nz) || (!cpu.cf)) { jmprelt } else { lni }"} },
{ category = "Stack", catlet="S" },
{ mnem="psh a" , opcode=0x40, {"pushReg","alurA","instrSub1"}, {"instrNext"}, desc="*(S++)=A", ccode={"pushbyte(cpu.a);","lni;"} },