128 lines
2.9 KiB
C#
128 lines
2.9 KiB
C#
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datablock fxDtsBrickData(LogicGate_Rom32x16_Data){
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brickFile = $LuaLogic::Path @ "bricks/gen/newbricks/ROM 32x16.blb";
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iconName = $LuaLogic::Path @ "bricks/gen/newicons/ROM 32x16";
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category = "Logic Bricks";
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subCategory = "Special I/O";
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uiName = "ROM 32x16";
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logicUIName = "ROM 32x16";
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logicUIDesc = "";
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hasPrint = 1;
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printAspectRatio = "Logic";
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logicBrickSize = "32 16 1";
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orientationFix = 3;
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isLogic = true;
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isLogicGate = true;
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isLogicInput = false;
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logicInit =
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"return function(gate) " @
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" gate.romdata = {} " @
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" for i = 0, 511 do " @
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" gate.romdata[i] = 0 " @
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" end " @
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"end"
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;
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logicInput =
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"return function(gate, args) " @
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" local data = args[1] " @
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" for i = 1, #data do " @
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" local c = data:sub(i, i) " @
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" gate.romdata[i-1] = (c==\"1\") and 1 or 0 " @
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" end " @
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" Gate.queue(gate, 0) " @
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"end"
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;
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logicUpdate =
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"return function(gate) " @
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" if Gate.getportstate(gate, 11)~=0 then " @
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" Gate.setportstate(gate, 10, gate.romdata[( " @
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" (Gate.getportstate(gate, 1)) " @
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" + (Gate.getportstate(gate, 2) * 2) " @
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" + (Gate.getportstate(gate, 3) * 4) " @
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" + (Gate.getportstate(gate, 4) * 8) " @
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" + (Gate.getportstate(gate, 5) * 16) " @
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" + (Gate.getportstate(gate, 6) * 32) " @
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" + (Gate.getportstate(gate, 7) * 64) " @
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" + (Gate.getportstate(gate, 8) * 128) " @
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" + (Gate.getportstate(gate, 9) * 256) " @
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" )]) " @
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" else " @
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" Gate.setportstate(gate, 10, 0) " @
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" end " @
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"end"
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;
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logicGlobal = "";
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numLogicPorts = 11;
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isLogicRom = true;
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logicRomY = 16;
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logicRomX = 32;
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logicPortType[0] = 1;
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logicPortPos[0] = "31 -15 0";
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logicPortDir[0] = 3;
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logicPortUIName[0] = "Addr0";
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logicPortType[1] = 1;
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logicPortPos[1] = "29 -15 0";
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logicPortDir[1] = 3;
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logicPortUIName[1] = "Addr1";
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logicPortType[2] = 1;
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logicPortPos[2] = "27 -15 0";
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logicPortDir[2] = 3;
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logicPortUIName[2] = "Addr2";
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logicPortType[3] = 1;
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logicPortPos[3] = "25 -15 0";
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logicPortDir[3] = 3;
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logicPortUIName[3] = "Addr3";
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logicPortType[4] = 1;
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logicPortPos[4] = "23 -15 0";
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logicPortDir[4] = 3;
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logicPortUIName[4] = "Addr4";
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logicPortType[5] = 1;
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logicPortPos[5] = "21 -15 0";
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logicPortDir[5] = 3;
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logicPortUIName[5] = "Addr5";
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logicPortType[6] = 1;
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logicPortPos[6] = "19 -15 0";
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logicPortDir[6] = 3;
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logicPortUIName[6] = "Addr6";
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logicPortType[7] = 1;
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logicPortPos[7] = "17 -15 0";
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logicPortDir[7] = 3;
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logicPortUIName[7] = "Addr7";
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logicPortType[8] = 1;
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logicPortPos[8] = "15 -15 0";
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logicPortDir[8] = 3;
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logicPortUIName[8] = "Addr8";
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logicPortType[9] = 0;
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logicPortPos[9] = "31 15 0";
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logicPortDir[9] = 1;
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logicPortUIName[9] = "Out";
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logicPortType[10] = 1;
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logicPortPos[10] = "31 -15 0";
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logicPortDir[10] = 2;
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logicPortUIName[10] = "In";
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logicPortCauseUpdate[10] = true;
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};
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function LogicGate_Rom32x16_Data::Logic_onAdd(%data, %brick) {
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lualogic_rom_updatedata(%brick);
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}
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